NO

Initial ITS
Start location: l8
   0: l0 -> l1 : ___cil_tmp2_11^0'=___cil_tmp2_11^post0, ntStatus_8^0'=ntStatus_8^post0, lt_13^0'=lt_13^post0, InterfaceType_5^0'=InterfaceType_5^post0, lt_16^0'=lt_16^post0, ct_49^0'=ct_49^post0, cnt_27^0'=cnt_27^post0, Result_4^0'=Result_4^post0, lt_18^0'=lt_18^post0, lt_12^0'=lt_12^post0, Dc_6^0'=Dc_6^post0, ct_15^0'=ct_15^post0, ___retres1_10^0'=___retres1_10^post0, lt_14^0'=lt_14^post0, MaximumInterfaceType_9^0'=MaximumInterfaceType_9^post0, lt_17^0'=lt_17^post0, fdoExtension_7^0'=fdoExtension_7^post0, cnt_32^0'=cnt_32^post0, (0 == 0 /\ lt_18^0-lt_18^post0 == 0 /\ -lt_14^post0+lt_14^0 == 0 /\ ct_15^0-ct_15^post0 == 0 /\ -lt_12^post0+lt_12^0 == 0 /\ lt_13^0-lt_13^post0 == 0 /\ -cnt_32^post0+cnt_32^0 == 0 /\ -cnt_27^post0+cnt_27^0 == 0 /\ lt_17^0-lt_17^post0 == 0 /\ -___retres1_10^post0+___retres1_10^0 == 0 /\ -Result_4^post0+Result_4^0 == 0 /\ lt_16^0-lt_16^post0 == 0 /\ ___cil_tmp2_11^0-___cil_tmp2_11^post0 == 0 /\ ct_49^0-ct_49^post0 == 0), cost: 1
   1: l1 -> l3 : ___cil_tmp2_11^0'=___cil_tmp2_11^post1, ntStatus_8^0'=ntStatus_8^post1, lt_13^0'=lt_13^post1, InterfaceType_5^0'=InterfaceType_5^post1, lt_16^0'=lt_16^post1, ct_49^0'=ct_49^post1, cnt_27^0'=cnt_27^post1, Result_4^0'=Result_4^post1, lt_18^0'=lt_18^post1, lt_12^0'=lt_12^post1, Dc_6^0'=Dc_6^post1, ct_15^0'=ct_15^post1, ___retres1_10^0'=___retres1_10^post1, lt_14^0'=lt_14^post1, MaximumInterfaceType_9^0'=MaximumInterfaceType_9^post1, lt_17^0'=lt_17^post1, fdoExtension_7^0'=fdoExtension_7^post1, cnt_32^0'=cnt_32^post1, (0 == 0 /\ -___retres1_10^post1+___retres1_10^0 == 0 /\ -lt_12^post1+lt_12^0 == 0 /\ -cnt_32^post1+cnt_32^0 == 0 /\ lt_16^10-cnt_27^0 == 0 /\ -fdoExtension_7^post1+fdoExtension_7^0 == 0 /\ ct_49^0-ct_49^post1 == 0 /\ -cnt_27^0+lt_17^10 == 0 /\ -cnt_27^post1+cnt_27^0 == 0 /\ Result_4^0-Result_4^post1 == 0 /\ 1-lt_18^10+lt_17^10 <= 0 /\ Dc_6^0-Dc_6^post1 == 0 /\ -MaximumInterfaceType_9^post1+MaximumInterfaceType_9^0 == 0 /\ -InterfaceType_5^post1+InterfaceType_5^0 == 0 /\ ___cil_tmp2_11^0-___cil_tmp2_11^post1 == 0 /\ -ct_49^0+lt_13^post1 == 0 /\ lt_14^10-ct_49^0 == 0 /\ 1-lt_14^10 <= 0 /\ ntStatus_8^0-ntStatus_8^post1 == 0 /\ lt_18^10-cnt_32^0 == 0), cost: 1
   5: l1 -> l5 : ___cil_tmp2_11^0'=___cil_tmp2_11^post5, ntStatus_8^0'=ntStatus_8^post5, lt_13^0'=lt_13^post5, InterfaceType_5^0'=InterfaceType_5^post5, lt_16^0'=lt_16^post5, ct_49^0'=ct_49^post5, cnt_27^0'=cnt_27^post5, Result_4^0'=Result_4^post5, lt_18^0'=lt_18^post5, lt_12^0'=lt_12^post5, Dc_6^0'=Dc_6^post5, ct_15^0'=ct_15^post5, ___retres1_10^0'=___retres1_10^post5, lt_14^0'=lt_14^post5, MaximumInterfaceType_9^0'=MaximumInterfaceType_9^post5, lt_17^0'=lt_17^post5, fdoExtension_7^0'=fdoExtension_7^post5, cnt_32^0'=cnt_32^post5, (0 == 0 /\ lt_13^0-lt_13^post5 == 0 /\ ___cil_tmp2_11^0-___cil_tmp2_11^post5 == 0 /\ -cnt_32^post5+cnt_32^0 == 0 /\ lt_16^110-cnt_27^0 == 0 /\ -___retres1_10^post5+___retres1_10^0 == 0 /\ -InterfaceType_5^post5+InterfaceType_5^0 == 0 /\ -MaximumInterfaceType_9^post5+MaximumInterfaceType_9^0 == 0 /\ Result_4^0-Result_4^post5 == 0 /\ lt_14^110 <= 0 /\ -cnt_27^0+lt_17^110 == 0 /\ -lt_12^post5+lt_12^0 == 0 /\ lt_18^110-cnt_32^0 == 0 /\ -fdoExtension_7^post5+fdoExtension_7^0 == 0 /\ -ct_49^0+lt_14^110 == 0 /\ 1+lt_17^110-lt_18^110 <= 0 /\ cnt_27^0-cnt_27^post5 == 0 /\ ntStatus_8^0-ntStatus_8^post5 == 0 /\ ct_49^0-ct_49^post5 == 0 /\ Dc_6^0-Dc_6^post5 == 0), cost: 1
   7: l1 -> l6 : ___cil_tmp2_11^0'=___cil_tmp2_11^post7, ntStatus_8^0'=ntStatus_8^post7, lt_13^0'=lt_13^post7, InterfaceType_5^0'=InterfaceType_5^post7, lt_16^0'=lt_16^post7, ct_49^0'=ct_49^post7, cnt_27^0'=cnt_27^post7, Result_4^0'=Result_4^post7, lt_18^0'=lt_18^post7, lt_12^0'=lt_12^post7, Dc_6^0'=Dc_6^post7, ct_15^0'=ct_15^post7, ___retres1_10^0'=___retres1_10^post7, lt_14^0'=lt_14^post7, MaximumInterfaceType_9^0'=MaximumInterfaceType_9^post7, lt_17^0'=lt_17^post7, fdoExtension_7^0'=fdoExtension_7^post7, cnt_32^0'=cnt_32^post7, (0 == 0 /\ 1-lt_14^120 <= 0 /\ ntStatus_8^0-ntStatus_8^post7 == 0 /\ lt_12^0-lt_12^post7 == 0 /\ -Result_4^post7+Result_4^0 == 0 /\ -256+lt_13^10 <= 0 /\ 256-lt_13^10 <= 0 /\ -fdoExtension_7^post7+fdoExtension_7^0 == 0 /\ ___cil_tmp2_11^0-___cil_tmp2_11^post7 == 0 /\ -___retres1_10^post7+___retres1_10^0 == 0 /\ lt_18^120-cnt_32^0 == 0 /\ -cnt_32^post7+cnt_32^0 == 0 /\ 1-lt_18^120+lt_17^120 <= 0 /\ lt_13^10-ct_49^0 == 0 /\ -cnt_27^0+lt_17^120 == 0 /\ -ct_49^0+lt_14^120 == 0 /\ InterfaceType_5^0-InterfaceType_5^post7 == 0 /\ -Dc_6^post7+Dc_6^0 == 0 /\ cnt_27^0-cnt_27^post7 == 0 /\ -MaximumInterfaceType_9^post7+MaximumInterfaceType_9^0 == 0 /\ -ct_49^post7+ct_49^0 == 0 /\ -cnt_27^0+lt_16^120 == 0), cost: 1
   9: l1 -> l7 : ___cil_tmp2_11^0'=___cil_tmp2_11^post9, ntStatus_8^0'=ntStatus_8^post9, lt_13^0'=lt_13^post9, InterfaceType_5^0'=InterfaceType_5^post9, lt_16^0'=lt_16^post9, ct_49^0'=ct_49^post9, cnt_27^0'=cnt_27^post9, Result_4^0'=Result_4^post9, lt_18^0'=lt_18^post9, lt_12^0'=lt_12^post9, Dc_6^0'=Dc_6^post9, ct_15^0'=ct_15^post9, ___retres1_10^0'=___retres1_10^post9, lt_14^0'=lt_14^post9, MaximumInterfaceType_9^0'=MaximumInterfaceType_9^post9, lt_17^0'=lt_17^post9, fdoExtension_7^0'=fdoExtension_7^post9, cnt_32^0'=cnt_32^post9, (0 == 0 /\ Result_4^post9-___cil_tmp2_11^post9 == 0 /\ -fdoExtension_7^post9+fdoExtension_7^0 == 0 /\ -Dc_6^post9+Dc_6^0 == 0 /\ lt_18^130-cnt_32^0 == 0 /\ ___retres1_10^post9 == 0 /\ ct_15^0-ct_15^post9 == 0 /\ ntStatus_8^0-ntStatus_8^post9 == 0 /\ InterfaceType_5^0-InterfaceType_5^post9 == 0 /\ lt_16^0-lt_16^post9 == 0 /\ -cnt_27^0+lt_17^121 == 0 /\ -cnt_27^post9+cnt_27^0 == 0 /\ lt_12^0-lt_12^post9 == 0 /\ lt_13^0-lt_13^post9 == 0 /\ -lt_14^post9+lt_14^0 == 0 /\ -___retres1_10^post9+___cil_tmp2_11^post9 == 0 /\ -MaximumInterfaceType_9^post9+MaximumInterfaceType_9^0 == 0 /\ ct_49^0-ct_49^post9 == 0 /\ -cnt_32^post9+cnt_32^0 == 0 /\ lt_18^130-lt_17^121 <= 0), cost: 1
   2: l3 -> l4 : ___cil_tmp2_11^0'=___cil_tmp2_11^post2, ntStatus_8^0'=ntStatus_8^post2, lt_13^0'=lt_13^post2, InterfaceType_5^0'=InterfaceType_5^post2, lt_16^0'=lt_16^post2, ct_49^0'=ct_49^post2, cnt_27^0'=cnt_27^post2, Result_4^0'=Result_4^post2, lt_18^0'=lt_18^post2, lt_12^0'=lt_12^post2, Dc_6^0'=Dc_6^post2, ct_15^0'=ct_15^post2, ___retres1_10^0'=___retres1_10^post2, lt_14^0'=lt_14^post2, MaximumInterfaceType_9^0'=MaximumInterfaceType_9^post2, lt_17^0'=lt_17^post2, fdoExtension_7^0'=fdoExtension_7^post2, cnt_32^0'=cnt_32^post2, (-lt_14^post2+lt_14^0 == 0 /\ Dc_6^0-Dc_6^post2 == 0 /\ -ct_15^post2+ct_15^0 == 0 /\ -cnt_32^post2+cnt_32^0 == 0 /\ -MaximumInterfaceType_9^post2+MaximumInterfaceType_9^0 == 0 /\ cnt_27^0-cnt_27^post2 == 0 /\ -fdoExtension_7^post2+fdoExtension_7^0 == 0 /\ InterfaceType_5^0-InterfaceType_5^post2 == 0 /\ ___cil_tmp2_11^0-___cil_tmp2_11^post2 == 0 /\ lt_12^0-lt_12^post2 == 0 /\ lt_13^0-lt_13^post2 == 0 /\ ___retres1_10^0-___retres1_10^post2 == 0 /\ -lt_16^post2+lt_16^0 == 0 /\ ct_49^0-ct_49^post2 == 0 /\ -lt_18^post2+lt_18^0 == 0 /\ ntStatus_8^0-ntStatus_8^post2 == 0 /\ -lt_17^post2+lt_17^0 == 0 /\ -255+lt_13^0 <= 0 /\ Result_4^0-Result_4^post2 == 0), cost: 1
   3: l3 -> l4 : ___cil_tmp2_11^0'=___cil_tmp2_11^post3, ntStatus_8^0'=ntStatus_8^post3, lt_13^0'=lt_13^post3, InterfaceType_5^0'=InterfaceType_5^post3, lt_16^0'=lt_16^post3, ct_49^0'=ct_49^post3, cnt_27^0'=cnt_27^post3, Result_4^0'=Result_4^post3, lt_18^0'=lt_18^post3, lt_12^0'=lt_12^post3, Dc_6^0'=Dc_6^post3, ct_15^0'=ct_15^post3, ___retres1_10^0'=___retres1_10^post3, lt_14^0'=lt_14^post3, MaximumInterfaceType_9^0'=MaximumInterfaceType_9^post3, lt_17^0'=lt_17^post3, fdoExtension_7^0'=fdoExtension_7^post3, cnt_32^0'=cnt_32^post3, (lt_16^0-lt_16^post3 == 0 /\ 257-lt_13^0 <= 0 /\ Result_4^0-Result_4^post3 == 0 /\ -cnt_27^post3+cnt_27^0 == 0 /\ lt_17^0-lt_17^post3 == 0 /\ ntStatus_8^0-ntStatus_8^post3 == 0 /\ -___retres1_10^post3+___retres1_10^0 == 0 /\ -ct_15^post3+ct_15^0 == 0 /\ -fdoExtension_7^post3+fdoExtension_7^0 == 0 /\ InterfaceType_5^0-InterfaceType_5^post3 == 0 /\ ct_49^0-ct_49^post3 == 0 /\ lt_13^0-lt_13^post3 == 0 /\ lt_18^0-lt_18^post3 == 0 /\ ___cil_tmp2_11^0-___cil_tmp2_11^post3 == 0 /\ -lt_12^post3+lt_12^0 == 0 /\ -MaximumInterfaceType_9^post3+MaximumInterfaceType_9^0 == 0 /\ lt_14^0-lt_14^post3 == 0 /\ -Dc_6^post3+Dc_6^0 == 0 /\ -cnt_32^post3+cnt_32^0 == 0), cost: 1
   4: l4 -> l2 : ___cil_tmp2_11^0'=___cil_tmp2_11^post4, ntStatus_8^0'=ntStatus_8^post4, lt_13^0'=lt_13^post4, InterfaceType_5^0'=InterfaceType_5^post4, lt_16^0'=lt_16^post4, ct_49^0'=ct_49^post4, cnt_27^0'=cnt_27^post4, Result_4^0'=Result_4^post4, lt_18^0'=lt_18^post4, lt_12^0'=lt_12^post4, Dc_6^0'=Dc_6^post4, ct_15^0'=ct_15^post4, ___retres1_10^0'=___retres1_10^post4, lt_14^0'=lt_14^post4, MaximumInterfaceType_9^0'=MaximumInterfaceType_9^post4, lt_17^0'=lt_17^post4, fdoExtension_7^0'=fdoExtension_7^post4, cnt_32^0'=cnt_32^post4, (0 == 0 /\ -lt_12^10+___retres1_10^post4 == 0 /\ -___cil_tmp2_11^post4+Result_4^post4 == 0 /\ lt_16^0-lt_16^post4 == 0 /\ fdoExtension_7^0-fdoExtension_7^post4 == 0 /\ -lt_17^post4+lt_17^0 == 0 /\ -cnt_32^post4+cnt_32^0 == 0 /\ -MaximumInterfaceType_9^post4+MaximumInterfaceType_9^0 == 0 /\ ntStatus_8^0-ntStatus_8^post4 == 0 /\ -cnt_27^post4+cnt_27^0 == 0 /\ -ct_49^post4+ct_49^0 == 0 /\ ct_15^0-ct_15^post4 == 0 /\ lt_18^0-lt_18^post4 == 0 /\ -ct_49^0+lt_12^10 == 0 /\ -Dc_6^post4+Dc_6^0 == 0 /\ InterfaceType_5^0-InterfaceType_5^post4 == 0 /\ ___cil_tmp2_11^post4-___retres1_10^post4 == 0 /\ -lt_14^post4+lt_14^0 == 0), cost: 1
   6: l5 -> l1 : ___cil_tmp2_11^0'=___cil_tmp2_11^post6, ntStatus_8^0'=ntStatus_8^post6, lt_13^0'=lt_13^post6, InterfaceType_5^0'=InterfaceType_5^post6, lt_16^0'=lt_16^post6, ct_49^0'=ct_49^post6, cnt_27^0'=cnt_27^post6, Result_4^0'=Result_4^post6, lt_18^0'=lt_18^post6, lt_12^0'=lt_12^post6, Dc_6^0'=Dc_6^post6, ct_15^0'=ct_15^post6, ___retres1_10^0'=___retres1_10^post6, lt_14^0'=lt_14^post6, MaximumInterfaceType_9^0'=MaximumInterfaceType_9^post6, lt_17^0'=lt_17^post6, fdoExtension_7^0'=fdoExtension_7^post6, cnt_32^0'=cnt_32^post6, (-Result_4^post6+Result_4^0 == 0 /\ -lt_18^post6+lt_18^0 == 0 /\ -lt_17^post6+lt_17^0 == 0 /\ -ct_15^post6+ct_15^0 == 0 /\ ___cil_tmp2_11^0-___cil_tmp2_11^post6 == 0 /\ lt_12^0-lt_12^post6 == 0 /\ -lt_14^post6+lt_14^0 == 0 /\ ___retres1_10^0-___retres1_10^post6 == 0 /\ -cnt_32^post6+cnt_32^0 == 0 /\ Dc_6^0-Dc_6^post6 == 0 /\ cnt_27^0-cnt_27^post6 == 0 /\ -MaximumInterfaceType_9^post6+MaximumInterfaceType_9^0 == 0 /\ ntStatus_8^0-ntStatus_8^post6 == 0 /\ ct_49^0-ct_49^post6 == 0 /\ InterfaceType_5^0-InterfaceType_5^post6 == 0 /\ lt_13^0-lt_13^post6 == 0 /\ -fdoExtension_7^post6+fdoExtension_7^0 == 0 /\ -lt_16^post6+lt_16^0 == 0), cost: 1
   8: l6 -> l1 : ___cil_tmp2_11^0'=___cil_tmp2_11^post8, ntStatus_8^0'=ntStatus_8^post8, lt_13^0'=lt_13^post8, InterfaceType_5^0'=InterfaceType_5^post8, lt_16^0'=lt_16^post8, ct_49^0'=ct_49^post8, cnt_27^0'=cnt_27^post8, Result_4^0'=Result_4^post8, lt_18^0'=lt_18^post8, lt_12^0'=lt_12^post8, Dc_6^0'=Dc_6^post8, ct_15^0'=ct_15^post8, ___retres1_10^0'=___retres1_10^post8, lt_14^0'=lt_14^post8, MaximumInterfaceType_9^0'=MaximumInterfaceType_9^post8, lt_17^0'=lt_17^post8, fdoExtension_7^0'=fdoExtension_7^post8, cnt_32^0'=cnt_32^post8, (InterfaceType_5^0-InterfaceType_5^post8 == 0 /\ cnt_27^0-cnt_27^post8 == 0 /\ -ct_15^post8+ct_15^0 == 0 /\ ntStatus_8^0-ntStatus_8^post8 == 0 /\ ___cil_tmp2_11^0-___cil_tmp2_11^post8 == 0 /\ -MaximumInterfaceType_9^post8+MaximumInterfaceType_9^0 == 0 /\ Dc_6^0-Dc_6^post8 == 0 /\ lt_13^0-lt_13^post8 == 0 /\ -ct_49^post8+ct_49^0 == 0 /\ Result_4^0-Result_4^post8 == 0 /\ ___retres1_10^0-___retres1_10^post8 == 0 /\ -cnt_32^post8+cnt_32^0 == 0 /\ lt_16^0-lt_16^post8 == 0 /\ -fdoExtension_7^post8+fdoExtension_7^0 == 0 /\ -lt_18^post8+lt_18^0 == 0 /\ -lt_17^post8+lt_17^0 == 0 /\ -lt_14^post8+lt_14^0 == 0 /\ -lt_12^post8+lt_12^0 == 0), cost: 1
  10: l8 -> l0 : ___cil_tmp2_11^0'=___cil_tmp2_11^post10, ntStatus_8^0'=ntStatus_8^post10, lt_13^0'=lt_13^post10, InterfaceType_5^0'=InterfaceType_5^post10, lt_16^0'=lt_16^post10, ct_49^0'=ct_49^post10, cnt_27^0'=cnt_27^post10, Result_4^0'=Result_4^post10, lt_18^0'=lt_18^post10, lt_12^0'=lt_12^post10, Dc_6^0'=Dc_6^post10, ct_15^0'=ct_15^post10, ___retres1_10^0'=___retres1_10^post10, lt_14^0'=lt_14^post10, MaximumInterfaceType_9^0'=MaximumInterfaceType_9^post10, lt_17^0'=lt_17^post10, fdoExtension_7^0'=fdoExtension_7^post10, cnt_32^0'=cnt_32^post10, (___cil_tmp2_11^0-___cil_tmp2_11^post10 == 0 /\ lt_13^0-lt_13^post10 == 0 /\ -lt_18^post10+lt_18^0 == 0 /\ -lt_14^post10+lt_14^0 == 0 /\ cnt_27^0-cnt_27^post10 == 0 /\ lt_12^0-lt_12^post10 == 0 /\ -fdoExtension_7^post10+fdoExtension_7^0 == 0 /\ Dc_6^0-Dc_6^post10 == 0 /\ InterfaceType_5^0-InterfaceType_5^post10 == 0 /\ ct_49^0-ct_49^post10 == 0 /\ ___retres1_10^0-___retres1_10^post10 == 0 /\ -lt_17^post10+lt_17^0 == 0 /\ lt_16^0-lt_16^post10 == 0 /\ -ct_15^post10+ct_15^0 == 0 /\ -cnt_32^post10+cnt_32^0 == 0 /\ Result_4^0-Result_4^post10 == 0 /\ -MaximumInterfaceType_9^post10+MaximumInterfaceType_9^0 == 0 /\ -ntStatus_8^post10+ntStatus_8^0 == 0), cost: 1


Removed unreachable rules and leafs
Start location: l8
   0: l0 -> l1 : ___cil_tmp2_11^0'=___cil_tmp2_11^post0, ntStatus_8^0'=ntStatus_8^post0, lt_13^0'=lt_13^post0, InterfaceType_5^0'=InterfaceType_5^post0, lt_16^0'=lt_16^post0, ct_49^0'=ct_49^post0, cnt_27^0'=cnt_27^post0, Result_4^0'=Result_4^post0, lt_18^0'=lt_18^post0, lt_12^0'=lt_12^post0, Dc_6^0'=Dc_6^post0, ct_15^0'=ct_15^post0, ___retres1_10^0'=___retres1_10^post0, lt_14^0'=lt_14^post0, MaximumInterfaceType_9^0'=MaximumInterfaceType_9^post0, lt_17^0'=lt_17^post0, fdoExtension_7^0'=fdoExtension_7^post0, cnt_32^0'=cnt_32^post0, (0 == 0 /\ lt_18^0-lt_18^post0 == 0 /\ -lt_14^post0+lt_14^0 == 0 /\ ct_15^0-ct_15^post0 == 0 /\ -lt_12^post0+lt_12^0 == 0 /\ lt_13^0-lt_13^post0 == 0 /\ -cnt_32^post0+cnt_32^0 == 0 /\ -cnt_27^post0+cnt_27^0 == 0 /\ lt_17^0-lt_17^post0 == 0 /\ -___retres1_10^post0+___retres1_10^0 == 0 /\ -Result_4^post0+Result_4^0 == 0 /\ lt_16^0-lt_16^post0 == 0 /\ ___cil_tmp2_11^0-___cil_tmp2_11^post0 == 0 /\ ct_49^0-ct_49^post0 == 0), cost: 1
   5: l1 -> l5 : ___cil_tmp2_11^0'=___cil_tmp2_11^post5, ntStatus_8^0'=ntStatus_8^post5, lt_13^0'=lt_13^post5, InterfaceType_5^0'=InterfaceType_5^post5, lt_16^0'=lt_16^post5, ct_49^0'=ct_49^post5, cnt_27^0'=cnt_27^post5, Result_4^0'=Result_4^post5, lt_18^0'=lt_18^post5, lt_12^0'=lt_12^post5, Dc_6^0'=Dc_6^post5, ct_15^0'=ct_15^post5, ___retres1_10^0'=___retres1_10^post5, lt_14^0'=lt_14^post5, MaximumInterfaceType_9^0'=MaximumInterfaceType_9^post5, lt_17^0'=lt_17^post5, fdoExtension_7^0'=fdoExtension_7^post5, cnt_32^0'=cnt_32^post5, (0 == 0 /\ lt_13^0-lt_13^post5 == 0 /\ ___cil_tmp2_11^0-___cil_tmp2_11^post5 == 0 /\ -cnt_32^post5+cnt_32^0 == 0 /\ lt_16^110-cnt_27^0 == 0 /\ -___retres1_10^post5+___retres1_10^0 == 0 /\ -InterfaceType_5^post5+InterfaceType_5^0 == 0 /\ -MaximumInterfaceType_9^post5+MaximumInterfaceType_9^0 == 0 /\ Result_4^0-Result_4^post5 == 0 /\ lt_14^110 <= 0 /\ -cnt_27^0+lt_17^110 == 0 /\ -lt_12^post5+lt_12^0 == 0 /\ lt_18^110-cnt_32^0 == 0 /\ -fdoExtension_7^post5+fdoExtension_7^0 == 0 /\ -ct_49^0+lt_14^110 == 0 /\ 1+lt_17^110-lt_18^110 <= 0 /\ cnt_27^0-cnt_27^post5 == 0 /\ ntStatus_8^0-ntStatus_8^post5 == 0 /\ ct_49^0-ct_49^post5 == 0 /\ Dc_6^0-Dc_6^post5 == 0), cost: 1
   7: l1 -> l6 : ___cil_tmp2_11^0'=___cil_tmp2_11^post7, ntStatus_8^0'=ntStatus_8^post7, lt_13^0'=lt_13^post7, InterfaceType_5^0'=InterfaceType_5^post7, lt_16^0'=lt_16^post7, ct_49^0'=ct_49^post7, cnt_27^0'=cnt_27^post7, Result_4^0'=Result_4^post7, lt_18^0'=lt_18^post7, lt_12^0'=lt_12^post7, Dc_6^0'=Dc_6^post7, ct_15^0'=ct_15^post7, ___retres1_10^0'=___retres1_10^post7, lt_14^0'=lt_14^post7, MaximumInterfaceType_9^0'=MaximumInterfaceType_9^post7, lt_17^0'=lt_17^post7, fdoExtension_7^0'=fdoExtension_7^post7, cnt_32^0'=cnt_32^post7, (0 == 0 /\ 1-lt_14^120 <= 0 /\ ntStatus_8^0-ntStatus_8^post7 == 0 /\ lt_12^0-lt_12^post7 == 0 /\ -Result_4^post7+Result_4^0 == 0 /\ -256+lt_13^10 <= 0 /\ 256-lt_13^10 <= 0 /\ -fdoExtension_7^post7+fdoExtension_7^0 == 0 /\ ___cil_tmp2_11^0-___cil_tmp2_11^post7 == 0 /\ -___retres1_10^post7+___retres1_10^0 == 0 /\ lt_18^120-cnt_32^0 == 0 /\ -cnt_32^post7+cnt_32^0 == 0 /\ 1-lt_18^120+lt_17^120 <= 0 /\ lt_13^10-ct_49^0 == 0 /\ -cnt_27^0+lt_17^120 == 0 /\ -ct_49^0+lt_14^120 == 0 /\ InterfaceType_5^0-InterfaceType_5^post7 == 0 /\ -Dc_6^post7+Dc_6^0 == 0 /\ cnt_27^0-cnt_27^post7 == 0 /\ -MaximumInterfaceType_9^post7+MaximumInterfaceType_9^0 == 0 /\ -ct_49^post7+ct_49^0 == 0 /\ -cnt_27^0+lt_16^120 == 0), cost: 1
   6: l5 -> l1 : ___cil_tmp2_11^0'=___cil_tmp2_11^post6, ntStatus_8^0'=ntStatus_8^post6, lt_13^0'=lt_13^post6, InterfaceType_5^0'=InterfaceType_5^post6, lt_16^0'=lt_16^post6, ct_49^0'=ct_49^post6, cnt_27^0'=cnt_27^post6, Result_4^0'=Result_4^post6, lt_18^0'=lt_18^post6, lt_12^0'=lt_12^post6, Dc_6^0'=Dc_6^post6, ct_15^0'=ct_15^post6, ___retres1_10^0'=___retres1_10^post6, lt_14^0'=lt_14^post6, MaximumInterfaceType_9^0'=MaximumInterfaceType_9^post6, lt_17^0'=lt_17^post6, fdoExtension_7^0'=fdoExtension_7^post6, cnt_32^0'=cnt_32^post6, (-Result_4^post6+Result_4^0 == 0 /\ -lt_18^post6+lt_18^0 == 0 /\ -lt_17^post6+lt_17^0 == 0 /\ -ct_15^post6+ct_15^0 == 0 /\ ___cil_tmp2_11^0-___cil_tmp2_11^post6 == 0 /\ lt_12^0-lt_12^post6 == 0 /\ -lt_14^post6+lt_14^0 == 0 /\ ___retres1_10^0-___retres1_10^post6 == 0 /\ -cnt_32^post6+cnt_32^0 == 0 /\ Dc_6^0-Dc_6^post6 == 0 /\ cnt_27^0-cnt_27^post6 == 0 /\ -MaximumInterfaceType_9^post6+MaximumInterfaceType_9^0 == 0 /\ ntStatus_8^0-ntStatus_8^post6 == 0 /\ ct_49^0-ct_49^post6 == 0 /\ InterfaceType_5^0-InterfaceType_5^post6 == 0 /\ lt_13^0-lt_13^post6 == 0 /\ -fdoExtension_7^post6+fdoExtension_7^0 == 0 /\ -lt_16^post6+lt_16^0 == 0), cost: 1
   8: l6 -> l1 : ___cil_tmp2_11^0'=___cil_tmp2_11^post8, ntStatus_8^0'=ntStatus_8^post8, lt_13^0'=lt_13^post8, InterfaceType_5^0'=InterfaceType_5^post8, lt_16^0'=lt_16^post8, ct_49^0'=ct_49^post8, cnt_27^0'=cnt_27^post8, Result_4^0'=Result_4^post8, lt_18^0'=lt_18^post8, lt_12^0'=lt_12^post8, Dc_6^0'=Dc_6^post8, ct_15^0'=ct_15^post8, ___retres1_10^0'=___retres1_10^post8, lt_14^0'=lt_14^post8, MaximumInterfaceType_9^0'=MaximumInterfaceType_9^post8, lt_17^0'=lt_17^post8, fdoExtension_7^0'=fdoExtension_7^post8, cnt_32^0'=cnt_32^post8, (InterfaceType_5^0-InterfaceType_5^post8 == 0 /\ cnt_27^0-cnt_27^post8 == 0 /\ -ct_15^post8+ct_15^0 == 0 /\ ntStatus_8^0-ntStatus_8^post8 == 0 /\ ___cil_tmp2_11^0-___cil_tmp2_11^post8 == 0 /\ -MaximumInterfaceType_9^post8+MaximumInterfaceType_9^0 == 0 /\ Dc_6^0-Dc_6^post8 == 0 /\ lt_13^0-lt_13^post8 == 0 /\ -ct_49^post8+ct_49^0 == 0 /\ Result_4^0-Result_4^post8 == 0 /\ ___retres1_10^0-___retres1_10^post8 == 0 /\ -cnt_32^post8+cnt_32^0 == 0 /\ lt_16^0-lt_16^post8 == 0 /\ -fdoExtension_7^post8+fdoExtension_7^0 == 0 /\ -lt_18^post8+lt_18^0 == 0 /\ -lt_17^post8+lt_17^0 == 0 /\ -lt_14^post8+lt_14^0 == 0 /\ -lt_12^post8+lt_12^0 == 0), cost: 1
  10: l8 -> l0 : ___cil_tmp2_11^0'=___cil_tmp2_11^post10, ntStatus_8^0'=ntStatus_8^post10, lt_13^0'=lt_13^post10, InterfaceType_5^0'=InterfaceType_5^post10, lt_16^0'=lt_16^post10, ct_49^0'=ct_49^post10, cnt_27^0'=cnt_27^post10, Result_4^0'=Result_4^post10, lt_18^0'=lt_18^post10, lt_12^0'=lt_12^post10, Dc_6^0'=Dc_6^post10, ct_15^0'=ct_15^post10, ___retres1_10^0'=___retres1_10^post10, lt_14^0'=lt_14^post10, MaximumInterfaceType_9^0'=MaximumInterfaceType_9^post10, lt_17^0'=lt_17^post10, fdoExtension_7^0'=fdoExtension_7^post10, cnt_32^0'=cnt_32^post10, (___cil_tmp2_11^0-___cil_tmp2_11^post10 == 0 /\ lt_13^0-lt_13^post10 == 0 /\ -lt_18^post10+lt_18^0 == 0 /\ -lt_14^post10+lt_14^0 == 0 /\ cnt_27^0-cnt_27^post10 == 0 /\ lt_12^0-lt_12^post10 == 0 /\ -fdoExtension_7^post10+fdoExtension_7^0 == 0 /\ Dc_6^0-Dc_6^post10 == 0 /\ InterfaceType_5^0-InterfaceType_5^post10 == 0 /\ ct_49^0-ct_49^post10 == 0 /\ ___retres1_10^0-___retres1_10^post10 == 0 /\ -lt_17^post10+lt_17^0 == 0 /\ lt_16^0-lt_16^post10 == 0 /\ -ct_15^post10+ct_15^0 == 0 /\ -cnt_32^post10+cnt_32^0 == 0 /\ Result_4^0-Result_4^post10 == 0 /\ -MaximumInterfaceType_9^post10+MaximumInterfaceType_9^0 == 0 /\ -ntStatus_8^post10+ntStatus_8^0 == 0), cost: 1


Applied preprocessing
Original rule:
l0 -> l1 : ___cil_tmp2_11^0'=___cil_tmp2_11^post0, ntStatus_8^0'=ntStatus_8^post0, lt_13^0'=lt_13^post0, InterfaceType_5^0'=InterfaceType_5^post0, lt_16^0'=lt_16^post0, ct_49^0'=ct_49^post0, cnt_27^0'=cnt_27^post0, Result_4^0'=Result_4^post0, lt_18^0'=lt_18^post0, lt_12^0'=lt_12^post0, Dc_6^0'=Dc_6^post0, ct_15^0'=ct_15^post0, ___retres1_10^0'=___retres1_10^post0, lt_14^0'=lt_14^post0, MaximumInterfaceType_9^0'=MaximumInterfaceType_9^post0, lt_17^0'=lt_17^post0, fdoExtension_7^0'=fdoExtension_7^post0, cnt_32^0'=cnt_32^post0, (0 == 0 /\ lt_18^0-lt_18^post0 == 0 /\ -lt_14^post0+lt_14^0 == 0 /\ ct_15^0-ct_15^post0 == 0 /\ -lt_12^post0+lt_12^0 == 0 /\ lt_13^0-lt_13^post0 == 0 /\ -cnt_32^post0+cnt_32^0 == 0 /\ -cnt_27^post0+cnt_27^0 == 0 /\ lt_17^0-lt_17^post0 == 0 /\ -___retres1_10^post0+___retres1_10^0 == 0 /\ -Result_4^post0+Result_4^0 == 0 /\ lt_16^0-lt_16^post0 == 0 /\ ___cil_tmp2_11^0-___cil_tmp2_11^post0 == 0 /\ ct_49^0-ct_49^post0 == 0), cost: 1
New rule:
l0 -> l1 : ntStatus_8^0'=ntStatus_8^post0, InterfaceType_5^0'=InterfaceType_5^post0, Dc_6^0'=Dc_6^post0, MaximumInterfaceType_9^0'=MaximumInterfaceType_9^post0, fdoExtension_7^0'=fdoExtension_7^post0, 0 == 0, cost: 1

Applied preprocessing
Original rule:
l1 -> l5 : ___cil_tmp2_11^0'=___cil_tmp2_11^post5, ntStatus_8^0'=ntStatus_8^post5, lt_13^0'=lt_13^post5, InterfaceType_5^0'=InterfaceType_5^post5, lt_16^0'=lt_16^post5, ct_49^0'=ct_49^post5, cnt_27^0'=cnt_27^post5, Result_4^0'=Result_4^post5, lt_18^0'=lt_18^post5, lt_12^0'=lt_12^post5, Dc_6^0'=Dc_6^post5, ct_15^0'=ct_15^post5, ___retres1_10^0'=___retres1_10^post5, lt_14^0'=lt_14^post5, MaximumInterfaceType_9^0'=MaximumInterfaceType_9^post5, lt_17^0'=lt_17^post5, fdoExtension_7^0'=fdoExtension_7^post5, cnt_32^0'=cnt_32^post5, (0 == 0 /\ lt_13^0-lt_13^post5 == 0 /\ ___cil_tmp2_11^0-___cil_tmp2_11^post5 == 0 /\ -cnt_32^post5+cnt_32^0 == 0 /\ lt_16^110-cnt_27^0 == 0 /\ -___retres1_10^post5+___retres1_10^0 == 0 /\ -InterfaceType_5^post5+InterfaceType_5^0 == 0 /\ -MaximumInterfaceType_9^post5+MaximumInterfaceType_9^0 == 0 /\ Result_4^0-Result_4^post5 == 0 /\ lt_14^110 <= 0 /\ -cnt_27^0+lt_17^110 == 0 /\ -lt_12^post5+lt_12^0 == 0 /\ lt_18^110-cnt_32^0 == 0 /\ -fdoExtension_7^post5+fdoExtension_7^0 == 0 /\ -ct_49^0+lt_14^110 == 0 /\ 1+lt_17^110-lt_18^110 <= 0 /\ cnt_27^0-cnt_27^post5 == 0 /\ ntStatus_8^0-ntStatus_8^post5 == 0 /\ ct_49^0-ct_49^post5 == 0 /\ Dc_6^0-Dc_6^post5 == 0), cost: 1
New rule:
l1 -> l5 : lt_16^0'=lt_16^post5, lt_18^0'=lt_18^post5, ct_15^0'=ct_15^post5, lt_14^0'=lt_14^post5, lt_17^0'=lt_17^post5, (ct_49^0 <= 0 /\ 1+cnt_27^0-cnt_32^0 <= 0), cost: 1

Applied preprocessing
Original rule:
l5 -> l1 : ___cil_tmp2_11^0'=___cil_tmp2_11^post6, ntStatus_8^0'=ntStatus_8^post6, lt_13^0'=lt_13^post6, InterfaceType_5^0'=InterfaceType_5^post6, lt_16^0'=lt_16^post6, ct_49^0'=ct_49^post6, cnt_27^0'=cnt_27^post6, Result_4^0'=Result_4^post6, lt_18^0'=lt_18^post6, lt_12^0'=lt_12^post6, Dc_6^0'=Dc_6^post6, ct_15^0'=ct_15^post6, ___retres1_10^0'=___retres1_10^post6, lt_14^0'=lt_14^post6, MaximumInterfaceType_9^0'=MaximumInterfaceType_9^post6, lt_17^0'=lt_17^post6, fdoExtension_7^0'=fdoExtension_7^post6, cnt_32^0'=cnt_32^post6, (-Result_4^post6+Result_4^0 == 0 /\ -lt_18^post6+lt_18^0 == 0 /\ -lt_17^post6+lt_17^0 == 0 /\ -ct_15^post6+ct_15^0 == 0 /\ ___cil_tmp2_11^0-___cil_tmp2_11^post6 == 0 /\ lt_12^0-lt_12^post6 == 0 /\ -lt_14^post6+lt_14^0 == 0 /\ ___retres1_10^0-___retres1_10^post6 == 0 /\ -cnt_32^post6+cnt_32^0 == 0 /\ Dc_6^0-Dc_6^post6 == 0 /\ cnt_27^0-cnt_27^post6 == 0 /\ -MaximumInterfaceType_9^post6+MaximumInterfaceType_9^0 == 0 /\ ntStatus_8^0-ntStatus_8^post6 == 0 /\ ct_49^0-ct_49^post6 == 0 /\ InterfaceType_5^0-InterfaceType_5^post6 == 0 /\ lt_13^0-lt_13^post6 == 0 /\ -fdoExtension_7^post6+fdoExtension_7^0 == 0 /\ -lt_16^post6+lt_16^0 == 0), cost: 1
New rule:
l5 -> l1 : TRUE, cost: 1

Applied preprocessing
Original rule:
l1 -> l6 : ___cil_tmp2_11^0'=___cil_tmp2_11^post7, ntStatus_8^0'=ntStatus_8^post7, lt_13^0'=lt_13^post7, InterfaceType_5^0'=InterfaceType_5^post7, lt_16^0'=lt_16^post7, ct_49^0'=ct_49^post7, cnt_27^0'=cnt_27^post7, Result_4^0'=Result_4^post7, lt_18^0'=lt_18^post7, lt_12^0'=lt_12^post7, Dc_6^0'=Dc_6^post7, ct_15^0'=ct_15^post7, ___retres1_10^0'=___retres1_10^post7, lt_14^0'=lt_14^post7, MaximumInterfaceType_9^0'=MaximumInterfaceType_9^post7, lt_17^0'=lt_17^post7, fdoExtension_7^0'=fdoExtension_7^post7, cnt_32^0'=cnt_32^post7, (0 == 0 /\ 1-lt_14^120 <= 0 /\ ntStatus_8^0-ntStatus_8^post7 == 0 /\ lt_12^0-lt_12^post7 == 0 /\ -Result_4^post7+Result_4^0 == 0 /\ -256+lt_13^10 <= 0 /\ 256-lt_13^10 <= 0 /\ -fdoExtension_7^post7+fdoExtension_7^0 == 0 /\ ___cil_tmp2_11^0-___cil_tmp2_11^post7 == 0 /\ -___retres1_10^post7+___retres1_10^0 == 0 /\ lt_18^120-cnt_32^0 == 0 /\ -cnt_32^post7+cnt_32^0 == 0 /\ 1-lt_18^120+lt_17^120 <= 0 /\ lt_13^10-ct_49^0 == 0 /\ -cnt_27^0+lt_17^120 == 0 /\ -ct_49^0+lt_14^120 == 0 /\ InterfaceType_5^0-InterfaceType_5^post7 == 0 /\ -Dc_6^post7+Dc_6^0 == 0 /\ cnt_27^0-cnt_27^post7 == 0 /\ -MaximumInterfaceType_9^post7+MaximumInterfaceType_9^0 == 0 /\ -ct_49^post7+ct_49^0 == 0 /\ -cnt_27^0+lt_16^120 == 0), cost: 1
New rule:
l1 -> l6 : lt_13^0'=lt_13^post7, lt_16^0'=lt_16^post7, lt_18^0'=lt_18^post7, ct_15^0'=ct_15^post7, lt_14^0'=lt_14^post7, lt_17^0'=lt_17^post7, (-256+ct_49^0 == 0 /\ 1+cnt_27^0-cnt_32^0 <= 0), cost: 1

Applied preprocessing
Original rule:
l6 -> l1 : ___cil_tmp2_11^0'=___cil_tmp2_11^post8, ntStatus_8^0'=ntStatus_8^post8, lt_13^0'=lt_13^post8, InterfaceType_5^0'=InterfaceType_5^post8, lt_16^0'=lt_16^post8, ct_49^0'=ct_49^post8, cnt_27^0'=cnt_27^post8, Result_4^0'=Result_4^post8, lt_18^0'=lt_18^post8, lt_12^0'=lt_12^post8, Dc_6^0'=Dc_6^post8, ct_15^0'=ct_15^post8, ___retres1_10^0'=___retres1_10^post8, lt_14^0'=lt_14^post8, MaximumInterfaceType_9^0'=MaximumInterfaceType_9^post8, lt_17^0'=lt_17^post8, fdoExtension_7^0'=fdoExtension_7^post8, cnt_32^0'=cnt_32^post8, (InterfaceType_5^0-InterfaceType_5^post8 == 0 /\ cnt_27^0-cnt_27^post8 == 0 /\ -ct_15^post8+ct_15^0 == 0 /\ ntStatus_8^0-ntStatus_8^post8 == 0 /\ ___cil_tmp2_11^0-___cil_tmp2_11^post8 == 0 /\ -MaximumInterfaceType_9^post8+MaximumInterfaceType_9^0 == 0 /\ Dc_6^0-Dc_6^post8 == 0 /\ lt_13^0-lt_13^post8 == 0 /\ -ct_49^post8+ct_49^0 == 0 /\ Result_4^0-Result_4^post8 == 0 /\ ___retres1_10^0-___retres1_10^post8 == 0 /\ -cnt_32^post8+cnt_32^0 == 0 /\ lt_16^0-lt_16^post8 == 0 /\ -fdoExtension_7^post8+fdoExtension_7^0 == 0 /\ -lt_18^post8+lt_18^0 == 0 /\ -lt_17^post8+lt_17^0 == 0 /\ -lt_14^post8+lt_14^0 == 0 /\ -lt_12^post8+lt_12^0 == 0), cost: 1
New rule:
l6 -> l1 : TRUE, cost: 1

Applied preprocessing
Original rule:
l8 -> l0 : ___cil_tmp2_11^0'=___cil_tmp2_11^post10, ntStatus_8^0'=ntStatus_8^post10, lt_13^0'=lt_13^post10, InterfaceType_5^0'=InterfaceType_5^post10, lt_16^0'=lt_16^post10, ct_49^0'=ct_49^post10, cnt_27^0'=cnt_27^post10, Result_4^0'=Result_4^post10, lt_18^0'=lt_18^post10, lt_12^0'=lt_12^post10, Dc_6^0'=Dc_6^post10, ct_15^0'=ct_15^post10, ___retres1_10^0'=___retres1_10^post10, lt_14^0'=lt_14^post10, MaximumInterfaceType_9^0'=MaximumInterfaceType_9^post10, lt_17^0'=lt_17^post10, fdoExtension_7^0'=fdoExtension_7^post10, cnt_32^0'=cnt_32^post10, (___cil_tmp2_11^0-___cil_tmp2_11^post10 == 0 /\ lt_13^0-lt_13^post10 == 0 /\ -lt_18^post10+lt_18^0 == 0 /\ -lt_14^post10+lt_14^0 == 0 /\ cnt_27^0-cnt_27^post10 == 0 /\ lt_12^0-lt_12^post10 == 0 /\ -fdoExtension_7^post10+fdoExtension_7^0 == 0 /\ Dc_6^0-Dc_6^post10 == 0 /\ InterfaceType_5^0-InterfaceType_5^post10 == 0 /\ ct_49^0-ct_49^post10 == 0 /\ ___retres1_10^0-___retres1_10^post10 == 0 /\ -lt_17^post10+lt_17^0 == 0 /\ lt_16^0-lt_16^post10 == 0 /\ -ct_15^post10+ct_15^0 == 0 /\ -cnt_32^post10+cnt_32^0 == 0 /\ Result_4^0-Result_4^post10 == 0 /\ -MaximumInterfaceType_9^post10+MaximumInterfaceType_9^0 == 0 /\ -ntStatus_8^post10+ntStatus_8^0 == 0), cost: 1
New rule:
l8 -> l0 : TRUE, cost: 1

Simplified rules
Start location: l8
  11: l0 -> l1 : ntStatus_8^0'=ntStatus_8^post0, InterfaceType_5^0'=InterfaceType_5^post0, Dc_6^0'=Dc_6^post0, MaximumInterfaceType_9^0'=MaximumInterfaceType_9^post0, fdoExtension_7^0'=fdoExtension_7^post0, 0 == 0, cost: 1
  12: l1 -> l5 : lt_16^0'=lt_16^post5, lt_18^0'=lt_18^post5, ct_15^0'=ct_15^post5, lt_14^0'=lt_14^post5, lt_17^0'=lt_17^post5, (ct_49^0 <= 0 /\ 1+cnt_27^0-cnt_32^0 <= 0), cost: 1
  14: l1 -> l6 : lt_13^0'=lt_13^post7, lt_16^0'=lt_16^post7, lt_18^0'=lt_18^post7, ct_15^0'=ct_15^post7, lt_14^0'=lt_14^post7, lt_17^0'=lt_17^post7, (-256+ct_49^0 == 0 /\ 1+cnt_27^0-cnt_32^0 <= 0), cost: 1
  13: l5 -> l1 : TRUE, cost: 1
  15: l6 -> l1 : TRUE, cost: 1
  16: l8 -> l0 : TRUE, cost: 1


Eliminating location l0 by chaining:

Applied chaining
First rule:
l8 -> l0 : TRUE, cost: 1
Second rule:
l0 -> l1 : ntStatus_8^0'=ntStatus_8^post0, InterfaceType_5^0'=InterfaceType_5^post0, Dc_6^0'=Dc_6^post0, MaximumInterfaceType_9^0'=MaximumInterfaceType_9^post0, fdoExtension_7^0'=fdoExtension_7^post0, 0 == 0, cost: 1
New rule:
l8 -> l1 : ntStatus_8^0'=ntStatus_8^post0, InterfaceType_5^0'=InterfaceType_5^post0, Dc_6^0'=Dc_6^post0, MaximumInterfaceType_9^0'=MaximumInterfaceType_9^post0, fdoExtension_7^0'=fdoExtension_7^post0, 0 == 0, cost: 2

Applied deletion
Removed the following rules: 11 16

Eliminating location l5 by chaining:

Applied chaining
First rule:
l1 -> l5 : lt_16^0'=lt_16^post5, lt_18^0'=lt_18^post5, ct_15^0'=ct_15^post5, lt_14^0'=lt_14^post5, lt_17^0'=lt_17^post5, (ct_49^0 <= 0 /\ 1+cnt_27^0-cnt_32^0 <= 0), cost: 1
Second rule:
l5 -> l1 : TRUE, cost: 1
New rule:
l1 -> l1 : lt_16^0'=lt_16^post5, lt_18^0'=lt_18^post5, ct_15^0'=ct_15^post5, lt_14^0'=lt_14^post5, lt_17^0'=lt_17^post5, (ct_49^0 <= 0 /\ 1+cnt_27^0-cnt_32^0 <= 0), cost: 2

Applied deletion
Removed the following rules: 12 13

Eliminating location l6 by chaining:

Applied chaining
First rule:
l1 -> l6 : lt_13^0'=lt_13^post7, lt_16^0'=lt_16^post7, lt_18^0'=lt_18^post7, ct_15^0'=ct_15^post7, lt_14^0'=lt_14^post7, lt_17^0'=lt_17^post7, (-256+ct_49^0 == 0 /\ 1+cnt_27^0-cnt_32^0 <= 0), cost: 1
Second rule:
l6 -> l1 : TRUE, cost: 1
New rule:
l1 -> l1 : lt_13^0'=lt_13^post7, lt_16^0'=lt_16^post7, lt_18^0'=lt_18^post7, ct_15^0'=ct_15^post7, lt_14^0'=lt_14^post7, lt_17^0'=lt_17^post7, (-256+ct_49^0 == 0 /\ 1+cnt_27^0-cnt_32^0 <= 0), cost: 2

Applied deletion
Removed the following rules: 14 15

Eliminated locations on linear paths
Start location: l8
  18: l1 -> l1 : lt_16^0'=lt_16^post5, lt_18^0'=lt_18^post5, ct_15^0'=ct_15^post5, lt_14^0'=lt_14^post5, lt_17^0'=lt_17^post5, (ct_49^0 <= 0 /\ 1+cnt_27^0-cnt_32^0 <= 0), cost: 2
  19: l1 -> l1 : lt_13^0'=lt_13^post7, lt_16^0'=lt_16^post7, lt_18^0'=lt_18^post7, ct_15^0'=ct_15^post7, lt_14^0'=lt_14^post7, lt_17^0'=lt_17^post7, (-256+ct_49^0 == 0 /\ 1+cnt_27^0-cnt_32^0 <= 0), cost: 2
  17: l8 -> l1 : ntStatus_8^0'=ntStatus_8^post0, InterfaceType_5^0'=InterfaceType_5^post0, Dc_6^0'=Dc_6^post0, MaximumInterfaceType_9^0'=MaximumInterfaceType_9^post0, fdoExtension_7^0'=fdoExtension_7^post0, 0 == 0, cost: 2


Applied nonterm
Original rule:
l1 -> l1 : lt_16^0'=lt_16^post5, lt_18^0'=lt_18^post5, ct_15^0'=ct_15^post5, lt_14^0'=lt_14^post5, lt_17^0'=lt_17^post5, (ct_49^0 <= 0 /\ 1+cnt_27^0-cnt_32^0 <= 0), cost: 2
New rule:
l1 -> [9] : (-1-cnt_27^0+cnt_32^0 >= 0 /\ -ct_49^0 >= 0 /\ -1+n >= 0), cost: NONTERM
Sub-proof via acceration calculus written to file:///tmp/tmpnam_iPcPCo.txt

Applied nonterm
Original rule:
l1 -> l1 : lt_13^0'=lt_13^post7, lt_16^0'=lt_16^post7, lt_18^0'=lt_18^post7, ct_15^0'=ct_15^post7, lt_14^0'=lt_14^post7, lt_17^0'=lt_17^post7, (-256+ct_49^0 == 0 /\ 1+cnt_27^0-cnt_32^0 <= 0), cost: 2
New rule:
l1 -> [9] : (-256+ct_49^0 >= 0 /\ 256-ct_49^0 >= 0 /\ -1+n0 >= 0 /\ -1-cnt_27^0+cnt_32^0 >= 0), cost: NONTERM
Sub-proof via acceration calculus written to file:///tmp/tmpnam_dPmgDk.txt

Applied simplification
Original rule:
l1 -> [9] : (-1-cnt_27^0+cnt_32^0 >= 0 /\ -ct_49^0 >= 0 /\ -1+n >= 0), cost: NONTERM
New rule:
l1 -> [9] : (ct_49^0 <= 0 /\ -1-cnt_27^0+cnt_32^0 >= 0 /\ -1+n >= 0), cost: NONTERM

Applied simplification
Original rule:
l1 -> [9] : (-256+ct_49^0 >= 0 /\ 256-ct_49^0 >= 0 /\ -1+n0 >= 0 /\ -1-cnt_27^0+cnt_32^0 >= 0), cost: NONTERM
New rule:
l1 -> [9] : (-256+ct_49^0 <= 0 /\ -256+ct_49^0 >= 0 /\ -1+n0 >= 0 /\ -1-cnt_27^0+cnt_32^0 >= 0), cost: NONTERM

Applied deletion
Removed the following rules: 18 19

Accelerated simple loops
Start location: l8
  22: l1 -> [9] : (ct_49^0 <= 0 /\ -1-cnt_27^0+cnt_32^0 >= 0 /\ -1+n >= 0), cost: NONTERM
  23: l1 -> [9] : (-256+ct_49^0 <= 0 /\ -256+ct_49^0 >= 0 /\ -1+n0 >= 0 /\ -1-cnt_27^0+cnt_32^0 >= 0), cost: NONTERM
  17: l8 -> l1 : ntStatus_8^0'=ntStatus_8^post0, InterfaceType_5^0'=InterfaceType_5^post0, Dc_6^0'=Dc_6^post0, MaximumInterfaceType_9^0'=MaximumInterfaceType_9^post0, fdoExtension_7^0'=fdoExtension_7^post0, 0 == 0, cost: 2


Applied chaining
First rule:
l8 -> l1 : ntStatus_8^0'=ntStatus_8^post0, InterfaceType_5^0'=InterfaceType_5^post0, Dc_6^0'=Dc_6^post0, MaximumInterfaceType_9^0'=MaximumInterfaceType_9^post0, fdoExtension_7^0'=fdoExtension_7^post0, 0 == 0, cost: 2
Second rule:
l1 -> [9] : (ct_49^0 <= 0 /\ -1-cnt_27^0+cnt_32^0 >= 0 /\ -1+n >= 0), cost: NONTERM
New rule:
l8 -> [9] : (ct_49^0 <= 0 /\ -1-cnt_27^0+cnt_32^0 >= 0), cost: NONTERM

Applied chaining
First rule:
l8 -> l1 : ntStatus_8^0'=ntStatus_8^post0, InterfaceType_5^0'=InterfaceType_5^post0, Dc_6^0'=Dc_6^post0, MaximumInterfaceType_9^0'=MaximumInterfaceType_9^post0, fdoExtension_7^0'=fdoExtension_7^post0, 0 == 0, cost: 2
Second rule:
l1 -> [9] : (-256+ct_49^0 <= 0 /\ -256+ct_49^0 >= 0 /\ -1+n0 >= 0 /\ -1-cnt_27^0+cnt_32^0 >= 0), cost: NONTERM
New rule:
l8 -> [9] : (-256+ct_49^0 == 0 /\ -1-cnt_27^0+cnt_32^0 >= 0), cost: NONTERM

Applied deletion
Removed the following rules: 22 23

Chained accelerated rules with incoming rules
Start location: l8
  17: l8 -> l1 : ntStatus_8^0'=ntStatus_8^post0, InterfaceType_5^0'=InterfaceType_5^post0, Dc_6^0'=Dc_6^post0, MaximumInterfaceType_9^0'=MaximumInterfaceType_9^post0, fdoExtension_7^0'=fdoExtension_7^post0, 0 == 0, cost: 2
  24: l8 -> [9] : (ct_49^0 <= 0 /\ -1-cnt_27^0+cnt_32^0 >= 0), cost: NONTERM
  25: l8 -> [9] : (-256+ct_49^0 == 0 /\ -1-cnt_27^0+cnt_32^0 >= 0), cost: NONTERM


Removed unreachable locations and irrelevant leafs
Start location: l8
  24: l8 -> [9] : (ct_49^0 <= 0 /\ -1-cnt_27^0+cnt_32^0 >= 0), cost: NONTERM
  25: l8 -> [9] : (-256+ct_49^0 == 0 /\ -1-cnt_27^0+cnt_32^0 >= 0), cost: NONTERM


Computing asymptotic complexity
Proved nontermination of rule 24 via SMT.

Proved the following lower bound
Complexity:  Nonterm
Cpx degree: Nonterm

Solved cost: NONTERM
Rule cost:   NONTERM
Rule guard:  (ct_49^0 <= 0 /\ -1-cnt_27^0+cnt_32^0 >= 0)