NO

Initial ITS
Start location: l34
   0: l0 -> l1 : i___01717^0'=i___01717^post0, IsochDetachData^0'=IsochDetachData^post0, ntStatus^0'=ntStatus^post0, __rho_6_^0'=__rho_6_^post0, k5^0'=k5^post0, __rho_2_^0'=__rho_2_^post0, a3838^0'=a3838^post0, a2828^0'=a2828^post0, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post0, b3535^0'=b3535^post0, CromData^0'=CromData^post0, b2626^0'=b2626^post0, __rho_4_^0'=__rho_4_^post0, k2^0'=k2^post0, __rho_12_^0'=__rho_12_^post0, i___02424^0'=i___02424^post0, a11^0'=a11^post0, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post0, __rho_8_^0'=__rho_8_^post0, keR^0'=keR^post0, a4444^0'=a4444^post0, a3232^0'=a3232^post0, ResourceIrp^0'=ResourceIrp^post0, i___01313^0'=i___01313^post0, Irql^0'=Irql^post0, b3333^0'=b3333^post0, __rho_5_^0'=__rho_5_^post0, k4^0'=k4^post0, __rho_1_^0'=__rho_1_^post0, i___04646^0'=i___04646^post0, a2525^0'=a2525^post0, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post0, __rho_9_^0'=__rho_9_^post0, AsyncAddressData^0'=AsyncAddressData^post0, b22^0'=b22^post0, a3737^0'=a3737^post0, k1^0'=k1^post0, __rho_11_^0'=__rho_11_^post0, i___02020^0'=i___02020^post0, IsochResourceData^0'=IsochResourceData^post0, pIrb^0'=pIrb^post0, __rho_7_^0'=__rho_7_^post0, keA^0'=keA^post0, __rho_3_^0'=__rho_3_^post0, a4343^0'=a4343^post0, a3131^0'=a3131^post0, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post0, i^0'=i^post0, Irp^0'=Irp^post0, b2929^0'=b2929^post0, __rho_56_^0'=__rho_56_^post0, k3^0'=k3^post0, __rho_13_^0'=__rho_13_^post0, i___04040^0'=i___04040^post0, a1818^0'=a1818^post0, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post0, __rho_99_^0'=__rho_99_^post0, a77^0'=a77^post0, a3434^0'=a3434^post0, i___099^0'=i___099^post0, __rho_10_^0'=__rho_10_^post0, (__rho_4_^0-__rho_4_^post0 == 0 /\ IsochDetachData^0-IsochDetachData^post0 == 0 /\ -a1818^post0+a1818^0 == 0 /\ keR^0-keR^post0 == 0 /\ -b3333^post0+b3333^0 == 0 /\ -__rho_5_^post0+__rho_5_^0 == 0 /\ __rho_12_^0-__rho_12_^post0 == 0 /\ ntStatus^0-ntStatus^post0 == 0 /\ -__rho_56_^post0+__rho_56_^0 == 0 /\ -i^post0+i^0 == 0 /\ a3838^0-a3838^post0 == 0 /\ -a3131^post0+a3131^0 == 0 /\ __rho_2_^0-__rho_2_^post0 == 0 /\ k1^0-k1^post0 == 0 /\ -a3232^post0+a3232^0 == 0 /\ -ret_IoSetDeviceInterfaceState44^post0+ret_IoSetDeviceInterfaceState44^0 == 0 /\ __rho_11_^0-__rho_11_^post0 == 0 /\ __rho_8_^0-__rho_8_^post0 == 0 /\ pIrb^0-pIrb^post0 == 0 /\ -ResourceIrp^post0+ResourceIrp^0 == 0 /\ i___01313^0-i___01313^post0 == 0 /\ -i___04040^post0+i___04040^0 == 0 /\ __rho_6_^0-__rho_6_^post0 == 0 /\ -__rho_10_^post0+__rho_10_^0 == 0 /\ i___04646^0-i___04646^post0 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post0 == 0 /\ -__rho_9_^post0+__rho_9_^0 == 0 /\ -b2929^post0+b2929^0 == 0 /\ -keA^post0+keA^0 == 0 /\ i___01717^0-i___01717^post0 == 0 /\ -b22^post0+b22^0 == 0 /\ a3737^0-a3737^post0 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post0+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ AsyncAddressData^0 <= 0 /\ -ret_IoAllocateIrp2727^post0+ret_IoAllocateIrp2727^0 == 0 /\ -__rho_13_^post0+__rho_13_^0 == 0 /\ k4^0-k4^post0 == 0 /\ k5^0-k5^post0 == 0 /\ k2^0-k2^post0 == 0 /\ -AsyncAddressData^post0+AsyncAddressData^0 == 0 /\ -Irp^post0+Irp^0 == 0 /\ CromData^0-CromData^post0 == 0 /\ -i___02424^post0+i___02424^0 == 0 /\ -a77^post0+a77^0 == 0 /\ -IsochResourceData^post0+IsochResourceData^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post0 == 0 /\ -__rho_3_^post0+__rho_3_^0 == 0 /\ a2525^0-a2525^post0 == 0 /\ -a4343^post0+a4343^0 == 0 /\ __rho_99_^0-__rho_99_^post0 == 0 /\ -i___099^post0+i___099^0 == 0 /\ -b2626^post0+b2626^0 == 0 /\ -k3^post0+k3^0 == 0 /\ Irql^0-Irql^post0 == 0 /\ a2828^0-a2828^post0 == 0 /\ i___02020^0-i___02020^post0 == 0 /\ a4444^0-a4444^post0 == 0 /\ __rho_7_^0-__rho_7_^post0 == 0 /\ -b3535^post0+b3535^0 == 0 /\ -a11^post0+a11^0 == 0 /\ -a3434^post0+a3434^0 == 0 /\ -__rho_1_^post0+__rho_1_^0 == 0), cost: 1
   1: l0 -> l1 : i___01717^0'=i___01717^post1, IsochDetachData^0'=IsochDetachData^post1, ntStatus^0'=ntStatus^post1, __rho_6_^0'=__rho_6_^post1, k5^0'=k5^post1, __rho_2_^0'=__rho_2_^post1, a3838^0'=a3838^post1, a2828^0'=a2828^post1, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post1, b3535^0'=b3535^post1, CromData^0'=CromData^post1, b2626^0'=b2626^post1, __rho_4_^0'=__rho_4_^post1, k2^0'=k2^post1, __rho_12_^0'=__rho_12_^post1, i___02424^0'=i___02424^post1, a11^0'=a11^post1, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post1, __rho_8_^0'=__rho_8_^post1, keR^0'=keR^post1, a4444^0'=a4444^post1, a3232^0'=a3232^post1, ResourceIrp^0'=ResourceIrp^post1, i___01313^0'=i___01313^post1, Irql^0'=Irql^post1, b3333^0'=b3333^post1, __rho_5_^0'=__rho_5_^post1, k4^0'=k4^post1, __rho_1_^0'=__rho_1_^post1, i___04646^0'=i___04646^post1, a2525^0'=a2525^post1, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post1, __rho_9_^0'=__rho_9_^post1, AsyncAddressData^0'=AsyncAddressData^post1, b22^0'=b22^post1, a3737^0'=a3737^post1, k1^0'=k1^post1, __rho_11_^0'=__rho_11_^post1, i___02020^0'=i___02020^post1, IsochResourceData^0'=IsochResourceData^post1, pIrb^0'=pIrb^post1, __rho_7_^0'=__rho_7_^post1, keA^0'=keA^post1, __rho_3_^0'=__rho_3_^post1, a4343^0'=a4343^post1, a3131^0'=a3131^post1, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post1, i^0'=i^post1, Irp^0'=Irp^post1, b2929^0'=b2929^post1, __rho_56_^0'=__rho_56_^post1, k3^0'=k3^post1, __rho_13_^0'=__rho_13_^post1, i___04040^0'=i___04040^post1, a1818^0'=a1818^post1, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post1, __rho_99_^0'=__rho_99_^post1, a77^0'=a77^post1, a3434^0'=a3434^post1, i___099^0'=i___099^post1, __rho_10_^0'=__rho_10_^post1, (-IsochResourceData^post1+IsochResourceData^0 == 0 /\ -ret_IoAllocateIrp2727^post1+ret_IoAllocateIrp2727^0 == 0 /\ -keR^post1+keR^0 == 0 /\ __rho_2_^0-__rho_2_^post1 == 0 /\ k2^0-k2^post1 == 0 /\ -a3434^post1+a3434^0 == 0 /\ -a2525^post1+a2525^0 == 0 /\ -__rho_5_^post1+__rho_5_^0 == 0 /\ __rho_8_^0-__rho_8_^post1 == 0 /\ -__rho_99_^post1+__rho_99_^0 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post1 == 0 /\ i___04040^0-i___04040^post1 == 0 /\ -b22^post1+b22^0 == 0 /\ a2828^0-a2828^post1 == 0 /\ i___01717^0-i___01717^post1 == 0 /\ -__rho_13_^post1+__rho_13_^0 == 0 /\ -__rho_9_^post1+__rho_9_^0 == 0 /\ pIrb^0-pIrb^post1 == 0 /\ __rho_12_^0-__rho_12_^post1 == 0 /\ -a11^post1+a11^0 == 0 /\ __rho_6_^0-__rho_6_^post1 == 0 /\ -i___099^post1+i___099^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post1 == 0 /\ -k3^post1+k3^0 == 0 /\ a3838^0-a3838^post1 == 0 /\ AsyncAddressData^0-AsyncAddressData^post1 == 0 /\ -a1818^post1+a1818^0 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post1+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ CromData^0-CromData^post1 == 0 /\ -b2929^post1+b2929^0 == 0 /\ __rho_11_^0-__rho_11_^post1 == 0 /\ __rho_4_^0-__rho_4_^post1 == 0 /\ a3131^0-a3131^post1 == 0 /\ -i^post1+i^0 == 0 /\ -__rho_1_^post1+__rho_1_^0 == 0 /\ ntStatus^0-ntStatus^post1 == 0 /\ -ret_IoSetDeviceInterfaceState44^post1+ret_IoSetDeviceInterfaceState44^0 == 0 /\ i___02020^0-i___02020^post1 == 0 /\ b2626^0-b2626^post1 == 0 /\ -Irp^post1+Irp^0 == 0 /\ k1^0-k1^post1 == 0 /\ i___02424^0-i___02424^post1 == 0 /\ __rho_7_^0-__rho_7_^post1 == 0 /\ -ResourceIrp^post1+ResourceIrp^0 == 0 /\ a4444^0-a4444^post1 == 0 /\ -__rho_3_^post1+__rho_3_^0 == 0 /\ -__rho_56_^post1+__rho_56_^0 == 0 /\ -a77^post1+a77^0 == 0 /\ -keA^post1+keA^0 == 0 /\ 1-AsyncAddressData^0 <= 0 /\ k4^0-k4^post1 == 0 /\ b3535^0-b3535^post1 == 0 /\ i___01313^0-i___01313^post1 == 0 /\ a4343^0-a4343^post1 == 0 /\ -i___04646^post1+i___04646^0 == 0 /\ -a3232^post1+a3232^0 == 0 /\ Irql^0-Irql^post1 == 0 /\ -b3333^post1+b3333^0 == 0 /\ IsochDetachData^0-IsochDetachData^post1 == 0 /\ -__rho_10_^post1+__rho_10_^0 == 0 /\ k5^0-k5^post1 == 0 /\ -a3737^post1+a3737^0 == 0), cost: 1
  13: l1 -> l9 : i___01717^0'=i___01717^post13, IsochDetachData^0'=IsochDetachData^post13, ntStatus^0'=ntStatus^post13, __rho_6_^0'=__rho_6_^post13, k5^0'=k5^post13, __rho_2_^0'=__rho_2_^post13, a3838^0'=a3838^post13, a2828^0'=a2828^post13, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post13, b3535^0'=b3535^post13, CromData^0'=CromData^post13, b2626^0'=b2626^post13, __rho_4_^0'=__rho_4_^post13, k2^0'=k2^post13, __rho_12_^0'=__rho_12_^post13, i___02424^0'=i___02424^post13, a11^0'=a11^post13, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post13, __rho_8_^0'=__rho_8_^post13, keR^0'=keR^post13, a4444^0'=a4444^post13, a3232^0'=a3232^post13, ResourceIrp^0'=ResourceIrp^post13, i___01313^0'=i___01313^post13, Irql^0'=Irql^post13, b3333^0'=b3333^post13, __rho_5_^0'=__rho_5_^post13, k4^0'=k4^post13, __rho_1_^0'=__rho_1_^post13, i___04646^0'=i___04646^post13, a2525^0'=a2525^post13, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post13, __rho_9_^0'=__rho_9_^post13, AsyncAddressData^0'=AsyncAddressData^post13, b22^0'=b22^post13, a3737^0'=a3737^post13, k1^0'=k1^post13, __rho_11_^0'=__rho_11_^post13, i___02020^0'=i___02020^post13, IsochResourceData^0'=IsochResourceData^post13, pIrb^0'=pIrb^post13, __rho_7_^0'=__rho_7_^post13, keA^0'=keA^post13, __rho_3_^0'=__rho_3_^post13, a4343^0'=a4343^post13, a3131^0'=a3131^post13, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post13, i^0'=i^post13, Irp^0'=Irp^post13, b2929^0'=b2929^post13, __rho_56_^0'=__rho_56_^post13, k3^0'=k3^post13, __rho_13_^0'=__rho_13_^post13, i___04040^0'=i___04040^post13, a1818^0'=a1818^post13, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post13, __rho_99_^0'=__rho_99_^post13, a77^0'=a77^post13, a3434^0'=a3434^post13, i___099^0'=i___099^post13, __rho_10_^0'=__rho_10_^post13, (-__rho_13_^post13+__rho_13_^0 == 0 /\ -b3333^post13+b3333^0 == 0 /\ -a1818^post13+a1818^0 == 0 /\ -__rho_3_^post13+__rho_3_^0 == 0 /\ -a11^post13+a11^0 == 0 /\ -pIrb^post13+pIrb^0 == 0 /\ __rho_12_^0-__rho_12_^post13 == 0 /\ a2828^0-a2828^post13 == 0 /\ i___01717^0-i___01717^post13 == 0 /\ -ret_IoAllocateIrp2727^post13+ret_IoAllocateIrp2727^0 == 0 /\ i___04040^0-i___04040^post13 == 0 /\ -a3131^post13+a3131^0 == 0 /\ -IsochResourceData^post13+IsochResourceData^0 == 0 /\ k1^0-k1^post13 == 0 /\ -k3^post13+k3^0 == 0 /\ i___01313^0-i___01313^post13 == 0 /\ -ResourceIrp^post13+ResourceIrp^0 == 0 /\ __rho_8_^0-__rho_8_^post13 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post13 == 0 /\ -__rho_1_^post13+__rho_1_^0 == 0 /\ CromData^0-CromData^post13 == 0 /\ __rho_2_^0-__rho_2_^post13 == 0 /\ -__rho_99_^post13+__rho_99_^0 == 0 /\ -keR^post13+keR^0 == 0 /\ a3838^0-a3838^post13 == 0 /\ __rho_4_^0-__rho_4_^post13 == 0 /\ -a77^post13+a77^0 == 0 /\ a2525^0-a2525^post13 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post13+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ -__rho_56_^post13+__rho_56_^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post13 == 0 /\ a3434^0-a3434^post13 == 0 /\ IsochDetachData^0-IsochDetachData^post13 == 0 /\ __rho_11_^0-__rho_11_^post13 == 0 /\ -b2929^post13+b2929^0 == 0 /\ -i___02424^post13+i___02424^0 == 0 /\ -__rho_9_^post13+__rho_9_^0 == 0 /\ -AsyncAddressData^post13+AsyncAddressData^0 == 0 /\ a4343^0-a4343^post13 == 0 /\ -i___04646^post13+i___04646^0 == 0 /\ k2^0-k2^post13 == 0 /\ __rho_6_^0-__rho_6_^post13 == 0 /\ __rho_5_^0-__rho_5_^post13 == 0 /\ __rho_7_^0-__rho_7_^post13 == 0 /\ -i___099^post13+i___099^0 == 0 /\ -a3232^post13+a3232^0 == 0 /\ b2626^0-b2626^post13 == 0 /\ -i^post13+i^0 == 0 /\ i___02020^0-i___02020^post13 == 0 /\ -ret_IoSetDeviceInterfaceState44^post13+ret_IoSetDeviceInterfaceState44^0 == 0 /\ -keA^post13+keA^0 == 0 /\ Irql^0-Irql^post13 == 0 /\ -__rho_10_^post13+__rho_10_^0 == 0 /\ b3535^0-b3535^post13 == 0 /\ -Irp^post13+Irp^0 == 0 /\ -a3737^post13+a3737^0 == 0 /\ k4^0-k4^post13 == 0 /\ k5^0-k5^post13 == 0 /\ -b22^post13+b22^0 == 0 /\ a4444^0-a4444^post13 == 0 /\ ntStatus^0-ntStatus^post13 == 0), cost: 1
   2: l2 -> l0 : i___01717^0'=i___01717^post2, IsochDetachData^0'=IsochDetachData^post2, ntStatus^0'=ntStatus^post2, __rho_6_^0'=__rho_6_^post2, k5^0'=k5^post2, __rho_2_^0'=__rho_2_^post2, a3838^0'=a3838^post2, a2828^0'=a2828^post2, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post2, b3535^0'=b3535^post2, CromData^0'=CromData^post2, b2626^0'=b2626^post2, __rho_4_^0'=__rho_4_^post2, k2^0'=k2^post2, __rho_12_^0'=__rho_12_^post2, i___02424^0'=i___02424^post2, a11^0'=a11^post2, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post2, __rho_8_^0'=__rho_8_^post2, keR^0'=keR^post2, a4444^0'=a4444^post2, a3232^0'=a3232^post2, ResourceIrp^0'=ResourceIrp^post2, i___01313^0'=i___01313^post2, Irql^0'=Irql^post2, b3333^0'=b3333^post2, __rho_5_^0'=__rho_5_^post2, k4^0'=k4^post2, __rho_1_^0'=__rho_1_^post2, i___04646^0'=i___04646^post2, a2525^0'=a2525^post2, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post2, __rho_9_^0'=__rho_9_^post2, AsyncAddressData^0'=AsyncAddressData^post2, b22^0'=b22^post2, a3737^0'=a3737^post2, k1^0'=k1^post2, __rho_11_^0'=__rho_11_^post2, i___02020^0'=i___02020^post2, IsochResourceData^0'=IsochResourceData^post2, pIrb^0'=pIrb^post2, __rho_7_^0'=__rho_7_^post2, keA^0'=keA^post2, __rho_3_^0'=__rho_3_^post2, a4343^0'=a4343^post2, a3131^0'=a3131^post2, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post2, i^0'=i^post2, Irp^0'=Irp^post2, b2929^0'=b2929^post2, __rho_56_^0'=__rho_56_^post2, k3^0'=k3^post2, __rho_13_^0'=__rho_13_^post2, i___04040^0'=i___04040^post2, a1818^0'=a1818^post2, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post2, __rho_99_^0'=__rho_99_^post2, a77^0'=a77^post2, a3434^0'=a3434^post2, i___099^0'=i___099^post2, __rho_10_^0'=__rho_10_^post2, (-__rho_4_^post2+__rho_4_^0 == 0 /\ -a3737^post2+a3737^0 == 0 /\ -ret_ExAllocatePool3030^post2+ret_ExAllocatePool3030^0 == 0 /\ -a3434^post2+a3434^0 == 0 /\ ntStatus^0-ntStatus^post2 == 0 /\ k3^0-k3^post2 == 0 /\ a4444^0-a4444^post2 == 0 /\ a11^0-a11^post2 == 0 /\ b2626^0-b2626^post2 == 0 /\ -__rho_99_^post2+__rho_99_^0 == 0 /\ -__rho_9_^post2+__rho_9_^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post2 == 0 /\ -__rho_1_^post2+__rho_1_^0 == 0 /\ k4^0-k4^post2 == 0 /\ -b2929^post2+b2929^0 == 0 /\ -k1^post2+k1^0 == 0 /\ Irp^0-Irp^post2 == 0 /\ i___02424^0-i___02424^post2 == 0 /\ ret_IoSetDeviceInterfaceState44^0-ret_IoSetDeviceInterfaceState44^post2 == 0 /\ -b3333^post2+b3333^0 == 0 /\ -b22^post2+b22^0 == 0 /\ -a3131^post2+a3131^0 == 0 /\ -__rho_7_^post2+__rho_7_^0 == 0 /\ -a1818^post2+a1818^0 == 0 /\ IsochDetachData^0-IsochDetachData^post2 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post2+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ keR^0-keR^post2 == 0 /\ -i___04646^post2+i___04646^0 == 0 /\ -i___04040^post2+i___04040^0 == 0 /\ b3535^0-b3535^post2 == 0 /\ a3232^0-a3232^post2 == 0 /\ a2828^0-a2828^post2 == 0 /\ k5^0-k5^post2 == 0 /\ -__rho_10_^post2+__rho_10_^0 == 0 /\ __rho_9_^0 <= 0 /\ k2^0-k2^post2 == 0 /\ i___02020^0-i___02020^post2 == 0 /\ __rho_2_^0-__rho_2_^post2 == 0 /\ -a2525^post2+a2525^0 == 0 /\ -pIrb^post2+pIrb^0 == 0 /\ -__rho_13_^post2+__rho_13_^0 == 0 /\ Irql^0-Irql^post2 == 0 /\ __rho_8_^0-__rho_8_^post2 == 0 /\ i___01717^0-i___01717^post2 == 0 /\ -__rho_56_^post2+__rho_56_^0 == 0 /\ -a77^post2+a77^0 == 0 /\ __rho_11_^0-__rho_11_^post2 == 0 /\ keA^0-keA^post2 == 0 /\ -__rho_3_^post2+__rho_3_^0 == 0 /\ ResourceIrp^0-ResourceIrp^post2 == 0 /\ IsochResourceData^0-IsochResourceData^post2 == 0 /\ AsyncAddressData^0-AsyncAddressData^post2 == 0 /\ -__rho_6_^post2+__rho_6_^0 == 0 /\ -i___099^post2+i___099^0 == 0 /\ __rho_12_^0-__rho_12_^post2 == 0 /\ CromData^0-CromData^post2 == 0 /\ -i^post2+i^0 == 0 /\ -a3838^post2+a3838^0 == 0 /\ __rho_5_^0-__rho_5_^post2 == 0 /\ -a4343^post2+a4343^0 == 0 /\ -ret_IoAllocateIrp2727^post2+ret_IoAllocateIrp2727^0 == 0 /\ -i___01313^post2+i___01313^0 == 0), cost: 1
   3: l2 -> l0 : i___01717^0'=i___01717^post3, IsochDetachData^0'=IsochDetachData^post3, ntStatus^0'=ntStatus^post3, __rho_6_^0'=__rho_6_^post3, k5^0'=k5^post3, __rho_2_^0'=__rho_2_^post3, a3838^0'=a3838^post3, a2828^0'=a2828^post3, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post3, b3535^0'=b3535^post3, CromData^0'=CromData^post3, b2626^0'=b2626^post3, __rho_4_^0'=__rho_4_^post3, k2^0'=k2^post3, __rho_12_^0'=__rho_12_^post3, i___02424^0'=i___02424^post3, a11^0'=a11^post3, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post3, __rho_8_^0'=__rho_8_^post3, keR^0'=keR^post3, a4444^0'=a4444^post3, a3232^0'=a3232^post3, ResourceIrp^0'=ResourceIrp^post3, i___01313^0'=i___01313^post3, Irql^0'=Irql^post3, b3333^0'=b3333^post3, __rho_5_^0'=__rho_5_^post3, k4^0'=k4^post3, __rho_1_^0'=__rho_1_^post3, i___04646^0'=i___04646^post3, a2525^0'=a2525^post3, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post3, __rho_9_^0'=__rho_9_^post3, AsyncAddressData^0'=AsyncAddressData^post3, b22^0'=b22^post3, a3737^0'=a3737^post3, k1^0'=k1^post3, __rho_11_^0'=__rho_11_^post3, i___02020^0'=i___02020^post3, IsochResourceData^0'=IsochResourceData^post3, pIrb^0'=pIrb^post3, __rho_7_^0'=__rho_7_^post3, keA^0'=keA^post3, __rho_3_^0'=__rho_3_^post3, a4343^0'=a4343^post3, a3131^0'=a3131^post3, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post3, i^0'=i^post3, Irp^0'=Irp^post3, b2929^0'=b2929^post3, __rho_56_^0'=__rho_56_^post3, k3^0'=k3^post3, __rho_13_^0'=__rho_13_^post3, i___04040^0'=i___04040^post3, a1818^0'=a1818^post3, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post3, __rho_99_^0'=__rho_99_^post3, a77^0'=a77^post3, a3434^0'=a3434^post3, i___099^0'=i___099^post3, __rho_10_^0'=__rho_10_^post3, (Irp^0-Irp^post3 == 0 /\ -i___04646^post3+i___04646^0 == 0 /\ -a3737^post3+a3737^0 == 0 /\ -i___04040^post3+i___04040^0 == 0 /\ -i___099^post3+i___099^0 == 0 /\ -a4343^post3+a4343^0 == 0 /\ -__rho_12_^post3+__rho_12_^0 == 0 /\ __rho_1_^0-__rho_1_^post3 == 0 /\ b22^0-b22^post3 == 0 /\ IsochDetachData^0-IsochDetachData^post3 == 0 /\ __rho_2_^0-__rho_2_^post3 == 0 /\ -__rho_99_^post3+__rho_99_^0 == 0 /\ b3535^0-b3535^post3 == 0 /\ -keA^post3+keA^0 == 0 /\ ret_t1394_SubmitIrpSynch3636^0-ret_t1394_SubmitIrpSynch3636^post3 == 0 /\ -__rho_13_^post3+__rho_13_^0 == 0 /\ -__rho_7_^post3+__rho_7_^0 == 0 /\ b2626^0-b2626^post3 == 0 /\ a3838^0-a3838^post3 == 0 /\ -i___01313^post3+i___01313^0 == 0 /\ __rho_9_^0-__rho_9_^post3 == 0 /\ a2525^0-a2525^post3 == 0 /\ i___01717^0-i___01717^post3 == 0 /\ -ret_ExAllocatePool3030^post3+ret_ExAllocatePool3030^0 == 0 /\ __rho_6_^0-__rho_6_^post3 == 0 /\ __rho_5_^0-__rho_5_^post3 == 0 /\ __rho_8_^0-__rho_8_^post3 == 0 /\ -a77^post3+a77^0 == 0 /\ -__rho_56_^post3+__rho_56_^0 == 0 /\ CromData^0-CromData^post3 == 0 /\ i___02424^0-i___02424^post3 == 0 /\ k5^0-k5^post3 == 0 /\ -__rho_11_^post3+__rho_11_^0 == 0 /\ ResourceIrp^0-ResourceIrp^post3 == 0 /\ -Irql^post3+Irql^0 == 0 /\ -k3^post3+k3^0 == 0 /\ b3333^0-b3333^post3 == 0 /\ -__rho_10_^post3+__rho_10_^0 == 0 /\ -a2828^post3+a2828^0 == 0 /\ -i___02020^post3+i___02020^0 == 0 /\ -__rho_4_^post3+__rho_4_^0 == 0 /\ a3232^0-a3232^post3 == 0 /\ keR^0-keR^post3 == 0 /\ IsochResourceData^0-IsochResourceData^post3 == 0 /\ -pIrb^post3+pIrb^0 == 0 /\ -a3434^post3+a3434^0 == 0 /\ __rho_3_^0-__rho_3_^post3 == 0 /\ ntStatus^0-ntStatus^post3 == 0 /\ k2^0-k2^post3 == 0 /\ ret_IoSetDeviceInterfaceState44^0-ret_IoSetDeviceInterfaceState44^post3 == 0 /\ -a1818^post3+a1818^0 == 0 /\ -AsyncAddressData^post3+AsyncAddressData^0 == 0 /\ -b2929^post3+b2929^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post3 == 0 /\ -i^post3+i^0 == 0 /\ a11^0-a11^post3 == 0 /\ -k1^post3+k1^0 == 0 /\ ret_IoAllocateIrp2727^0-ret_IoAllocateIrp2727^post3 == 0 /\ 1-__rho_9_^0 <= 0 /\ -a4444^post3+a4444^0 == 0 /\ -k4^post3+k4^0 == 0 /\ -a3131^post3+a3131^0 == 0), cost: 1
   4: l3 -> l2 : i___01717^0'=i___01717^post4, IsochDetachData^0'=IsochDetachData^post4, ntStatus^0'=ntStatus^post4, __rho_6_^0'=__rho_6_^post4, k5^0'=k5^post4, __rho_2_^0'=__rho_2_^post4, a3838^0'=a3838^post4, a2828^0'=a2828^post4, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post4, b3535^0'=b3535^post4, CromData^0'=CromData^post4, b2626^0'=b2626^post4, __rho_4_^0'=__rho_4_^post4, k2^0'=k2^post4, __rho_12_^0'=__rho_12_^post4, i___02424^0'=i___02424^post4, a11^0'=a11^post4, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post4, __rho_8_^0'=__rho_8_^post4, keR^0'=keR^post4, a4444^0'=a4444^post4, a3232^0'=a3232^post4, ResourceIrp^0'=ResourceIrp^post4, i___01313^0'=i___01313^post4, Irql^0'=Irql^post4, b3333^0'=b3333^post4, __rho_5_^0'=__rho_5_^post4, k4^0'=k4^post4, __rho_1_^0'=__rho_1_^post4, i___04646^0'=i___04646^post4, a2525^0'=a2525^post4, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post4, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post4, b22^0'=b22^post4, a3737^0'=a3737^post4, k1^0'=k1^post4, __rho_11_^0'=__rho_11_^post4, i___02020^0'=i___02020^post4, IsochResourceData^0'=IsochResourceData^post4, pIrb^0'=pIrb^post4, __rho_7_^0'=__rho_7_^post4, keA^0'=keA^post4, __rho_3_^0'=__rho_3_^post4, a4343^0'=a4343^post4, a3131^0'=a3131^post4, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post4, i^0'=i^post4, Irp^0'=Irp^post4, b2929^0'=b2929^post4, __rho_56_^0'=__rho_56_^post4, k3^0'=k3^post4, __rho_13_^0'=__rho_13_^post4, i___04040^0'=i___04040^post4, a1818^0'=a1818^post4, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post4, __rho_99_^0'=__rho_99_^post4, a77^0'=a77^post4, a3434^0'=a3434^post4, i___099^0'=i___099^post4, __rho_10_^0'=__rho_10_^post4, (0 == 0 /\ -i___02020^post4+i___02020^0 == 0 /\ __rho_8_^0-__rho_8_^post4 == 0 /\ -pIrb^post4+pIrb^0 == 0 /\ -AsyncAddressData^post4+AsyncAddressData^0 == 0 /\ -b2929^post4+b2929^0 == 0 /\ b3535^0-b3535^post4 == 0 /\ -Irql^post4+Irql^0 == 0 /\ -k1^post4+k1^0 == 0 /\ -i___01313^post4+i___01313^0 == 0 /\ -__rho_11_^post4+__rho_11_^0 == 0 /\ b3333^0-b3333^post4 == 0 /\ ret_t1394_SubmitIrpSynch3636^0-ret_t1394_SubmitIrpSynch3636^post4 == 0 /\ a3838^0-a3838^post4 == 0 /\ -i___04040^post4+i___04040^0 == 0 /\ -i___099^post4+i___099^0 == 0 /\ -a4343^post4+a4343^0 == 0 /\ __rho_2_^0-__rho_2_^post4 == 0 /\ i___01717^0-i___01717^post4 == 0 /\ b22^0-b22^post4 == 0 /\ -Irp^post4+Irp^0 == 0 /\ a2525^0-a2525^post4 == 0 /\ __rho_1_^0-__rho_1_^post4 == 0 /\ -a3434^post4+a3434^0 == 0 /\ -__rho_12_^post4+__rho_12_^0 == 0 /\ a4444^0-a4444^post4 == 0 /\ i^0-i^post4 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post4 == 0 /\ __rho_6_^0-__rho_6_^post4 == 0 /\ __rho_56_^0-__rho_56_^post4 == 0 /\ -__rho_13_^post4+__rho_13_^0 == 0 /\ IsochResourceData^0-IsochResourceData^post4 == 0 /\ ResourceIrp^0-ResourceIrp^post4 == 0 /\ b2626^0-b2626^post4 == 0 /\ __rho_3_^0-__rho_3_^post4 == 0 /\ keR^0-keR^post4 == 0 /\ -a3131^post4+a3131^0 == 0 /\ ret_IoSetDeviceInterfaceState44^0-ret_IoSetDeviceInterfaceState44^post4 == 0 /\ -k4^post4+k4^0 == 0 /\ k5^0-k5^post4 == 0 /\ -a77^post4+a77^0 == 0 /\ -a1818^post4+a1818^0 == 0 /\ -__rho_7_^post4+__rho_7_^0 == 0 /\ -a3737^post4+a3737^0 == 0 /\ i___02424^0-i___02424^post4 == 0 /\ -k3^post4+k3^0 == 0 /\ __rho_5_^0-__rho_5_^post4 == 0 /\ CromData^0-CromData^post4 == 0 /\ __rho_4_^0-__rho_4_^post4 == 0 /\ ntStatus^0-ntStatus^post4 == 0 /\ i___04646^0-i___04646^post4 == 0 /\ -__rho_10_^post4+__rho_10_^0 == 0 /\ -a2828^post4+a2828^0 == 0 /\ a3232^0-a3232^post4 == 0 /\ IsochDetachData^0-IsochDetachData^post4 == 0 /\ a11^0-a11^post4 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post4 == 0 /\ -keA^post4+keA^0 == 0 /\ -__rho_99_^post4+__rho_99_^0 == 0 /\ k2^0-k2^post4 == 0 /\ ret_IoAllocateIrp2727^0-ret_IoAllocateIrp2727^post4 == 0), cost: 1
   5: l4 -> l3 : i___01717^0'=i___01717^post5, IsochDetachData^0'=IsochDetachData^post5, ntStatus^0'=ntStatus^post5, __rho_6_^0'=__rho_6_^post5, k5^0'=k5^post5, __rho_2_^0'=__rho_2_^post5, a3838^0'=a3838^post5, a2828^0'=a2828^post5, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post5, b3535^0'=b3535^post5, CromData^0'=CromData^post5, b2626^0'=b2626^post5, __rho_4_^0'=__rho_4_^post5, k2^0'=k2^post5, __rho_12_^0'=__rho_12_^post5, i___02424^0'=i___02424^post5, a11^0'=a11^post5, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post5, __rho_8_^0'=__rho_8_^post5, keR^0'=keR^post5, a4444^0'=a4444^post5, a3232^0'=a3232^post5, ResourceIrp^0'=ResourceIrp^post5, i___01313^0'=i___01313^post5, Irql^0'=Irql^post5, b3333^0'=b3333^post5, __rho_5_^0'=__rho_5_^post5, k4^0'=k4^post5, __rho_1_^0'=__rho_1_^post5, i___04646^0'=i___04646^post5, a2525^0'=a2525^post5, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post5, __rho_9_^0'=__rho_9_^post5, AsyncAddressData^0'=AsyncAddressData^post5, b22^0'=b22^post5, a3737^0'=a3737^post5, k1^0'=k1^post5, __rho_11_^0'=__rho_11_^post5, i___02020^0'=i___02020^post5, IsochResourceData^0'=IsochResourceData^post5, pIrb^0'=pIrb^post5, __rho_7_^0'=__rho_7_^post5, keA^0'=keA^post5, __rho_3_^0'=__rho_3_^post5, a4343^0'=a4343^post5, a3131^0'=a3131^post5, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post5, i^0'=i^post5, Irp^0'=Irp^post5, b2929^0'=b2929^post5, __rho_56_^0'=__rho_56_^post5, k3^0'=k3^post5, __rho_13_^0'=__rho_13_^post5, i___04040^0'=i___04040^post5, a1818^0'=a1818^post5, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post5, __rho_99_^0'=__rho_99_^post5, a77^0'=a77^post5, a3434^0'=a3434^post5, i___099^0'=i___099^post5, __rho_10_^0'=__rho_10_^post5, (-CromData^post5+CromData^0 == 0 /\ -i___01313^post5+i___01313^0 == 0 /\ a2525^0-a2525^post5 == 0 /\ a3232^0-a3232^post5 == 0 /\ ret_t1394_SubmitIrpSynch3636^0-ret_t1394_SubmitIrpSynch3636^post5 == 0 /\ -IsochResourceData^post5+IsochResourceData^0 == 0 /\ -ret_IoSetDeviceInterfaceState44^post5+ret_IoSetDeviceInterfaceState44^0 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post5 == 0 /\ a2828^0-a2828^post5 == 0 /\ k5^0-k5^post5 == 0 /\ -ret_IoAllocateIrp2727^post5+ret_IoAllocateIrp2727^0 == 0 /\ -k2^post5+k2^0 == 0 /\ __rho_9_^0-__rho_9_^post5 == 0 /\ -a77^post5+a77^0 == 0 /\ -k1^post5+k1^0 == 0 /\ b3333^0-b3333^post5 == 0 /\ IsochDetachData^0-IsochDetachData^post5 == 0 /\ __rho_2_^0-__rho_2_^post5 == 0 /\ __rho_8_^0 <= 0 /\ -i___099^post5+i___099^0 == 0 /\ -a4343^post5+a4343^0 == 0 /\ __rho_13_^0-__rho_13_^post5 == 0 /\ -k3^post5+k3^0 == 0 /\ -a3434^post5+a3434^0 == 0 /\ b2929^0-b2929^post5 == 0 /\ ResourceIrp^0-ResourceIrp^post5 == 0 /\ a3838^0-a3838^post5 == 0 /\ i^0-i^post5 == 0 /\ -__rho_99_^post5+__rho_99_^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post5 == 0 /\ ntStatus^0-ntStatus^post5 == 0 /\ a4444^0-a4444^post5 == 0 /\ -a1818^post5+a1818^0 == 0 /\ -__rho_5_^post5+__rho_5_^0 == 0 /\ a11^0-a11^post5 == 0 /\ -__rho_8_^post5+__rho_8_^0 == 0 /\ __rho_3_^0-__rho_3_^post5 == 0 /\ -__rho_7_^post5+__rho_7_^0 == 0 /\ __rho_6_^0-__rho_6_^post5 == 0 /\ -AsyncAddressData^post5+AsyncAddressData^0 == 0 /\ -k4^post5+k4^0 == 0 /\ b3535^0-b3535^post5 == 0 /\ b2626^0-b2626^post5 == 0 /\ -__rho_56_^post5+__rho_56_^0 == 0 /\ b22^0-b22^post5 == 0 /\ i___02424^0-i___02424^post5 == 0 /\ -a3131^post5+a3131^0 == 0 /\ -__rho_11_^post5+__rho_11_^0 == 0 /\ keR^0-keR^post5 == 0 /\ -Irql^post5+Irql^0 == 0 /\ i___01717^0-i___01717^post5 == 0 /\ -__rho_10_^post5+__rho_10_^0 == 0 /\ -i___04040^post5+i___04040^0 == 0 /\ -Irp^post5+Irp^0 == 0 /\ -i___02020^post5+i___02020^0 == 0 /\ -__rho_12_^post5+__rho_12_^0 == 0 /\ i___04646^0-i___04646^post5 == 0 /\ -keA^post5+keA^0 == 0 /\ -a3737^post5+a3737^0 == 0 /\ __rho_4_^0-__rho_4_^post5 == 0 /\ -__rho_1_^post5+__rho_1_^0 == 0 /\ -pIrb^post5+pIrb^0 == 0), cost: 1
   6: l4 -> l3 : i___01717^0'=i___01717^post6, IsochDetachData^0'=IsochDetachData^post6, ntStatus^0'=ntStatus^post6, __rho_6_^0'=__rho_6_^post6, k5^0'=k5^post6, __rho_2_^0'=__rho_2_^post6, a3838^0'=a3838^post6, a2828^0'=a2828^post6, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post6, b3535^0'=b3535^post6, CromData^0'=CromData^post6, b2626^0'=b2626^post6, __rho_4_^0'=__rho_4_^post6, k2^0'=k2^post6, __rho_12_^0'=__rho_12_^post6, i___02424^0'=i___02424^post6, a11^0'=a11^post6, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post6, __rho_8_^0'=__rho_8_^post6, keR^0'=keR^post6, a4444^0'=a4444^post6, a3232^0'=a3232^post6, ResourceIrp^0'=ResourceIrp^post6, i___01313^0'=i___01313^post6, Irql^0'=Irql^post6, b3333^0'=b3333^post6, __rho_5_^0'=__rho_5_^post6, k4^0'=k4^post6, __rho_1_^0'=__rho_1_^post6, i___04646^0'=i___04646^post6, a2525^0'=a2525^post6, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post6, __rho_9_^0'=__rho_9_^post6, AsyncAddressData^0'=AsyncAddressData^post6, b22^0'=b22^post6, a3737^0'=a3737^post6, k1^0'=k1^post6, __rho_11_^0'=__rho_11_^post6, i___02020^0'=i___02020^post6, IsochResourceData^0'=IsochResourceData^post6, pIrb^0'=pIrb^post6, __rho_7_^0'=__rho_7_^post6, keA^0'=keA^post6, __rho_3_^0'=__rho_3_^post6, a4343^0'=a4343^post6, a3131^0'=a3131^post6, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post6, i^0'=i^post6, Irp^0'=Irp^post6, b2929^0'=b2929^post6, __rho_56_^0'=__rho_56_^post6, k3^0'=k3^post6, __rho_13_^0'=__rho_13_^post6, i___04040^0'=i___04040^post6, a1818^0'=a1818^post6, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post6, __rho_99_^0'=__rho_99_^post6, a77^0'=a77^post6, a3434^0'=a3434^post6, i___099^0'=i___099^post6, __rho_10_^0'=__rho_10_^post6, (i^0-i^post6 == 0 /\ __rho_4_^0-__rho_4_^post6 == 0 /\ -Irp^post6+Irp^0 == 0 /\ -keA^post6+keA^0 == 0 /\ -ret_IoAllocateIrp2727^post6+ret_IoAllocateIrp2727^0 == 0 /\ a3737^0-a3737^post6 == 0 /\ -__rho_1_^post6+__rho_1_^0 == 0 /\ a11^0-a11^post6 == 0 /\ -__rho_13_^post6+__rho_13_^0 == 0 /\ __rho_3_^0-__rho_3_^post6 == 0 /\ __rho_11_^0-__rho_11_^post6 == 0 /\ i___04040^0-i___04040^post6 == 0 /\ -ret_IoSetDeviceInterfaceState44^post6+ret_IoSetDeviceInterfaceState44^0 == 0 /\ -__rho_5_^post6+__rho_5_^0 == 0 /\ -Irql^post6+Irql^0 == 0 /\ b2626^0-b2626^post6 == 0 /\ -i___02424^post6+i___02424^0 == 0 /\ -a77^post6+a77^0 == 0 /\ -a2525^post6+a2525^0 == 0 /\ -i___02020^post6+i___02020^0 == 0 /\ -k3^post6+k3^0 == 0 /\ -__rho_99_^post6+__rho_99_^0 == 0 /\ i___01717^0-i___01717^post6 == 0 /\ -i___099^post6+i___099^0 == 0 /\ __rho_6_^0-__rho_6_^post6 == 0 /\ i___04646^0-i___04646^post6 == 0 /\ 1-__rho_8_^0 <= 0 /\ -__rho_8_^post6+__rho_8_^0 == 0 /\ -b3333^post6+b3333^0 == 0 /\ i___01313^0-i___01313^post6 == 0 /\ b2929^0-b2929^post6 == 0 /\ -IsochResourceData^post6+IsochResourceData^0 == 0 /\ keR^0-keR^post6 == 0 /\ -a3434^post6+a3434^0 == 0 /\ a4444^0-a4444^post6 == 0 /\ -b3535^post6+b3535^0 == 0 /\ pIrb^0-pIrb^post6 == 0 /\ a4343^0-a4343^post6 == 0 /\ -b22^post6+b22^0 == 0 /\ a2828^0-a2828^post6 == 0 /\ k4^0-k4^post6 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post6 == 0 /\ -__rho_56_^post6+__rho_56_^0 == 0 /\ -__rho_2_^post6+__rho_2_^0 == 0 /\ IsochDetachData^0-IsochDetachData^post6 == 0 /\ -AsyncAddressData^post6+AsyncAddressData^0 == 0 /\ -a3232^post6+a3232^0 == 0 /\ __rho_12_^0-__rho_12_^post6 == 0 /\ -k1^post6+k1^0 == 0 /\ -a3131^post6+a3131^0 == 0 /\ -__rho_10_^post6+__rho_10_^0 == 0 /\ k2^0-k2^post6 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post6+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post6 == 0 /\ a3838^0-a3838^post6 == 0 /\ ntStatus^0-ntStatus^post6 == 0 /\ ResourceIrp^0-ResourceIrp^post6 == 0 /\ k5^0-k5^post6 == 0 /\ -__rho_7_^post6+__rho_7_^0 == 0 /\ -__rho_9_^post6+__rho_9_^0 == 0 /\ CromData^0-CromData^post6 == 0 /\ a1818^0-a1818^post6 == 0), cost: 1
   7: l5 -> l4 : i___01717^0'=i___01717^post7, IsochDetachData^0'=IsochDetachData^post7, ntStatus^0'=ntStatus^post7, __rho_6_^0'=__rho_6_^post7, k5^0'=k5^post7, __rho_2_^0'=__rho_2_^post7, a3838^0'=a3838^post7, a2828^0'=a2828^post7, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post7, b3535^0'=b3535^post7, CromData^0'=CromData^post7, b2626^0'=b2626^post7, __rho_4_^0'=__rho_4_^post7, k2^0'=k2^post7, __rho_12_^0'=__rho_12_^post7, i___02424^0'=i___02424^post7, a11^0'=a11^post7, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post7, __rho_8_^0'=__rho_8_^post7, keR^0'=keR^post7, a4444^0'=a4444^post7, a3232^0'=a3232^post7, ResourceIrp^0'=ResourceIrp^post7, i___01313^0'=i___01313^post7, Irql^0'=Irql^post7, b3333^0'=b3333^post7, __rho_5_^0'=__rho_5_^post7, k4^0'=k4^post7, __rho_1_^0'=__rho_1_^post7, i___04646^0'=i___04646^post7, a2525^0'=a2525^post7, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post7, __rho_9_^0'=__rho_9_^post7, AsyncAddressData^0'=AsyncAddressData^post7, b22^0'=b22^post7, a3737^0'=a3737^post7, k1^0'=k1^post7, __rho_11_^0'=__rho_11_^post7, i___02020^0'=i___02020^post7, IsochResourceData^0'=IsochResourceData^post7, pIrb^0'=pIrb^post7, __rho_7_^0'=__rho_7_^post7, keA^0'=keA^post7, __rho_3_^0'=__rho_3_^post7, a4343^0'=a4343^post7, a3131^0'=a3131^post7, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post7, i^0'=i^post7, Irp^0'=Irp^post7, b2929^0'=b2929^post7, __rho_56_^0'=__rho_56_^post7, k3^0'=k3^post7, __rho_13_^0'=__rho_13_^post7, i___04040^0'=i___04040^post7, a1818^0'=a1818^post7, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post7, __rho_99_^0'=__rho_99_^post7, a77^0'=a77^post7, a3434^0'=a3434^post7, i___099^0'=i___099^post7, __rho_10_^0'=__rho_10_^post7, (0 == 0 /\ -Irp^post7+Irp^0 == 0 /\ -keA^post7+keA^0 == 0 /\ a4444^0-a4444^post7 == 0 /\ -__rho_1_^post7+__rho_1_^0 == 0 /\ -a2525^post7+a2525^0 == 0 /\ k5^0-k5^post7 == 0 /\ i___01313^0-i___01313^post7 == 0 /\ k4^0-k4^post7 == 0 /\ -b22^post7+b22^0 == 0 /\ -ResourceIrp^post7+ResourceIrp^0 == 0 /\ __rho_12_^0-__rho_12_^post7 == 0 /\ a2828^0-a2828^post7 == 0 /\ -__rho_13_^post7+__rho_13_^0 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post7 == 0 /\ -__rho_3_^post7+__rho_3_^0 == 0 /\ CromData^0-CromData^post7 == 0 /\ -i___04646^post7+i___04646^0 == 0 /\ __rho_4_^0-__rho_4_^post7 == 0 /\ __rho_2_^0-__rho_2_^post7 == 0 /\ ntStatus^0-ntStatus^post7 == 0 /\ -__rho_56_^post7+__rho_56_^0 == 0 /\ a3838^0-a3838^post7 == 0 /\ -a77^post7+a77^0 == 0 /\ -i___099^post7+i___099^0 == 0 /\ -k3^post7+k3^0 == 0 /\ -b3333^post7+b3333^0 == 0 /\ -__rho_10_^post7+__rho_10_^0 == 0 /\ -i___04040^post7+i___04040^0 == 0 /\ ret_IoSetDeviceInterfaceState44^0-ret_IoSetDeviceInterfaceState44^post7 == 0 /\ k1^0-k1^post7 == 0 /\ -i^post7+i^0 == 0 /\ -IsochResourceData^post7+IsochResourceData^0 == 0 /\ -a3434^post7+a3434^0 == 0 /\ __rho_5_^0-__rho_5_^post7 == 0 /\ -ret_IoAllocateIrp2727^post7+ret_IoAllocateIrp2727^0 == 0 /\ i___02424^0-i___02424^post7 == 0 /\ __rho_7_^0-__rho_7_^post7 == 0 /\ -b2626^post7+b2626^0 == 0 /\ __rho_6_^0-__rho_6_^post7 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post7 == 0 /\ b3535^0-b3535^post7 == 0 /\ IsochDetachData^0-IsochDetachData^post7 == 0 /\ Irql^0-Irql^post7 == 0 /\ -keR^post7+keR^0 == 0 /\ __rho_11_^0-__rho_11_^post7 == 0 /\ a4343^0-a4343^post7 == 0 /\ -__rho_9_^post7+__rho_9_^0 == 0 /\ -pIrb^post7+pIrb^0 == 0 /\ k2^0-k2^post7 == 0 /\ -AsyncAddressData^post7+AsyncAddressData^0 == 0 /\ -a11^post7+a11^0 == 0 /\ -__rho_99_^post7+__rho_99_^0 == 0 /\ -b2929^post7+b2929^0 == 0 /\ -a1818^post7+a1818^0 == 0 /\ i___02020^0-i___02020^post7 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post7+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ -a3131^post7+a3131^0 == 0 /\ -a3737^post7+a3737^0 == 0 /\ -a3232^post7+a3232^0 == 0 /\ i___01717^0-i___01717^post7 == 0), cost: 1
   8: l6 -> l5 : i___01717^0'=i___01717^post8, IsochDetachData^0'=IsochDetachData^post8, ntStatus^0'=ntStatus^post8, __rho_6_^0'=__rho_6_^post8, k5^0'=k5^post8, __rho_2_^0'=__rho_2_^post8, a3838^0'=a3838^post8, a2828^0'=a2828^post8, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post8, b3535^0'=b3535^post8, CromData^0'=CromData^post8, b2626^0'=b2626^post8, __rho_4_^0'=__rho_4_^post8, k2^0'=k2^post8, __rho_12_^0'=__rho_12_^post8, i___02424^0'=i___02424^post8, a11^0'=a11^post8, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post8, __rho_8_^0'=__rho_8_^post8, keR^0'=keR^post8, a4444^0'=a4444^post8, a3232^0'=a3232^post8, ResourceIrp^0'=ResourceIrp^post8, i___01313^0'=i___01313^post8, Irql^0'=Irql^post8, b3333^0'=b3333^post8, __rho_5_^0'=__rho_5_^post8, k4^0'=k4^post8, __rho_1_^0'=__rho_1_^post8, i___04646^0'=i___04646^post8, a2525^0'=a2525^post8, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post8, __rho_9_^0'=__rho_9_^post8, AsyncAddressData^0'=AsyncAddressData^post8, b22^0'=b22^post8, a3737^0'=a3737^post8, k1^0'=k1^post8, __rho_11_^0'=__rho_11_^post8, i___02020^0'=i___02020^post8, IsochResourceData^0'=IsochResourceData^post8, pIrb^0'=pIrb^post8, __rho_7_^0'=__rho_7_^post8, keA^0'=keA^post8, __rho_3_^0'=__rho_3_^post8, a4343^0'=a4343^post8, a3131^0'=a3131^post8, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post8, i^0'=i^post8, Irp^0'=Irp^post8, b2929^0'=b2929^post8, __rho_56_^0'=__rho_56_^post8, k3^0'=k3^post8, __rho_13_^0'=__rho_13_^post8, i___04040^0'=i___04040^post8, a1818^0'=a1818^post8, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post8, __rho_99_^0'=__rho_99_^post8, a77^0'=a77^post8, a3434^0'=a3434^post8, i___099^0'=i___099^post8, __rho_10_^0'=__rho_10_^post8, (AsyncAddressData^0-AsyncAddressData^post8 == 0 /\ -k3^post8+k3^0 == 0 /\ i___01313^0-i___01313^post8 == 0 /\ __rho_8_^0-__rho_8_^post8 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post8 == 0 /\ -i___099^post8+i___099^0 == 0 /\ k5^0-k5^post8 == 0 /\ -__rho_10_^post8+__rho_10_^0 == 0 /\ -a3232^post8+a3232^0 == 0 /\ __rho_12_^0-__rho_12_^post8 == 0 /\ -pIrb^post8+pIrb^0 == 0 /\ ret_IoSetDeviceInterfaceState44^0-ret_IoSetDeviceInterfaceState44^post8 == 0 /\ __rho_5_^0-__rho_5_^post8 == 0 /\ -a1818^post8+a1818^0 == 0 /\ ntStatus^0-ntStatus^post8 == 0 /\ a3838^0-a3838^post8 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post8+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ a2828^0-a2828^post8 == 0 /\ __rho_7_^0-__rho_7_^post8 == 0 /\ i___02020^0-i___02020^post8 == 0 /\ -ret_IoAllocateIrp2727^post8+ret_IoAllocateIrp2727^0 == 0 /\ CromData^0-CromData^post8 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post8 == 0 /\ -a2525^post8+a2525^0 == 0 /\ -a77^post8+a77^0 == 0 /\ a11^0-a11^post8 == 0 /\ -i^post8+i^0 == 0 /\ Irql^0-Irql^post8 == 0 /\ -a4444^post8+a4444^0 == 0 /\ k4^0-k4^post8 == 0 /\ -__rho_56_^post8+__rho_56_^0 == 0 /\ b3535^0-b3535^post8 == 0 /\ -__rho_99_^post8+__rho_99_^0 == 0 /\ a3131^0-a3131^post8 == 0 /\ i___02424^0-i___02424^post8 == 0 /\ -a3737^post8+a3737^0 == 0 /\ -i___04040^post8+i___04040^0 == 0 /\ __rho_1_^0-__rho_1_^post8 == 0 /\ __rho_4_^0-__rho_4_^post8 == 0 /\ IsochDetachData^0-IsochDetachData^post8 == 0 /\ __rho_2_^0-__rho_2_^post8 == 0 /\ -b2626^post8+b2626^0 == 0 /\ -__rho_9_^post8+__rho_9_^0 == 0 /\ -b2929^post8+b2929^0 == 0 /\ k1^0-k1^post8 == 0 /\ __rho_7_^0 <= 0 /\ -keA^post8+keA^0 == 0 /\ -a3434^post8+a3434^0 == 0 /\ a4343^0-a4343^post8 == 0 /\ -keR^post8+keR^0 == 0 /\ -b22^post8+b22^0 == 0 /\ b3333^0-b3333^post8 == 0 /\ -__rho_13_^post8+__rho_13_^0 == 0 /\ -__rho_3_^post8+__rho_3_^0 == 0 /\ -Irp^post8+Irp^0 == 0 /\ IsochResourceData^0-IsochResourceData^post8 == 0 /\ i___01717^0-i___01717^post8 == 0 /\ k2^0-k2^post8 == 0 /\ __rho_6_^0-__rho_6_^post8 == 0 /\ -i___04646^post8+i___04646^0 == 0 /\ -ResourceIrp^post8+ResourceIrp^0 == 0 /\ -__rho_11_^post8+__rho_11_^0 == 0), cost: 1
   9: l6 -> l5 : i___01717^0'=i___01717^post9, IsochDetachData^0'=IsochDetachData^post9, ntStatus^0'=ntStatus^post9, __rho_6_^0'=__rho_6_^post9, k5^0'=k5^post9, __rho_2_^0'=__rho_2_^post9, a3838^0'=a3838^post9, a2828^0'=a2828^post9, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post9, b3535^0'=b3535^post9, CromData^0'=CromData^post9, b2626^0'=b2626^post9, __rho_4_^0'=__rho_4_^post9, k2^0'=k2^post9, __rho_12_^0'=__rho_12_^post9, i___02424^0'=i___02424^post9, a11^0'=a11^post9, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post9, __rho_8_^0'=__rho_8_^post9, keR^0'=keR^post9, a4444^0'=a4444^post9, a3232^0'=a3232^post9, ResourceIrp^0'=ResourceIrp^post9, i___01313^0'=i___01313^post9, Irql^0'=Irql^post9, b3333^0'=b3333^post9, __rho_5_^0'=__rho_5_^post9, k4^0'=k4^post9, __rho_1_^0'=__rho_1_^post9, i___04646^0'=i___04646^post9, a2525^0'=a2525^post9, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post9, __rho_9_^0'=__rho_9_^post9, AsyncAddressData^0'=AsyncAddressData^post9, b22^0'=b22^post9, a3737^0'=a3737^post9, k1^0'=k1^post9, __rho_11_^0'=__rho_11_^post9, i___02020^0'=i___02020^post9, IsochResourceData^0'=IsochResourceData^post9, pIrb^0'=pIrb^post9, __rho_7_^0'=__rho_7_^post9, keA^0'=keA^post9, __rho_3_^0'=__rho_3_^post9, a4343^0'=a4343^post9, a3131^0'=a3131^post9, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post9, i^0'=i^post9, Irp^0'=Irp^post9, b2929^0'=b2929^post9, __rho_56_^0'=__rho_56_^post9, k3^0'=k3^post9, __rho_13_^0'=__rho_13_^post9, i___04040^0'=i___04040^post9, a1818^0'=a1818^post9, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post9, __rho_99_^0'=__rho_99_^post9, a77^0'=a77^post9, a3434^0'=a3434^post9, i___099^0'=i___099^post9, __rho_10_^0'=__rho_10_^post9, (-b3333^post9+b3333^0 == 0 /\ -i___02020^post9+i___02020^0 == 0 /\ -pIrb^post9+pIrb^0 == 0 /\ -__rho_13_^post9+__rho_13_^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post9 == 0 /\ a3232^0-a3232^post9 == 0 /\ AsyncAddressData^0-AsyncAddressData^post9 == 0 /\ IsochDetachData^0-IsochDetachData^post9 == 0 /\ -a1818^post9+a1818^0 == 0 /\ -__rho_3_^post9+__rho_3_^0 == 0 /\ ret_IoSetDeviceInterfaceState44^0-ret_IoSetDeviceInterfaceState44^post9 == 0 /\ -__rho_11_^post9+__rho_11_^0 == 0 /\ __rho_5_^0-__rho_5_^post9 == 0 /\ -k3^post9+k3^0 == 0 /\ k2^0-k2^post9 == 0 /\ a11^0-a11^post9 == 0 /\ __rho_6_^0-__rho_6_^post9 == 0 /\ -ret_IoAllocateIrp2727^post9+ret_IoAllocateIrp2727^0 == 0 /\ k4^0-k4^post9 == 0 /\ b3535^0-b3535^post9 == 0 /\ Irql^0-Irql^post9 == 0 /\ k5^0-k5^post9 == 0 /\ -ResourceIrp^post9+ResourceIrp^0 == 0 /\ -__rho_99_^post9+__rho_99_^0 == 0 /\ a4444^0-a4444^post9 == 0 /\ ntStatus^0-ntStatus^post9 == 0 /\ -keR^post9+keR^0 == 0 /\ -__rho_9_^post9+__rho_9_^0 == 0 /\ -__rho_56_^post9+__rho_56_^0 == 0 /\ -b2929^post9+b2929^0 == 0 /\ a2828^0-a2828^post9 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post9+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ i___01717^0-i___01717^post9 == 0 /\ __rho_12_^0-__rho_12_^post9 == 0 /\ -a77^post9+a77^0 == 0 /\ 1-__rho_7_^0 <= 0 /\ -i___099^post9+i___099^0 == 0 /\ -i___04646^post9+i___04646^0 == 0 /\ -k1^post9+k1^0 == 0 /\ -__rho_7_^post9+__rho_7_^0 == 0 /\ -a3737^post9+a3737^0 == 0 /\ -i^post9+i^0 == 0 /\ a3131^0-a3131^post9 == 0 /\ IsochResourceData^0-IsochResourceData^post9 == 0 /\ -ret_ExAllocatePool3030^post9+ret_ExAllocatePool3030^0 == 0 /\ -i___04040^post9+i___04040^0 == 0 /\ i___01313^0-i___01313^post9 == 0 /\ b2626^0-b2626^post9 == 0 /\ -a2525^post9+a2525^0 == 0 /\ -a3838^post9+a3838^0 == 0 /\ -__rho_10_^post9+__rho_10_^0 == 0 /\ CromData^0-CromData^post9 == 0 /\ __rho_1_^0-__rho_1_^post9 == 0 /\ -a3434^post9+a3434^0 == 0 /\ a4343^0-a4343^post9 == 0 /\ __rho_8_^0-__rho_8_^post9 == 0 /\ -Irp^post9+Irp^0 == 0 /\ -b22^post9+b22^0 == 0 /\ i___02424^0-i___02424^post9 == 0 /\ __rho_2_^0-__rho_2_^post9 == 0 /\ keA^0-keA^post9 == 0 /\ __rho_4_^0-__rho_4_^post9 == 0), cost: 1
  10: l7 -> l8 : i___01717^0'=i___01717^post10, IsochDetachData^0'=IsochDetachData^post10, ntStatus^0'=ntStatus^post10, __rho_6_^0'=__rho_6_^post10, k5^0'=k5^post10, __rho_2_^0'=__rho_2_^post10, a3838^0'=a3838^post10, a2828^0'=a2828^post10, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post10, b3535^0'=b3535^post10, CromData^0'=CromData^post10, b2626^0'=b2626^post10, __rho_4_^0'=__rho_4_^post10, k2^0'=k2^post10, __rho_12_^0'=__rho_12_^post10, i___02424^0'=i___02424^post10, a11^0'=a11^post10, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post10, __rho_8_^0'=__rho_8_^post10, keR^0'=keR^post10, a4444^0'=a4444^post10, a3232^0'=a3232^post10, ResourceIrp^0'=ResourceIrp^post10, i___01313^0'=i___01313^post10, Irql^0'=Irql^post10, b3333^0'=b3333^post10, __rho_5_^0'=__rho_5_^post10, k4^0'=k4^post10, __rho_1_^0'=__rho_1_^post10, i___04646^0'=i___04646^post10, a2525^0'=a2525^post10, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post10, __rho_9_^0'=__rho_9_^post10, AsyncAddressData^0'=AsyncAddressData^post10, b22^0'=b22^post10, a3737^0'=a3737^post10, k1^0'=k1^post10, __rho_11_^0'=__rho_11_^post10, i___02020^0'=i___02020^post10, IsochResourceData^0'=IsochResourceData^post10, pIrb^0'=pIrb^post10, __rho_7_^0'=__rho_7_^post10, keA^0'=keA^post10, __rho_3_^0'=__rho_3_^post10, a4343^0'=a4343^post10, a3131^0'=a3131^post10, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post10, i^0'=i^post10, Irp^0'=Irp^post10, b2929^0'=b2929^post10, __rho_56_^0'=__rho_56_^post10, k3^0'=k3^post10, __rho_13_^0'=__rho_13_^post10, i___04040^0'=i___04040^post10, a1818^0'=a1818^post10, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post10, __rho_99_^0'=__rho_99_^post10, a77^0'=a77^post10, a3434^0'=a3434^post10, i___099^0'=i___099^post10, __rho_10_^0'=__rho_10_^post10, (-__rho_7_^post10+__rho_7_^0 == 0 /\ Irql^0-Irql^post10 == 0 /\ k3^0-k3^post10 == 0 /\ a2828^0-a2828^post10 == 0 /\ keA^0-keA^post10 == 0 /\ ntStatus^0-ntStatus^post10 == 0 /\ -__rho_56_^post10+__rho_56_^0 == 0 /\ -i^post10+i^0 == 0 /\ -a3131^post10+a3131^0 == 0 /\ -a3737^post10+a3737^0 == 0 /\ -i___04646^post10+i___04646^0 == 0 /\ keR^0-keR^post10 == 0 /\ Irp^0-Irp^post10 == 0 /\ __rho_5_^0-__rho_5_^post10 == 0 /\ __rho_8_^0-__rho_8_^post10 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post10 == 0 /\ -i___04040^post10+i___04040^0 == 0 /\ -pIrb^post10+pIrb^0 == 0 /\ ret_t1394_SubmitIrpSynch3636^0-ret_t1394_SubmitIrpSynch3636^post10 == 0 /\ -__rho_10_^post10+__rho_10_^0 == 0 /\ -i___02020^post10+i___02020^0 == 0 /\ CromData^0-CromData^post10 == 0 /\ ResourceIrp^0-ResourceIrp^post10 == 0 /\ __rho_2_^0-__rho_2_^post10 == 0 /\ -b2929^post10+b2929^0 == 0 /\ a3838^0-a3838^post10 == 0 /\ b22^0-b22^post10 == 0 /\ -a1818^post10+a1818^0 == 0 /\ __rho_9_^0-__rho_9_^post10 == 0 /\ a3232^0-a3232^post10 == 0 /\ IsochResourceData^0-IsochResourceData^post10 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post10 == 0 /\ -ret_IoAllocateIrp2727^post10+ret_IoAllocateIrp2727^0 == 0 /\ -__rho_13_^post10+__rho_13_^0 == 0 /\ IsochDetachData^0-IsochDetachData^post10 == 0 /\ -i___01313^post10+i___01313^0 == 0 /\ -a77^post10+a77^0 == 0 /\ -k1^post10+k1^0 == 0 /\ k2^0-k2^post10 == 0 /\ -a4444^post10+a4444^0 == 0 /\ __rho_6_^0-__rho_6_^post10 == 0 /\ ret_IoSetDeviceInterfaceState44^0-ret_IoSetDeviceInterfaceState44^post10 == 0 /\ k4^0-k4^post10 == 0 /\ i___02424^0-i___02424^post10 == 0 /\ -i___099^post10+i___099^0 == 0 /\ a11^0-a11^post10 == 0 /\ b2626^0-b2626^post10 == 0 /\ -__rho_3_^post10+__rho_3_^0 == 0 /\ -__rho_11_^post10+__rho_11_^0 == 0 /\ -__rho_12_^post10+__rho_12_^0 == 0 /\ -__rho_99_^post10+__rho_99_^0 == 0 /\ -i___01717^post10+i___01717^0 == 0 /\ -a2525^post10+a2525^0 == 0 /\ -a4343^post10+a4343^0 == 0 /\ b3535^0-b3535^post10 == 0 /\ AsyncAddressData^0-AsyncAddressData^post10 == 0 /\ -__rho_4_^post10+__rho_4_^0 == 0 /\ b3333^0-b3333^post10 == 0 /\ -k5^post10+k5^0 == 0 /\ __rho_1_^0-__rho_1_^post10 == 0 /\ -a3434^post10+a3434^0 == 0), cost: 1
  24: l8 -> l18 : i___01717^0'=i___01717^post24, IsochDetachData^0'=IsochDetachData^post24, ntStatus^0'=ntStatus^post24, __rho_6_^0'=__rho_6_^post24, k5^0'=k5^post24, __rho_2_^0'=__rho_2_^post24, a3838^0'=a3838^post24, a2828^0'=a2828^post24, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post24, b3535^0'=b3535^post24, CromData^0'=CromData^post24, b2626^0'=b2626^post24, __rho_4_^0'=__rho_4_^post24, k2^0'=k2^post24, __rho_12_^0'=__rho_12_^post24, i___02424^0'=i___02424^post24, a11^0'=a11^post24, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post24, __rho_8_^0'=__rho_8_^post24, keR^0'=keR^post24, a4444^0'=a4444^post24, a3232^0'=a3232^post24, ResourceIrp^0'=ResourceIrp^post24, i___01313^0'=i___01313^post24, Irql^0'=Irql^post24, b3333^0'=b3333^post24, __rho_5_^0'=__rho_5_^post24, k4^0'=k4^post24, __rho_1_^0'=__rho_1_^post24, i___04646^0'=i___04646^post24, a2525^0'=a2525^post24, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post24, __rho_9_^0'=__rho_9_^post24, AsyncAddressData^0'=AsyncAddressData^post24, b22^0'=b22^post24, a3737^0'=a3737^post24, k1^0'=k1^post24, __rho_11_^0'=__rho_11_^post24, i___02020^0'=i___02020^post24, IsochResourceData^0'=IsochResourceData^post24, pIrb^0'=pIrb^post24, __rho_7_^0'=__rho_7_^post24, keA^0'=keA^post24, __rho_3_^0'=__rho_3_^post24, a4343^0'=a4343^post24, a3131^0'=a3131^post24, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post24, i^0'=i^post24, Irp^0'=Irp^post24, b2929^0'=b2929^post24, __rho_56_^0'=__rho_56_^post24, k3^0'=k3^post24, __rho_13_^0'=__rho_13_^post24, i___04040^0'=i___04040^post24, a1818^0'=a1818^post24, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post24, __rho_99_^0'=__rho_99_^post24, a77^0'=a77^post24, a3434^0'=a3434^post24, i___099^0'=i___099^post24, __rho_10_^0'=__rho_10_^post24, (0 == 0 /\ Irp^0-Irp^post24 == 0 /\ __rho_56_^0-__rho_56_^post24 == 0 /\ __rho_6_^0-__rho_6_^post24 == 0 /\ b22^0-b22^post24 == 0 /\ a3838^0-a3838^post24 == 0 /\ -a3434^post24+a3434^0 == 0 /\ b2626^0-b2626^post24 == 0 /\ -a3737^post24+a3737^0 == 0 /\ -__rho_3_^post24+CromData^post24 == 0 /\ IsochDetachData^0-IsochDetachData^post24 == 0 /\ -__rho_99_^post24+__rho_99_^0 == 0 /\ __rho_1_^0-__rho_1_^post24 == 0 /\ b3535^0-b3535^post24 == 0 /\ -__rho_4_^post24+__rho_4_^0 == 0 /\ i___01717^0-i___01717^post24 == 0 /\ -__rho_13_^post24+__rho_13_^0 == 0 /\ 1+k1^post24-k1^0 == 0 /\ b3333^0-b3333^post24 == 0 /\ i___02424^0-i___02424^post24 == 0 /\ -k4^post24+k4^0 == 0 /\ -a4444^post24+a4444^0 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post24+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ -k3^post24+k3^0 == 0 /\ -a3131^post24+a3131^0 == 0 /\ keR^0-keR^post24 == 0 /\ a3232^0-a3232^post24 == 0 /\ __rho_5_^0-__rho_5_^post24 == 0 /\ -ret_ExAllocatePool3030^post24+ret_ExAllocatePool3030^0 == 0 /\ -__rho_11_^post24+__rho_11_^0 == 0 /\ -i___099^post24+i___099^0 == 0 /\ -a4343^post24+a4343^0 == 0 /\ -__rho_7_^post24+__rho_7_^0 == 0 /\ -a2525^post24+a2525^0 == 0 /\ k2^0-k2^post24 == 0 /\ i___04646^0-i___04646^post24 == 0 /\ ntStatus^0-ntStatus^post24 == 0 /\ -pIrb^post24+pIrb^0 == 0 /\ IsochResourceData^0-IsochResourceData^post24 == 0 /\ k5^0-k5^post24 == 0 /\ -i___02020^post24+i___02020^0 == 0 /\ a2828^0-a2828^post24 == 0 /\ __rho_8_^0-__rho_8_^post24 == 0 /\ -AsyncAddressData^post24+AsyncAddressData^0 == 0 /\ 1-k1^0 <= 0 /\ -b2929^post24+b2929^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post24 == 0 /\ -__rho_9_^post24+__rho_9_^0 == 0 /\ ResourceIrp^0-ResourceIrp^post24 == 0 /\ -i___01313^post24+i___01313^0 == 0 /\ __rho_2_^0-__rho_2_^post24 == 0 /\ keA^0-keA^post24 == 0 /\ -a77^post24+a77^0 == 0 /\ -a1818^post24+a1818^0 == 0 /\ -i^post24+i^0 == 0 /\ ret_IoAllocateIrp2727^0-ret_IoAllocateIrp2727^post24 == 0 /\ a11^0-a11^post24 == 0 /\ Irql^0-Irql^post24 == 0 /\ ret_IoSetDeviceInterfaceState44^0-ret_IoSetDeviceInterfaceState44^post24 == 0 /\ -__rho_10_^post24+__rho_10_^0 == 0 /\ -i___04040^post24+i___04040^0 == 0 /\ __rho_12_^0-__rho_12_^post24 == 0), cost: 1
  25: l8 -> l1 : i___01717^0'=i___01717^post25, IsochDetachData^0'=IsochDetachData^post25, ntStatus^0'=ntStatus^post25, __rho_6_^0'=__rho_6_^post25, k5^0'=k5^post25, __rho_2_^0'=__rho_2_^post25, a3838^0'=a3838^post25, a2828^0'=a2828^post25, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post25, b3535^0'=b3535^post25, CromData^0'=CromData^post25, b2626^0'=b2626^post25, __rho_4_^0'=__rho_4_^post25, k2^0'=k2^post25, __rho_12_^0'=__rho_12_^post25, i___02424^0'=i___02424^post25, a11^0'=a11^post25, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post25, __rho_8_^0'=__rho_8_^post25, keR^0'=keR^post25, a4444^0'=a4444^post25, a3232^0'=a3232^post25, ResourceIrp^0'=ResourceIrp^post25, i___01313^0'=i___01313^post25, Irql^0'=Irql^post25, b3333^0'=b3333^post25, __rho_5_^0'=__rho_5_^post25, k4^0'=k4^post25, __rho_1_^0'=__rho_1_^post25, i___04646^0'=i___04646^post25, a2525^0'=a2525^post25, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post25, __rho_9_^0'=__rho_9_^post25, AsyncAddressData^0'=AsyncAddressData^post25, b22^0'=b22^post25, a3737^0'=a3737^post25, k1^0'=k1^post25, __rho_11_^0'=__rho_11_^post25, i___02020^0'=i___02020^post25, IsochResourceData^0'=IsochResourceData^post25, pIrb^0'=pIrb^post25, __rho_7_^0'=__rho_7_^post25, keA^0'=keA^post25, __rho_3_^0'=__rho_3_^post25, a4343^0'=a4343^post25, a3131^0'=a3131^post25, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post25, i^0'=i^post25, Irp^0'=Irp^post25, b2929^0'=b2929^post25, __rho_56_^0'=__rho_56_^post25, k3^0'=k3^post25, __rho_13_^0'=__rho_13_^post25, i___04040^0'=i___04040^post25, a1818^0'=a1818^post25, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post25, __rho_99_^0'=__rho_99_^post25, a77^0'=a77^post25, a3434^0'=a3434^post25, i___099^0'=i___099^post25, __rho_10_^0'=__rho_10_^post25, (0 == 0 /\ __rho_9_^0-__rho_9_^post25 == 0 /\ a11^0-a11^post25 == 0 /\ -b2929^post25+b2929^0 == 0 /\ keR^210 == 0 /\ -__rho_11_^post25+__rho_11_^0 == 0 /\ a3838^0-a3838^post25 == 0 /\ k5^0-k5^post25 == 0 /\ -a77^post25+a77^0 == 0 /\ -k4^post25+k4^0 == 0 /\ -i___04040^post25+i___04040^0 == 0 /\ -__rho_10_^post25+__rho_10_^0 == 0 /\ -Irp^post25+Irp^0 == 0 /\ i___01717^0-i___01717^post25 == 0 /\ IsochResourceData^0-IsochResourceData^post25 == 0 /\ __rho_1_^0-__rho_1_^post25 == 0 /\ -1+keA^12 == 0 /\ -k1^post25+k1^0 == 0 /\ k2^post25-__rho_6_^post25 == 0 /\ -a1818^post25+a1818^0 == 0 /\ -__rho_12_^post25+__rho_12_^0 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post25+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ __rho_8_^0-__rho_8_^post25 == 0 /\ -a3131^post25+a3131^0 == 0 /\ -1+keR^110 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post25 == 0 /\ i^0-i^post25 == 0 /\ i___02424^0-i___02424^post25 == 0 /\ -a3434^post25+a3434^0 == 0 /\ -__rho_13_^post25+__rho_13_^0 == 0 /\ b2626^0-b2626^post25 == 0 /\ a3232^0-a3232^post25 == 0 /\ -i___01313^post25+i___01313^0 == 0 /\ -1+keR^310 == 0 /\ keA^post25 == 0 /\ __rho_3_^0-__rho_3_^post25 == 0 /\ k1^0 <= 0 /\ -__rho_5_^post25+__rho_5_^0 == 0 /\ a4343^0-a4343^post25 == 0 /\ __rho_2_^0-__rho_2_^post25 == 0 /\ a2828^0-a2828^post25 == 0 /\ CromData^0-CromData^post25 == 0 /\ -k3^post25+k3^0 == 0 /\ i___04646^0-i___04646^post25 == 0 /\ b22^0-b22^post25 == 0 /\ -__rho_56_^post25+__rho_56_^0 == 0 /\ ResourceIrp^0-ResourceIrp^post25 == 0 /\ -__rho_7_^post25+__rho_7_^0 == 0 /\ -ret_IoAllocateIrp2727^post25+ret_IoAllocateIrp2727^0 == 0 /\ b3535^0-b3535^post25 == 0 /\ keR^post25 == 0 /\ a4444^0-a4444^post25 == 0 /\ -ret_IoSetDeviceInterfaceState44^post25+ret_IoSetDeviceInterfaceState44^0 == 0 /\ -a2525^post25+a2525^0 == 0 /\ -IsochDetachData^post25+IsochDetachData^0 == 0 /\ -a3737^post25+a3737^0 == 0 /\ -Irql^0+i___099^post25 == 0 /\ -1+keA^320 == 0 /\ -__rho_99_^post25+__rho_99_^0 == 0 /\ -pIrb^post25+pIrb^0 == 0 /\ -b3333^post25+b3333^0 == 0 /\ AsyncAddressData^0-AsyncAddressData^post25 == 0 /\ -i___02020^post25+i___02020^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post25 == 0 /\ keA^220 == 0 /\ ntStatus^0-ntStatus^post25 == 0 /\ Irql^0-Irql^post25 == 0 /\ -__rho_4_^post25+__rho_4_^0 == 0), cost: 1
  11: l9 -> l6 : i___01717^0'=i___01717^post11, IsochDetachData^0'=IsochDetachData^post11, ntStatus^0'=ntStatus^post11, __rho_6_^0'=__rho_6_^post11, k5^0'=k5^post11, __rho_2_^0'=__rho_2_^post11, a3838^0'=a3838^post11, a2828^0'=a2828^post11, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post11, b3535^0'=b3535^post11, CromData^0'=CromData^post11, b2626^0'=b2626^post11, __rho_4_^0'=__rho_4_^post11, k2^0'=k2^post11, __rho_12_^0'=__rho_12_^post11, i___02424^0'=i___02424^post11, a11^0'=a11^post11, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post11, __rho_8_^0'=__rho_8_^post11, keR^0'=keR^post11, a4444^0'=a4444^post11, a3232^0'=a3232^post11, ResourceIrp^0'=ResourceIrp^post11, i___01313^0'=i___01313^post11, Irql^0'=Irql^post11, b3333^0'=b3333^post11, __rho_5_^0'=__rho_5_^post11, k4^0'=k4^post11, __rho_1_^0'=__rho_1_^post11, i___04646^0'=i___04646^post11, a2525^0'=a2525^post11, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post11, __rho_9_^0'=__rho_9_^post11, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=b22^post11, a3737^0'=a3737^post11, k1^0'=k1^post11, __rho_11_^0'=__rho_11_^post11, i___02020^0'=i___02020^post11, IsochResourceData^0'=IsochResourceData^post11, pIrb^0'=pIrb^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=keA^post11, __rho_3_^0'=__rho_3_^post11, a4343^0'=a4343^post11, a3131^0'=a3131^post11, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post11, i^0'=i^post11, Irp^0'=Irp^post11, b2929^0'=b2929^post11, __rho_56_^0'=__rho_56_^post11, k3^0'=k3^post11, __rho_13_^0'=__rho_13_^post11, i___04040^0'=i___04040^post11, a1818^0'=a1818^post11, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post11, __rho_99_^0'=__rho_99_^post11, a77^0'=a77^post11, a3434^0'=a3434^post11, i___099^0'=i___099^post11, __rho_10_^0'=__rho_10_^post11, (0 == 0 /\ ResourceIrp^0-ResourceIrp^post11 == 0 /\ a2525^0-a2525^post11 == 0 /\ -a77^post11+a77^0 == 0 /\ IsochDetachData^0-IsochDetachData^post11 == 0 /\ a3232^0-a3232^post11 == 0 /\ -IsochResourceData^post11+IsochResourceData^0 == 0 /\ -a1818^post11+a1818^0 == 0 /\ __rho_13_^0-__rho_13_^post11 == 0 /\ -__rho_3_^post11+__rho_3_^0 == 0 /\ -__rho_10_^post11+__rho_10_^0 == 0 /\ a11^0-a11^post11 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post11+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ __rho_6_^0-__rho_6_^post11 == 0 /\ -b22^post11+b22^0 == 0 /\ -k3^post11+k3^0 == 0 /\ -a3434^post11+a3434^0 == 0 /\ b3535^0-b3535^post11 == 0 /\ 1+k2^post11-k2^0 == 0 /\ k5^0-k5^post11 == 0 /\ -ret_IoAllocateIrp2727^post11+ret_IoAllocateIrp2727^0 == 0 /\ b2929^0-b2929^post11 == 0 /\ __rho_11_^0-__rho_11_^post11 == 0 /\ ret_IoSetDeviceInterfaceState44^0-ret_IoSetDeviceInterfaceState44^post11 == 0 /\ -i___02424^post11+i___02424^0 == 0 /\ ntStatus^0-ntStatus^post11 == 0 /\ -a3131^post11+a3131^0 == 0 /\ k1^0-k1^post11 == 0 /\ a2828^0-a2828^post11 == 0 /\ 1-k2^0 <= 0 /\ -__rho_56_^post11+__rho_56_^0 == 0 /\ -__rho_99_^post11+__rho_99_^0 == 0 /\ -i___099^post11+i___099^0 == 0 /\ -i^post11+i^0 == 0 /\ -__rho_1_^post11+__rho_1_^0 == 0 /\ __rho_5_^0-__rho_5_^post11 == 0 /\ -ret_t1394Diag_PnpStopDevice33^post11+ret_t1394Diag_PnpStopDevice33^0 == 0 /\ i___02020^0-i___02020^post11 == 0 /\ __rho_12_^0-__rho_12_^post11 == 0 /\ -__rho_8_^post11+__rho_8_^0 == 0 /\ -i___04040^post11+i___04040^0 == 0 /\ -a4343^post11+a4343^0 == 0 /\ a4444^0-a4444^post11 == 0 /\ a3838^0-a3838^post11 == 0 /\ b2626^0-b2626^post11 == 0 /\ i___01313^0-i___01313^post11 == 0 /\ keR^0-keR^post11 == 0 /\ -i___04646^post11+i___04646^0 == 0 /\ i___01717^0-i___01717^post11 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post11 == 0 /\ CromData^0-CromData^post11 == 0 /\ k4^0-k4^post11 == 0 /\ __rho_4_^0-__rho_4_^post11 == 0 /\ -keA^post11+keA^0 == 0 /\ -b3333^post11+b3333^0 == 0 /\ __rho_2_^0-__rho_2_^post11 == 0 /\ -pIrb^post11+pIrb^0 == 0 /\ -Irp^post11+Irp^0 == 0 /\ -a3737^post11+a3737^0 == 0 /\ -__rho_9_^post11+__rho_9_^0 == 0 /\ Irql^0-Irql^post11 == 0), cost: 1
  12: l9 -> l10 : i___01717^0'=i___01717^post12, IsochDetachData^0'=IsochDetachData^post12, ntStatus^0'=ntStatus^post12, __rho_6_^0'=__rho_6_^post12, k5^0'=k5^post12, __rho_2_^0'=__rho_2_^post12, a3838^0'=a3838^post12, a2828^0'=a2828^post12, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post12, b3535^0'=b3535^post12, CromData^0'=CromData^post12, b2626^0'=b2626^post12, __rho_4_^0'=__rho_4_^post12, k2^0'=k2^post12, __rho_12_^0'=__rho_12_^post12, i___02424^0'=i___02424^post12, a11^0'=a11^post12, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post12, __rho_8_^0'=__rho_8_^post12, keR^0'=keR^post12, a4444^0'=a4444^post12, a3232^0'=a3232^post12, ResourceIrp^0'=ResourceIrp^post12, i___01313^0'=i___01313^post12, Irql^0'=Irql^post12, b3333^0'=b3333^post12, __rho_5_^0'=__rho_5_^post12, k4^0'=k4^post12, __rho_1_^0'=__rho_1_^post12, i___04646^0'=i___04646^post12, a2525^0'=a2525^post12, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post12, __rho_9_^0'=__rho_9_^post12, AsyncAddressData^0'=AsyncAddressData^post12, b22^0'=b22^post12, a3737^0'=a3737^post12, k1^0'=k1^post12, __rho_11_^0'=__rho_11_^post12, i___02020^0'=i___02020^post12, IsochResourceData^0'=IsochResourceData^post12, pIrb^0'=pIrb^post12, __rho_7_^0'=__rho_7_^post12, keA^0'=keA^post12, __rho_3_^0'=__rho_3_^post12, a4343^0'=a4343^post12, a3131^0'=a3131^post12, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post12, i^0'=i^post12, Irp^0'=Irp^post12, b2929^0'=b2929^post12, __rho_56_^0'=__rho_56_^post12, k3^0'=k3^post12, __rho_13_^0'=__rho_13_^post12, i___04040^0'=i___04040^post12, a1818^0'=a1818^post12, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post12, __rho_99_^0'=__rho_99_^post12, a77^0'=a77^post12, a3434^0'=a3434^post12, i___099^0'=i___099^post12, __rho_10_^0'=__rho_10_^post12, (-i___02424^post12+i___02424^0 == 0 /\ __rho_11_^0-__rho_11_^post12 == 0 /\ a3131^0-a3131^post12 == 0 /\ i^0-i^post12 == 0 /\ -a3232^post12+a3232^0 == 0 /\ k3^0-k3^post12 == 0 /\ -b3333^post12+b3333^0 == 0 /\ -1+keR^10 == 0 /\ -i___02020^post12+i___02020^0 == 0 /\ __rho_4_^0-__rho_4_^post12 == 0 /\ -a77^post12+a77^0 == 0 /\ -__rho_8_^post12+__rho_8_^0 == 0 /\ -keA^post12+keA^0 == 0 /\ k2^0 <= 0 /\ -IsochResourceData^post12+IsochResourceData^0 == 0 /\ Irp^0-Irp^post12 == 0 /\ -i___04040^post12+i___04040^0 == 0 /\ b3535^0-b3535^post12 == 0 /\ a3737^0-a3737^post12 == 0 /\ keR^post12 == 0 /\ -1+keR^30 == 0 /\ k5^0-k5^post12 == 0 /\ -__rho_10_^post12+__rho_10_^0 == 0 /\ ntStatus^0-ntStatus^post12 == 0 /\ -a1818^post12+a1818^0 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post12+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ -__rho_1_^post12+__rho_1_^0 == 0 /\ -a3434^post12+a3434^0 == 0 /\ IsochDetachData^0-IsochDetachData^post12 == 0 /\ -b2929^post12+b2929^0 == 0 /\ __rho_2_^0-__rho_2_^post12 == 0 /\ -k1^post12+k1^0 == 0 /\ -a11^post12+a11^0 == 0 /\ -k2^post12+k2^0 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post12 == 0 /\ __rho_9_^0-__rho_9_^post12 == 0 /\ -ret_IoAllocateIrp2727^post12+ret_IoAllocateIrp2727^0 == 0 /\ -__rho_56_^post12+__rho_56_^0 == 0 /\ -__rho_13_^post12+__rho_13_^0 == 0 /\ keR^20 == 0 /\ -i___04646^post12+i___04646^0 == 0 /\ Irql^0-Irql^post12 == 0 /\ a3838^0-a3838^post12 == 0 /\ a4444^0-a4444^post12 == 0 /\ b2626^0-b2626^post12 == 0 /\ -b22^post12+b22^0 == 0 /\ a2525^0-a2525^post12 == 0 /\ -a4343^post12+a4343^0 == 0 /\ a2828^0-a2828^post12 == 0 /\ -__rho_5_^post12+__rho_5_^0 == 0 /\ -__rho_7_^post12+__rho_7_^0 == 0 /\ i___01717^0-i___01717^post12 == 0 /\ -__rho_6_^post12+__rho_6_^0 == 0 /\ __rho_12_^0-__rho_12_^post12 == 0 /\ -i___099^post12+i___099^0 == 0 /\ CromData^0-CromData^post12 == 0 /\ k4^0-k4^post12 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post12 == 0 /\ -__rho_99_^post12+__rho_99_^0 == 0 /\ AsyncAddressData^0-AsyncAddressData^post12 == 0 /\ -ret_IoSetDeviceInterfaceState44^post12+ret_IoSetDeviceInterfaceState44^0 == 0 /\ __rho_3_^0-__rho_3_^post12 == 0 /\ pIrb^0-pIrb^post12 == 0 /\ -Irql^0+i___01313^post12 == 0 /\ ResourceIrp^0-ResourceIrp^post12 == 0), cost: 1
  14: l10 -> l11 : i___01717^0'=i___01717^post14, IsochDetachData^0'=IsochDetachData^post14, ntStatus^0'=ntStatus^post14, __rho_6_^0'=__rho_6_^post14, k5^0'=k5^post14, __rho_2_^0'=__rho_2_^post14, a3838^0'=a3838^post14, a2828^0'=a2828^post14, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post14, b3535^0'=b3535^post14, CromData^0'=CromData^post14, b2626^0'=b2626^post14, __rho_4_^0'=__rho_4_^post14, k2^0'=k2^post14, __rho_12_^0'=__rho_12_^post14, i___02424^0'=i___02424^post14, a11^0'=a11^post14, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post14, __rho_8_^0'=__rho_8_^post14, keR^0'=keR^post14, a4444^0'=a4444^post14, a3232^0'=a3232^post14, ResourceIrp^0'=ResourceIrp^post14, i___01313^0'=i___01313^post14, Irql^0'=Irql^post14, b3333^0'=b3333^post14, __rho_5_^0'=__rho_5_^post14, k4^0'=k4^post14, __rho_1_^0'=__rho_1_^post14, i___04646^0'=i___04646^post14, a2525^0'=a2525^post14, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post14, __rho_9_^0'=__rho_9_^post14, AsyncAddressData^0'=AsyncAddressData^post14, b22^0'=b22^post14, a3737^0'=a3737^post14, k1^0'=k1^post14, __rho_11_^0'=__rho_11_^post14, i___02020^0'=i___02020^post14, IsochResourceData^0'=IsochResourceData^post14, pIrb^0'=pIrb^post14, __rho_7_^0'=__rho_7_^post14, keA^0'=keA^post14, __rho_3_^0'=__rho_3_^post14, a4343^0'=a4343^post14, a3131^0'=a3131^post14, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post14, i^0'=i^post14, Irp^0'=Irp^post14, b2929^0'=b2929^post14, __rho_56_^0'=__rho_56_^post14, k3^0'=k3^post14, __rho_13_^0'=__rho_13_^post14, i___04040^0'=i___04040^post14, a1818^0'=a1818^post14, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post14, __rho_99_^0'=__rho_99_^post14, a77^0'=a77^post14, a3434^0'=a3434^post14, i___099^0'=i___099^post14, __rho_10_^0'=__rho_10_^post14, (0 == 0 /\ -pIrb^post14+pIrb^0 == 0 /\ -1+keA^10 == 0 /\ __rho_12_^0-__rho_12_^post14 == 0 /\ -a1818^post14+a1818^0 == 0 /\ __rho_6_^0-__rho_6_^post14 == 0 /\ -a3131^post14+a3131^0 == 0 /\ -__rho_56_^post14+__rho_56_^0 == 0 /\ ntStatus^0-ntStatus^post14 == 0 /\ IsochDetachData^0-IsochDetachData^post14 == 0 /\ -i^post14+i^0 == 0 /\ keA^post14 == 0 /\ __rho_13_^0-__rho_13_^post14 == 0 /\ Irql^0-Irql^post14 == 0 /\ __rho_8_^0-__rho_8_^post14 == 0 /\ -IsochResourceData^post14+IsochResourceData^0 == 0 /\ -__rho_1_^post14+__rho_1_^0 == 0 /\ keR^0-keR^post14 == 0 /\ -i___099^post14+i___099^0 == 0 /\ k1^0-k1^post14 == 0 /\ -1+keA^30 == 0 /\ a11^0-a11^post14 == 0 /\ i___02424^0-i___02424^post14 == 0 /\ i___01717^0-i___01717^post14 == 0 /\ -i___04040^post14+i___04040^0 == 0 /\ a3232^0-a3232^post14 == 0 /\ -__rho_3_^post14+__rho_3_^0 == 0 /\ b3333^0-b3333^post14 == 0 /\ -__rho_9_^post14+__rho_9_^0 == 0 /\ -AsyncAddressData^post14+AsyncAddressData^0 == 0 /\ -i___04646^post14+i___04646^0 == 0 /\ -b2929^post14+b2929^0 == 0 /\ -CromData^post14+CromData^0 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post14+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ -ret_IoAllocateIrp2727^post14+ret_IoAllocateIrp2727^0 == 0 /\ __rho_11_^0-__rho_11_^post14 == 0 /\ -a3737^post14+a3737^0 == 0 /\ -a4343^post14+a4343^0 == 0 /\ a3838^0-a3838^post14 == 0 /\ __rho_5_^0-__rho_5_^post14 == 0 /\ -a77^post14+a77^0 == 0 /\ a2828^0-a2828^post14 == 0 /\ k5^0-k5^post14 == 0 /\ k2^0-k2^post14 == 0 /\ -i___01313^post14+i___01313^0 == 0 /\ ResourceIrp^0-ResourceIrp^post14 == 0 /\ __rho_99_^0-__rho_99_^post14 == 0 /\ -Irp^post14+Irp^0 == 0 /\ -__rho_2_^post14+__rho_2_^0 == 0 /\ i___02020^0-i___02020^post14 == 0 /\ k4^0-k4^post14 == 0 /\ -__rho_4_^post14+__rho_4_^0 == 0 /\ -ret_IoSetDeviceInterfaceState44^post14+ret_IoSetDeviceInterfaceState44^0 == 0 /\ -__rho_10_^post14+k3^post14 == 0 /\ -a4444^post14+a4444^0 == 0 /\ -a2525^post14+a2525^0 == 0 /\ b2626^0-b2626^post14 == 0 /\ -b22^post14+b22^0 == 0 /\ __rho_7_^0-__rho_7_^post14 == 0 /\ keA^20 == 0 /\ -a3434^post14+a3434^0 == 0 /\ -b3535^post14+b3535^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post14 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post14 == 0), cost: 1
  48: l11 -> l15 : i___01717^0'=i___01717^post48, IsochDetachData^0'=IsochDetachData^post48, ntStatus^0'=ntStatus^post48, __rho_6_^0'=__rho_6_^post48, k5^0'=k5^post48, __rho_2_^0'=__rho_2_^post48, a3838^0'=a3838^post48, a2828^0'=a2828^post48, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post48, b3535^0'=b3535^post48, CromData^0'=CromData^post48, b2626^0'=b2626^post48, __rho_4_^0'=__rho_4_^post48, k2^0'=k2^post48, __rho_12_^0'=__rho_12_^post48, i___02424^0'=i___02424^post48, a11^0'=a11^post48, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post48, __rho_8_^0'=__rho_8_^post48, keR^0'=keR^post48, a4444^0'=a4444^post48, a3232^0'=a3232^post48, ResourceIrp^0'=ResourceIrp^post48, i___01313^0'=i___01313^post48, Irql^0'=Irql^post48, b3333^0'=b3333^post48, __rho_5_^0'=__rho_5_^post48, k4^0'=k4^post48, __rho_1_^0'=__rho_1_^post48, i___04646^0'=i___04646^post48, a2525^0'=a2525^post48, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post48, __rho_9_^0'=__rho_9_^post48, AsyncAddressData^0'=AsyncAddressData^post48, b22^0'=b22^post48, a3737^0'=a3737^post48, k1^0'=k1^post48, __rho_11_^0'=__rho_11_^post48, i___02020^0'=i___02020^post48, IsochResourceData^0'=IsochResourceData^post48, pIrb^0'=pIrb^post48, __rho_7_^0'=__rho_7_^post48, keA^0'=keA^post48, __rho_3_^0'=__rho_3_^post48, a4343^0'=a4343^post48, a3131^0'=a3131^post48, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post48, i^0'=i^post48, Irp^0'=Irp^post48, b2929^0'=b2929^post48, __rho_56_^0'=__rho_56_^post48, k3^0'=k3^post48, __rho_13_^0'=__rho_13_^post48, i___04040^0'=i___04040^post48, a1818^0'=a1818^post48, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post48, __rho_99_^0'=__rho_99_^post48, a77^0'=a77^post48, a3434^0'=a3434^post48, i___099^0'=i___099^post48, __rho_10_^0'=__rho_10_^post48, (0 == 0 /\ a3838^0-a3838^post48 == 0 /\ i^0-i^post48 == 0 /\ keR^250 == 0 /\ __rho_56_^0-__rho_56_^post48 == 0 /\ i___04646^0-i___04646^post48 == 0 /\ -a77^post48+a77^0 == 0 /\ -keA^post48+keA^0 == 0 /\ a3737^0-a3737^post48 == 0 /\ -__rho_99_^post48+__rho_99_^0 == 0 /\ -i___04040^post48+i___04040^0 == 0 /\ -__rho_11_^post48+k4^post48 == 0 /\ -1+keR^122 == 0 /\ -b2626^post48+b2626^0 == 0 /\ __rho_3_^0-__rho_3_^post48 == 0 /\ -__rho_5_^post48+__rho_5_^0 == 0 /\ a2828^0-a2828^post48 == 0 /\ k5^0-k5^post48 == 0 /\ -a11^post48+a11^0 == 0 /\ -a3131^post48+a3131^0 == 0 /\ -a3434^post48+a3434^0 == 0 /\ __rho_8_^0-__rho_8_^post48 == 0 /\ keR^post48 == 0 /\ i___01313^0-i___01313^post48 == 0 /\ __rho_2_^0-__rho_2_^post48 == 0 /\ -Irql^post48+Irql^0 == 0 /\ -1+keR^350 == 0 /\ -b3333^post48+b3333^0 == 0 /\ -i___099^post48+i___099^0 == 0 /\ __rho_4_^0-__rho_4_^post48 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post48 == 0 /\ -AsyncAddressData^post48+AsyncAddressData^0 == 0 /\ -b2929^post48+b2929^0 == 0 /\ -a1818^post48+a1818^0 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post48+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ -ResourceIrp^post48+ResourceIrp^0 == 0 /\ a4444^0-a4444^post48 == 0 /\ -i___02424^post48+i___02424^0 == 0 /\ __rho_6_^0-__rho_6_^post48 == 0 /\ -IsochResourceData^post48+IsochResourceData^0 == 0 /\ ntStatus^0-ntStatus^post48 == 0 /\ -ret_IoSetDeviceInterfaceState44^post48+ret_IoSetDeviceInterfaceState44^0 == 0 /\ i___02020^post48-Irql^0 == 0 /\ -__rho_1_^post48+__rho_1_^0 == 0 /\ a2525^0-a2525^post48 == 0 /\ -a3232^post48+a3232^0 == 0 /\ -__rho_13_^post48+__rho_13_^0 == 0 /\ b3535^0-b3535^post48 == 0 /\ -__rho_10_^post48+__rho_10_^0 == 0 /\ k2^0-k2^post48 == 0 /\ IsochDetachData^0-IsochDetachData^post48 == 0 /\ -Irp^post48+Irp^0 == 0 /\ -k1^post48+k1^0 == 0 /\ pIrb^0-pIrb^post48 == 0 /\ -k3^post48+k3^0 == 0 /\ -a4343^post48+a4343^0 == 0 /\ k3^0 <= 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post48 == 0 /\ -__rho_7_^post48+__rho_7_^0 == 0 /\ b22^0-b22^post48 == 0 /\ __rho_12_^0-__rho_12_^post48 == 0 /\ __rho_9_^0-__rho_9_^post48 == 0 /\ CromData^0-CromData^post48 == 0 /\ ret_IoAllocateIrp2727^0-ret_IoAllocateIrp2727^post48 == 0 /\ i___01717^0-i___01717^post48 == 0), cost: 1
  49: l11 -> l10 : i___01717^0'=i___01717^post49, IsochDetachData^0'=IsochDetachData^post49, ntStatus^0'=ntStatus^post49, __rho_6_^0'=__rho_6_^post49, k5^0'=k5^post49, __rho_2_^0'=__rho_2_^post49, a3838^0'=a3838^post49, a2828^0'=a2828^post49, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post49, b3535^0'=b3535^post49, CromData^0'=CromData^post49, b2626^0'=b2626^post49, __rho_4_^0'=__rho_4_^post49, k2^0'=k2^post49, __rho_12_^0'=__rho_12_^post49, i___02424^0'=i___02424^post49, a11^0'=a11^post49, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post49, __rho_8_^0'=__rho_8_^post49, keR^0'=keR^post49, a4444^0'=a4444^post49, a3232^0'=a3232^post49, ResourceIrp^0'=ResourceIrp^post49, i___01313^0'=i___01313^post49, Irql^0'=Irql^post49, b3333^0'=b3333^post49, __rho_5_^0'=__rho_5_^post49, k4^0'=k4^post49, __rho_1_^0'=__rho_1_^post49, i___04646^0'=i___04646^post49, a2525^0'=a2525^post49, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post49, __rho_9_^0'=__rho_9_^post49, AsyncAddressData^0'=AsyncAddressData^post49, b22^0'=b22^post49, a3737^0'=a3737^post49, k1^0'=k1^post49, __rho_11_^0'=__rho_11_^post49, i___02020^0'=i___02020^post49, IsochResourceData^0'=IsochResourceData^post49, pIrb^0'=pIrb^post49, __rho_7_^0'=__rho_7_^post49, keA^0'=keA^post49, __rho_3_^0'=__rho_3_^post49, a4343^0'=a4343^post49, a3131^0'=a3131^post49, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post49, i^0'=i^post49, Irp^0'=Irp^post49, b2929^0'=b2929^post49, __rho_56_^0'=__rho_56_^post49, k3^0'=k3^post49, __rho_13_^0'=__rho_13_^post49, i___04040^0'=i___04040^post49, a1818^0'=a1818^post49, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post49, __rho_99_^0'=__rho_99_^post49, a77^0'=a77^post49, a3434^0'=a3434^post49, i___099^0'=i___099^post49, __rho_10_^0'=__rho_10_^post49, (0 == 0 /\ a1818^post49-IsochDetachData^post49 == 0 /\ -a77^post49+a77^0 == 0 /\ -__rho_12_^post49+__rho_12_^0 == 0 /\ keR^post49 == 0 /\ -IsochResourceData^post49+IsochResourceData^0 == 0 /\ __rho_1_^0-__rho_1_^post49 == 0 /\ k5^0-k5^post49 == 0 /\ -i___04646^post49+i___04646^0 == 0 /\ -a4444^post49+a4444^0 == 0 /\ k2^0-k2^post49 == 0 /\ -ret_IoAllocateIrp2727^post49+ret_IoAllocateIrp2727^0 == 0 /\ -Irql^0+i___01717^post49 == 0 /\ -i___099^post49+i___099^0 == 0 /\ -b22^post49+b22^0 == 0 /\ a11^0-a11^post49 == 0 /\ -a3232^post49+a3232^0 == 0 /\ -b2929^post49+b2929^0 == 0 /\ __rho_7_^0-__rho_7_^post49 == 0 /\ -a2525^post49+a2525^0 == 0 /\ 1-k3^0 <= 0 /\ -a3434^post49+a3434^0 == 0 /\ __rho_9_^0-__rho_9_^post49 == 0 /\ a2828^0-a2828^post49 == 0 /\ a3838^0-a3838^post49 == 0 /\ __rho_5_^0-__rho_5_^post49 == 0 /\ -1+keR^130 == 0 /\ -__rho_99_^post49+__rho_99_^0 == 0 /\ b2626^0-b2626^post49 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post49+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ AsyncAddressData^0-AsyncAddressData^post49 == 0 /\ -i___04040^post49+i___04040^0 == 0 /\ ntStatus^0-ntStatus^post49 == 0 /\ -ResourceIrp^post49+ResourceIrp^0 == 0 /\ -__rho_56_^post49+__rho_56_^0 == 0 /\ i___02424^0-i___02424^post49 == 0 /\ a3131^0-a3131^post49 == 0 /\ -pIrb^post49+pIrb^0 == 0 /\ -ret_t1394Diag_PnpStopDevice33^post49+ret_t1394Diag_PnpStopDevice33^0 == 0 /\ b3535^0-b3535^post49 == 0 /\ -__rho_11_^post49+__rho_11_^0 == 0 /\ -k4^post49+k4^0 == 0 /\ -keA^post49+keA^0 == 0 /\ -1+keR^360 == 0 /\ i___02020^0-i___02020^post49 == 0 /\ -__rho_13_^post49+__rho_13_^0 == 0 /\ 1+k3^post49-k3^0 == 0 /\ b3333^0-b3333^post49 == 0 /\ -Irp^post49+Irp^0 == 0 /\ k1^0-k1^post49 == 0 /\ __rho_2_^0-__rho_2_^post49 == 0 /\ -__rho_10_^post49+__rho_10_^0 == 0 /\ i___01313^0-i___01313^post49 == 0 /\ __rho_8_^0-__rho_8_^post49 == 0 /\ ret_IoSetDeviceInterfaceState44^0-ret_IoSetDeviceInterfaceState44^post49 == 0 /\ CromData^0-CromData^post49 == 0 /\ -__rho_3_^post49+__rho_3_^0 == 0 /\ Irql^0-Irql^post49 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post49 == 0 /\ keR^260 == 0 /\ __rho_6_^0-__rho_6_^post49 == 0 /\ __rho_4_^0-__rho_4_^post49 == 0 /\ a4343^0-a4343^post49 == 0 /\ -a3737^post49+a3737^0 == 0), cost: 1
  15: l12 -> l7 : i___01717^0'=i___01717^post15, IsochDetachData^0'=IsochDetachData^post15, ntStatus^0'=ntStatus^post15, __rho_6_^0'=__rho_6_^post15, k5^0'=k5^post15, __rho_2_^0'=__rho_2_^post15, a3838^0'=a3838^post15, a2828^0'=a2828^post15, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post15, b3535^0'=b3535^post15, CromData^0'=CromData^post15, b2626^0'=b2626^post15, __rho_4_^0'=__rho_4_^post15, k2^0'=k2^post15, __rho_12_^0'=__rho_12_^post15, i___02424^0'=i___02424^post15, a11^0'=a11^post15, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post15, __rho_8_^0'=__rho_8_^post15, keR^0'=keR^post15, a4444^0'=a4444^post15, a3232^0'=a3232^post15, ResourceIrp^0'=ResourceIrp^post15, i___01313^0'=i___01313^post15, Irql^0'=Irql^post15, b3333^0'=b3333^post15, __rho_5_^0'=__rho_5_^post15, k4^0'=k4^post15, __rho_1_^0'=__rho_1_^post15, i___04646^0'=i___04646^post15, a2525^0'=a2525^post15, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post15, __rho_9_^0'=__rho_9_^post15, AsyncAddressData^0'=AsyncAddressData^post15, b22^0'=b22^post15, a3737^0'=a3737^post15, k1^0'=k1^post15, __rho_11_^0'=__rho_11_^post15, i___02020^0'=i___02020^post15, IsochResourceData^0'=IsochResourceData^post15, pIrb^0'=pIrb^post15, __rho_7_^0'=__rho_7_^post15, keA^0'=keA^post15, __rho_3_^0'=__rho_3_^post15, a4343^0'=a4343^post15, a3131^0'=a3131^post15, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post15, i^0'=i^post15, Irp^0'=Irp^post15, b2929^0'=b2929^post15, __rho_56_^0'=__rho_56_^post15, k3^0'=k3^post15, __rho_13_^0'=__rho_13_^post15, i___04040^0'=i___04040^post15, a1818^0'=a1818^post15, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post15, __rho_99_^0'=__rho_99_^post15, a77^0'=a77^post15, a3434^0'=a3434^post15, i___099^0'=i___099^post15, __rho_10_^0'=__rho_10_^post15, (-ret_t1394Diag_PnpStopDevice33^post15+ret_t1394Diag_PnpStopDevice33^0 == 0 /\ a3737^0-a3737^post15 == 0 /\ __rho_8_^0-__rho_8_^post15 == 0 /\ __rho_13_^0-__rho_13_^post15 == 0 /\ -i___01313^post15+i___01313^0 == 0 /\ k5^0-k5^post15 == 0 /\ -AsyncAddressData^post15+AsyncAddressData^0 == 0 /\ ret_t1394_SubmitIrpSynch3636^0-ret_t1394_SubmitIrpSynch3636^post15 == 0 /\ b3333^0-b3333^post15 == 0 /\ -k1^post15+k1^0 == 0 /\ i^0-i^post15 == 0 /\ -CromData^post15+CromData^0 == 0 /\ -i___099^post15+i___099^0 == 0 /\ -ret_IoSetDeviceInterfaceState44^post15+ret_IoSetDeviceInterfaceState44^0 == 0 /\ a2525^0-a2525^post15 == 0 /\ IsochDetachData^0-IsochDetachData^post15 == 0 /\ -i___04040^post15+i___04040^0 == 0 /\ -a3434^post15+a3434^0 == 0 /\ -Irp^post15+Irp^0 == 0 /\ -__rho_10_^post15+__rho_10_^0 == 0 /\ a2828^0-a2828^post15 == 0 /\ -__rho_5_^post15+__rho_5_^0 == 0 /\ -__rho_99_^post15+__rho_99_^0 == 0 /\ -b2929^post15+b2929^0 == 0 /\ ResourceIrp^0-ResourceIrp^post15 == 0 /\ a3838^0-a3838^post15 == 0 /\ -i___02020^post15+i___02020^0 == 0 /\ a4444^0-a4444^post15 == 0 /\ a11^0-a11^post15 == 0 /\ ntStatus^0-ntStatus^post15 == 0 /\ -__rho_56_^post15+__rho_56_^0 == 0 /\ keR^0-keR^post15 == 0 /\ -__rho_7_^post15+__rho_7_^0 == 0 /\ -a1818^post15+a1818^0 == 0 /\ -pIrb^post15+pIrb^0 == 0 /\ b3535^0-b3535^post15 == 0 /\ __rho_3_^0-__rho_3_^post15 == 0 /\ -__rho_11_^post15+__rho_11_^0 == 0 /\ -a3131^post15+a3131^0 == 0 /\ b2626^0-b2626^post15 == 0 /\ -k4^post15+k4^0 == 0 /\ i___02424^0-i___02424^post15 == 0 /\ __rho_4_^0-__rho_4_^post15 == 0 /\ __rho_2_^0-__rho_2_^post15 == 0 /\ -IsochResourceData^post15+IsochResourceData^0 == 0 /\ __rho_9_^0-__rho_9_^post15 == 0 /\ a3232^0-a3232^post15 == 0 /\ ret_IoAllocateIrp2727^0-ret_IoAllocateIrp2727^post15 == 0 /\ -a4343^post15+a4343^0 == 0 /\ -__rho_12_^post15+__rho_12_^0 == 0 /\ -k3^post15+k3^0 == 0 /\ i___01717^0-i___01717^post15 == 0 /\ i___04646^0-i___04646^post15 == 0 /\ -__rho_1_^post15+__rho_1_^0 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post15 == 0 /\ k2^0-k2^post15 == 0 /\ __rho_6_^0-__rho_6_^post15 == 0 /\ b22^0-b22^post15 == 0 /\ -Irql^post15+Irql^0 == 0 /\ a77^post15-CromData^0 == 0 /\ -keA^post15+keA^0 == 0), cost: 1
  16: l13 -> l12 : i___01717^0'=i___01717^post16, IsochDetachData^0'=IsochDetachData^post16, ntStatus^0'=ntStatus^post16, __rho_6_^0'=__rho_6_^post16, k5^0'=k5^post16, __rho_2_^0'=__rho_2_^post16, a3838^0'=a3838^post16, a2828^0'=a2828^post16, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post16, b3535^0'=b3535^post16, CromData^0'=CromData^post16, b2626^0'=b2626^post16, __rho_4_^0'=__rho_4_^post16, k2^0'=k2^post16, __rho_12_^0'=__rho_12_^post16, i___02424^0'=i___02424^post16, a11^0'=a11^post16, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post16, __rho_8_^0'=__rho_8_^post16, keR^0'=keR^post16, a4444^0'=a4444^post16, a3232^0'=a3232^post16, ResourceIrp^0'=ResourceIrp^post16, i___01313^0'=i___01313^post16, Irql^0'=Irql^post16, b3333^0'=b3333^post16, __rho_5_^0'=__rho_5_^post16, k4^0'=k4^post16, __rho_1_^0'=__rho_1_^post16, i___04646^0'=i___04646^post16, a2525^0'=a2525^post16, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post16, __rho_9_^0'=__rho_9_^post16, AsyncAddressData^0'=AsyncAddressData^post16, b22^0'=b22^post16, a3737^0'=a3737^post16, k1^0'=k1^post16, __rho_11_^0'=__rho_11_^post16, i___02020^0'=i___02020^post16, IsochResourceData^0'=IsochResourceData^post16, pIrb^0'=pIrb^post16, __rho_7_^0'=__rho_7_^post16, keA^0'=keA^post16, __rho_3_^0'=__rho_3_^post16, a4343^0'=a4343^post16, a3131^0'=a3131^post16, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post16, i^0'=i^post16, Irp^0'=Irp^post16, b2929^0'=b2929^post16, __rho_56_^0'=__rho_56_^post16, k3^0'=k3^post16, __rho_13_^0'=__rho_13_^post16, i___04040^0'=i___04040^post16, a1818^0'=a1818^post16, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post16, __rho_99_^0'=__rho_99_^post16, a77^0'=a77^post16, a3434^0'=a3434^post16, i___099^0'=i___099^post16, __rho_10_^0'=__rho_10_^post16, (-b22^post16+b22^0 == 0 /\ -ret_IoAllocateIrp2727^post16+ret_IoAllocateIrp2727^0 == 0 /\ -__rho_1_^post16+__rho_1_^0 == 0 /\ -a3434^post16+a3434^0 == 0 /\ -IsochResourceData^post16+IsochResourceData^0 == 0 /\ -__rho_3_^post16+__rho_3_^0 == 0 /\ __rho_11_^0-__rho_11_^post16 == 0 /\ a2525^0-a2525^post16 == 0 /\ -__rho_13_^post16+__rho_13_^0 == 0 /\ -k4^post16+k4^0 == 0 /\ -Irp^post16+Irp^0 == 0 /\ -ret_IoSetDeviceInterfaceState44^post16+ret_IoSetDeviceInterfaceState44^0 == 0 /\ a4444^0-a4444^post16 == 0 /\ -a4343^post16+a4343^0 == 0 /\ a3737^0-a3737^post16 == 0 /\ ResourceIrp^0-ResourceIrp^post16 == 0 /\ i___04646^0-i___04646^post16 == 0 /\ -__rho_99_^post16+__rho_99_^0 == 0 /\ a11^0-a11^post16 == 0 /\ k5^0-k5^post16 == 0 /\ -k2^post16+k2^0 == 0 /\ b3535^0-b3535^post16 == 0 /\ b2929^0-b2929^post16 == 0 /\ ntStatus^0-ntStatus^post16 == 0 /\ __rho_5_^0 <= 0 /\ a2828^0-a2828^post16 == 0 /\ -k3^post16+k3^0 == 0 /\ -__rho_8_^post16+__rho_8_^0 == 0 /\ IsochDetachData^0-IsochDetachData^post16 == 0 /\ -__rho_12_^post16+__rho_12_^0 == 0 /\ -__rho_7_^post16+__rho_7_^0 == 0 /\ -__rho_5_^post16+__rho_5_^0 == 0 /\ __rho_4_^0-__rho_4_^post16 == 0 /\ __rho_2_^0-__rho_2_^post16 == 0 /\ -CromData^post16+CromData^0 == 0 /\ pIrb^0-pIrb^post16 == 0 /\ -i^post16+i^0 == 0 /\ a3838^0-a3838^post16 == 0 /\ -__rho_56_^post16+__rho_56_^0 == 0 /\ -Irql^post16+Irql^0 == 0 /\ a77^0-a77^post16 == 0 /\ i___01717^0-i___01717^post16 == 0 /\ __rho_9_^0-__rho_9_^post16 == 0 /\ i___02424^0-i___02424^post16 == 0 /\ -k1^post16+k1^0 == 0 /\ -a3131^post16+a3131^0 == 0 /\ b3333^0-b3333^post16 == 0 /\ __rho_6_^0-__rho_6_^post16 == 0 /\ -i___02020^post16+i___02020^0 == 0 /\ -ret_t1394Diag_PnpStopDevice33^post16+ret_t1394Diag_PnpStopDevice33^0 == 0 /\ -i___099^post16+i___099^0 == 0 /\ b2626^0-b2626^post16 == 0 /\ i___01313^0-i___01313^post16 == 0 /\ a3232^0-a3232^post16 == 0 /\ -i___04040^post16+i___04040^0 == 0 /\ -__rho_10_^post16+__rho_10_^0 == 0 /\ -keA^post16+keA^0 == 0 /\ -AsyncAddressData^post16+AsyncAddressData^0 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post16 == 0 /\ keR^0-keR^post16 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post16+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ a1818^0-a1818^post16 == 0), cost: 1
  17: l13 -> l12 : i___01717^0'=i___01717^post17, IsochDetachData^0'=IsochDetachData^post17, ntStatus^0'=ntStatus^post17, __rho_6_^0'=__rho_6_^post17, k5^0'=k5^post17, __rho_2_^0'=__rho_2_^post17, a3838^0'=a3838^post17, a2828^0'=a2828^post17, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post17, b3535^0'=b3535^post17, CromData^0'=CromData^post17, b2626^0'=b2626^post17, __rho_4_^0'=__rho_4_^post17, k2^0'=k2^post17, __rho_12_^0'=__rho_12_^post17, i___02424^0'=i___02424^post17, a11^0'=a11^post17, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post17, __rho_8_^0'=__rho_8_^post17, keR^0'=keR^post17, a4444^0'=a4444^post17, a3232^0'=a3232^post17, ResourceIrp^0'=ResourceIrp^post17, i___01313^0'=i___01313^post17, Irql^0'=Irql^post17, b3333^0'=b3333^post17, __rho_5_^0'=__rho_5_^post17, k4^0'=k4^post17, __rho_1_^0'=__rho_1_^post17, i___04646^0'=i___04646^post17, a2525^0'=a2525^post17, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post17, __rho_9_^0'=__rho_9_^post17, AsyncAddressData^0'=AsyncAddressData^post17, b22^0'=b22^post17, a3737^0'=a3737^post17, k1^0'=k1^post17, __rho_11_^0'=__rho_11_^post17, i___02020^0'=i___02020^post17, IsochResourceData^0'=IsochResourceData^post17, pIrb^0'=pIrb^post17, __rho_7_^0'=__rho_7_^post17, keA^0'=keA^post17, __rho_3_^0'=__rho_3_^post17, a4343^0'=a4343^post17, a3131^0'=a3131^post17, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post17, i^0'=i^post17, Irp^0'=Irp^post17, b2929^0'=b2929^post17, __rho_56_^0'=__rho_56_^post17, k3^0'=k3^post17, __rho_13_^0'=__rho_13_^post17, i___04040^0'=i___04040^post17, a1818^0'=a1818^post17, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post17, __rho_99_^0'=__rho_99_^post17, a77^0'=a77^post17, a3434^0'=a3434^post17, i___099^0'=i___099^post17, __rho_10_^0'=__rho_10_^post17, (b2929^0-b2929^post17 == 0 /\ -ret_IoSetDeviceInterfaceState44^post17+ret_IoSetDeviceInterfaceState44^0 == 0 /\ ntStatus^0-ntStatus^post17 == 0 /\ i___04646^0-i___04646^post17 == 0 /\ __rho_6_^0-__rho_6_^post17 == 0 /\ -i___04040^post17+i___04040^0 == 0 /\ a3838^0-a3838^post17 == 0 /\ -b2626^post17+b2626^0 == 0 /\ 1-__rho_5_^0 <= 0 /\ -a4343^post17+a4343^0 == 0 /\ keR^0-keR^post17 == 0 /\ -a3434^post17+a3434^0 == 0 /\ k1^0-k1^post17 == 0 /\ IsochDetachData^0-IsochDetachData^post17 == 0 /\ a3232^0-a3232^post17 == 0 /\ -__rho_99_^post17+__rho_99_^0 == 0 /\ __rho_11_^0-__rho_11_^post17 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post17+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ -__rho_13_^post17+__rho_13_^0 == 0 /\ a4444^0-a4444^post17 == 0 /\ -b22^post17+b22^0 == 0 /\ -__rho_5_^post17+__rho_5_^0 == 0 /\ -a3131^post17+a3131^0 == 0 /\ -k4^post17+k4^0 == 0 /\ -Irp^post17+Irp^0 == 0 /\ -i___099^post17+i___099^0 == 0 /\ pIrb^0-pIrb^post17 == 0 /\ -Irql^post17+Irql^0 == 0 /\ -keA^post17+keA^0 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post17 == 0 /\ CromData^0-CromData^post17 == 0 /\ -__rho_10_^post17+__rho_10_^0 == 0 /\ -k3^post17+k3^0 == 0 /\ a3737^0-a3737^post17 == 0 /\ i___01717^0-i___01717^post17 == 0 /\ -a11^post17+a11^0 == 0 /\ -__rho_1_^post17+__rho_1_^0 == 0 /\ k5^0-k5^post17 == 0 /\ -i___02020^post17+i___02020^0 == 0 /\ a2828^0-a2828^post17 == 0 /\ i___01313^0-i___01313^post17 == 0 /\ a77^0-a77^post17 == 0 /\ -__rho_3_^post17+__rho_3_^0 == 0 /\ __rho_7_^0-__rho_7_^post17 == 0 /\ -__rho_8_^post17+__rho_8_^0 == 0 /\ -__rho_9_^post17+__rho_9_^0 == 0 /\ ResourceIrp^0-ResourceIrp^post17 == 0 /\ b3333^0-b3333^post17 == 0 /\ __rho_4_^0-__rho_4_^post17 == 0 /\ a2525^0-a2525^post17 == 0 /\ -AsyncAddressData^post17+AsyncAddressData^0 == 0 /\ -i___02424^post17+i___02424^0 == 0 /\ -b3535^post17+b3535^0 == 0 /\ -i^post17+i^0 == 0 /\ -__rho_2_^post17+__rho_2_^0 == 0 /\ -IsochResourceData^post17+IsochResourceData^0 == 0 /\ a1818^0-a1818^post17 == 0 /\ -ret_IoAllocateIrp2727^post17+ret_IoAllocateIrp2727^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post17 == 0 /\ -k2^post17+k2^0 == 0 /\ -__rho_56_^post17+__rho_56_^0 == 0 /\ __rho_12_^0-__rho_12_^post17 == 0), cost: 1
  18: l14 -> l13 : i___01717^0'=i___01717^post18, IsochDetachData^0'=IsochDetachData^post18, ntStatus^0'=ntStatus^post18, __rho_6_^0'=__rho_6_^post18, k5^0'=k5^post18, __rho_2_^0'=__rho_2_^post18, a3838^0'=a3838^post18, a2828^0'=a2828^post18, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post18, b3535^0'=b3535^post18, CromData^0'=CromData^post18, b2626^0'=b2626^post18, __rho_4_^0'=__rho_4_^post18, k2^0'=k2^post18, __rho_12_^0'=__rho_12_^post18, i___02424^0'=i___02424^post18, a11^0'=a11^post18, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post18, __rho_8_^0'=__rho_8_^post18, keR^0'=keR^post18, a4444^0'=a4444^post18, a3232^0'=a3232^post18, ResourceIrp^0'=ResourceIrp^post18, i___01313^0'=i___01313^post18, Irql^0'=Irql^post18, b3333^0'=b3333^post18, __rho_5_^0'=__rho_5_^post18, k4^0'=k4^post18, __rho_1_^0'=__rho_1_^post18, i___04646^0'=i___04646^post18, a2525^0'=a2525^post18, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post18, __rho_9_^0'=__rho_9_^post18, AsyncAddressData^0'=AsyncAddressData^post18, b22^0'=b22^post18, a3737^0'=a3737^post18, k1^0'=k1^post18, __rho_11_^0'=__rho_11_^post18, i___02020^0'=i___02020^post18, IsochResourceData^0'=IsochResourceData^post18, pIrb^0'=pIrb^post18, __rho_7_^0'=__rho_7_^post18, keA^0'=keA^post18, __rho_3_^0'=__rho_3_^post18, a4343^0'=a4343^post18, a3131^0'=a3131^post18, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post18, i^0'=i^post18, Irp^0'=Irp^post18, b2929^0'=b2929^post18, __rho_56_^0'=__rho_56_^post18, k3^0'=k3^post18, __rho_13_^0'=__rho_13_^post18, i___04040^0'=i___04040^post18, a1818^0'=a1818^post18, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post18, __rho_99_^0'=__rho_99_^post18, a77^0'=a77^post18, a3434^0'=a3434^post18, i___099^0'=i___099^post18, __rho_10_^0'=__rho_10_^post18, (0 == 0 /\ -i___099^post18+i___099^0 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post18 == 0 /\ CromData^0-CromData^post18 == 0 /\ -__rho_9_^post18+__rho_9_^0 == 0 /\ -a3232^post18+a3232^0 == 0 /\ -a77^post18+a77^0 == 0 /\ i___04040^0-i___04040^post18 == 0 /\ -b3333^post18+b3333^0 == 0 /\ -keA^post18+keA^0 == 0 /\ -k3^post18+k3^0 == 0 /\ -__rho_10_^post18+__rho_10_^0 == 0 /\ -keR^post18+keR^0 == 0 /\ k5^0-k5^post18 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post18+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ __rho_8_^0-__rho_8_^post18 == 0 /\ AsyncAddressData^0-AsyncAddressData^post18 == 0 /\ __rho_11_^0-__rho_11_^post18 == 0 /\ -ret_IoAllocateIrp2727^post18+ret_IoAllocateIrp2727^0 == 0 /\ a2828^0-a2828^post18 == 0 /\ -a3434^post18+a3434^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post18 == 0 /\ i___01717^0-i___01717^post18 == 0 /\ -i^post18+i^0 == 0 /\ __rho_2_^0-__rho_2_^post18 == 0 /\ -IsochResourceData^post18+IsochResourceData^0 == 0 /\ -Irp^post18+Irp^0 == 0 /\ k1^0-k1^post18 == 0 /\ -__rho_3_^post18+__rho_3_^0 == 0 /\ -__rho_56_^post18+__rho_56_^0 == 0 /\ -ret_IoSetDeviceInterfaceState44^post18+ret_IoSetDeviceInterfaceState44^0 == 0 /\ a11^0-a11^post18 == 0 /\ pIrb^0-pIrb^post18 == 0 /\ -a2525^post18+a2525^0 == 0 /\ __rho_6_^0-__rho_6_^post18 == 0 /\ __rho_12_^0-__rho_12_^post18 == 0 /\ i___04646^0-i___04646^post18 == 0 /\ k4^0-k4^post18 == 0 /\ a3838^0-a3838^post18 == 0 /\ b2626^0-b2626^post18 == 0 /\ -__rho_99_^post18+__rho_99_^0 == 0 /\ -ResourceIrp^post18+ResourceIrp^0 == 0 /\ __rho_7_^0-__rho_7_^post18 == 0 /\ __rho_4_^0-__rho_4_^post18 == 0 /\ -b3535^post18+b3535^0 == 0 /\ -a4343^post18+a4343^0 == 0 /\ -a3737^post18+a3737^0 == 0 /\ -a1818^post18+a1818^0 == 0 /\ -b2929^post18+b2929^0 == 0 /\ -b22^post18+b22^0 == 0 /\ ntStatus^0-ntStatus^post18 == 0 /\ i___02020^0-i___02020^post18 == 0 /\ i___02424^0-i___02424^post18 == 0 /\ IsochDetachData^0-IsochDetachData^post18 == 0 /\ -__rho_1_^post18+__rho_1_^0 == 0 /\ Irql^0-Irql^post18 == 0 /\ -__rho_13_^post18+__rho_13_^0 == 0 /\ a4444^0-a4444^post18 == 0 /\ i___01313^0-i___01313^post18 == 0 /\ k2^0-k2^post18 == 0 /\ -a3131^post18+a3131^0 == 0), cost: 1
  19: l15 -> l16 : i___01717^0'=i___01717^post19, IsochDetachData^0'=IsochDetachData^post19, ntStatus^0'=ntStatus^post19, __rho_6_^0'=__rho_6_^post19, k5^0'=k5^post19, __rho_2_^0'=__rho_2_^post19, a3838^0'=a3838^post19, a2828^0'=a2828^post19, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post19, b3535^0'=b3535^post19, CromData^0'=CromData^post19, b2626^0'=b2626^post19, __rho_4_^0'=__rho_4_^post19, k2^0'=k2^post19, __rho_12_^0'=__rho_12_^post19, i___02424^0'=i___02424^post19, a11^0'=a11^post19, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post19, __rho_8_^0'=__rho_8_^post19, keR^0'=keR^post19, a4444^0'=a4444^post19, a3232^0'=a3232^post19, ResourceIrp^0'=ResourceIrp^post19, i___01313^0'=i___01313^post19, Irql^0'=Irql^post19, b3333^0'=b3333^post19, __rho_5_^0'=__rho_5_^post19, k4^0'=k4^post19, __rho_1_^0'=__rho_1_^post19, i___04646^0'=i___04646^post19, a2525^0'=a2525^post19, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post19, __rho_9_^0'=__rho_9_^post19, AsyncAddressData^0'=AsyncAddressData^post19, b22^0'=b22^post19, a3737^0'=a3737^post19, k1^0'=k1^post19, __rho_11_^0'=__rho_11_^post19, i___02020^0'=i___02020^post19, IsochResourceData^0'=IsochResourceData^post19, pIrb^0'=pIrb^post19, __rho_7_^0'=__rho_7_^post19, keA^0'=keA^post19, __rho_3_^0'=__rho_3_^post19, a4343^0'=a4343^post19, a3131^0'=a3131^post19, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post19, i^0'=i^post19, Irp^0'=Irp^post19, b2929^0'=b2929^post19, __rho_56_^0'=__rho_56_^post19, k3^0'=k3^post19, __rho_13_^0'=__rho_13_^post19, i___04040^0'=i___04040^post19, a1818^0'=a1818^post19, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post19, __rho_99_^0'=__rho_99_^post19, a77^0'=a77^post19, a3434^0'=a3434^post19, i___099^0'=i___099^post19, __rho_10_^0'=__rho_10_^post19, (-pIrb^post19+pIrb^0 == 0 /\ -__rho_13_^post19+__rho_13_^0 == 0 /\ -a77^post19+a77^0 == 0 /\ a2828^0-a2828^post19 == 0 /\ keA^210 == 0 /\ keA^post19 == 0 /\ -__rho_3_^post19+__rho_3_^0 == 0 /\ ResourceIrp^0-ResourceIrp^post19 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post19+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ a2525^0-a2525^post19 == 0 /\ -k3^post19+k3^0 == 0 /\ a4444^0-a4444^post19 == 0 /\ i___04040^0-i___04040^post19 == 0 /\ -IsochResourceData^post19+IsochResourceData^0 == 0 /\ -ret_IoAllocateIrp2727^post19+ret_IoAllocateIrp2727^0 == 0 /\ i___01717^0-i___01717^post19 == 0 /\ -__rho_8_^post19+__rho_8_^0 == 0 /\ -ret_IoSetDeviceInterfaceState44^post19+ret_IoSetDeviceInterfaceState44^0 == 0 /\ -i___02424^post19+i___02424^0 == 0 /\ a11^0-a11^post19 == 0 /\ -a3434^post19+a3434^0 == 0 /\ AsyncAddressData^0-AsyncAddressData^post19 == 0 /\ __rho_11_^0-__rho_11_^post19 == 0 /\ i___04646^0-i___04646^post19 == 0 /\ -__rho_99_^post19+__rho_99_^0 == 0 /\ b3333^0-b3333^post19 == 0 /\ -k2^post19+k2^0 == 0 /\ __rho_2_^0-__rho_2_^post19 == 0 /\ -1+keA^310 == 0 /\ -Irql^post19+Irql^0 == 0 /\ -__rho_9_^post19+__rho_9_^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post19 == 0 /\ -__rho_56_^post19+__rho_56_^0 == 0 /\ -b2929^post19+b2929^0 == 0 /\ __rho_4_^0-__rho_4_^post19 == 0 /\ -a3131^post19+a3131^0 == 0 /\ -CromData^post19+CromData^0 == 0 /\ -b3535^post19+b3535^0 == 0 /\ k4^0-k4^post19 == 0 /\ k1^0-k1^post19 == 0 /\ __rho_7_^0-__rho_7_^post19 == 0 /\ i___01313^0-i___01313^post19 == 0 /\ -a1818^post19+a1818^0 == 0 /\ __rho_5_^0-__rho_5_^post19 == 0 /\ -i___099^post19+i___099^0 == 0 /\ -a3737^post19+a3737^0 == 0 /\ -a4343^post19+a4343^0 == 0 /\ __rho_12_^0-__rho_12_^post19 == 0 /\ -i^post19+i^0 == 0 /\ __rho_6_^0-__rho_6_^post19 == 0 /\ -__rho_10_^post19+__rho_10_^0 == 0 /\ i___02020^0-i___02020^post19 == 0 /\ IsochDetachData^0-IsochDetachData^post19 == 0 /\ -1+keA^11 == 0 /\ b2626^0-b2626^post19 == 0 /\ k5^0-k5^post19 == 0 /\ -Irp^post19+Irp^0 == 0 /\ a3838^0-a3838^post19 == 0 /\ -__rho_1_^post19+__rho_1_^0 == 0 /\ -b22^post19+b22^0 == 0 /\ a3232^0-a3232^post19 == 0 /\ keR^0-keR^post19 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post19 == 0 /\ ntStatus^0-ntStatus^post19 == 0), cost: 1
  44: l16 -> l19 : i___01717^0'=i___01717^post44, IsochDetachData^0'=IsochDetachData^post44, ntStatus^0'=ntStatus^post44, __rho_6_^0'=__rho_6_^post44, k5^0'=k5^post44, __rho_2_^0'=__rho_2_^post44, a3838^0'=a3838^post44, a2828^0'=a2828^post44, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post44, b3535^0'=b3535^post44, CromData^0'=CromData^post44, b2626^0'=b2626^post44, __rho_4_^0'=__rho_4_^post44, k2^0'=k2^post44, __rho_12_^0'=__rho_12_^post44, i___02424^0'=i___02424^post44, a11^0'=a11^post44, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post44, __rho_8_^0'=__rho_8_^post44, keR^0'=keR^post44, a4444^0'=a4444^post44, a3232^0'=a3232^post44, ResourceIrp^0'=ResourceIrp^post44, i___01313^0'=i___01313^post44, Irql^0'=Irql^post44, b3333^0'=b3333^post44, __rho_5_^0'=__rho_5_^post44, k4^0'=k4^post44, __rho_1_^0'=__rho_1_^post44, i___04646^0'=i___04646^post44, a2525^0'=a2525^post44, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post44, __rho_9_^0'=__rho_9_^post44, AsyncAddressData^0'=AsyncAddressData^post44, b22^0'=b22^post44, a3737^0'=a3737^post44, k1^0'=k1^post44, __rho_11_^0'=__rho_11_^post44, i___02020^0'=i___02020^post44, IsochResourceData^0'=IsochResourceData^post44, pIrb^0'=pIrb^post44, __rho_7_^0'=__rho_7_^post44, keA^0'=keA^post44, __rho_3_^0'=__rho_3_^post44, a4343^0'=a4343^post44, a3131^0'=a3131^post44, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post44, i^0'=i^post44, Irp^0'=Irp^post44, b2929^0'=b2929^post44, __rho_56_^0'=__rho_56_^post44, k3^0'=k3^post44, __rho_13_^0'=__rho_13_^post44, i___04040^0'=i___04040^post44, a1818^0'=a1818^post44, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post44, __rho_99_^0'=__rho_99_^post44, a77^0'=a77^post44, a3434^0'=a3434^post44, i___099^0'=i___099^post44, __rho_10_^0'=__rho_10_^post44, (0 == 0 /\ -1+keA^340 == 0 /\ -a11^post44+a11^0 == 0 /\ __rho_4_^0-__rho_4_^post44 == 0 /\ -1+keR^120 == 0 /\ keR^230 == 0 /\ a2828^0-a2828^post44 == 0 /\ -1+keR^330 == 0 /\ i___01717^0-i___01717^post44 == 0 /\ -1+keA^14 == 0 /\ Irp^0-Irp^post44 == 0 /\ -ret_IoAllocateIrp2727^post44+ret_IoAllocateIrp2727^0 == 0 /\ Irql^0-Irql^post44 == 0 /\ -__rho_5_^post44+__rho_5_^0 == 0 /\ -__rho_99_^post44+__rho_99_^0 == 0 /\ pIrb^0-pIrb^post44 == 0 /\ -a4343^post44+a4343^0 == 0 /\ -k3^post44+k3^0 == 0 /\ -__rho_56_^post44+__rho_56_^0 == 0 /\ CromData^0-CromData^post44 == 0 /\ -a77^post44+a77^0 == 0 /\ a2525^0-a2525^post44 == 0 /\ -a3232^post44+a3232^0 == 0 /\ ret_t1394_SubmitIrpSynch3636^0-ret_t1394_SubmitIrpSynch3636^post44 == 0 /\ -__rho_7_^post44+__rho_7_^0 == 0 /\ keR^post44 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post44 == 0 /\ i^0-i^post44 == 0 /\ __rho_11_^0-__rho_11_^post44 == 0 /\ __rho_12_^0-__rho_12_^post44 == 0 /\ __rho_2_^0-__rho_2_^post44 == 0 /\ k4^0 <= 0 /\ -__rho_9_^post44+__rho_9_^0 == 0 /\ -a3434^post44+a3434^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post44 == 0 /\ a3838^0-a3838^post44 == 0 /\ -ResourceIrp^post44+ResourceIrp^0 == 0 /\ -i___02020^post44+i___02020^0 == 0 /\ b2626^0-b2626^post44 == 0 /\ IsochDetachData^0-IsochDetachData^post44 == 0 /\ a3737^0-a3737^post44 == 0 /\ b3333^0-b3333^post44 == 0 /\ k2^0-k2^post44 == 0 /\ keA^240 == 0 /\ -__rho_1_^post44+__rho_1_^0 == 0 /\ -i___099^post44+i___099^0 == 0 /\ -ret_IoSetDeviceInterfaceState44^post44+ret_IoSetDeviceInterfaceState44^0 == 0 /\ -__rho_3_^post44+__rho_3_^0 == 0 /\ -k1^post44+k1^0 == 0 /\ -__rho_13_^post44+k5^post44 == 0 /\ __rho_6_^0-__rho_6_^post44 == 0 /\ -b22^post44+b22^0 == 0 /\ -IsochResourceData^post44+IsochResourceData^0 == 0 /\ -a3131^post44+a3131^0 == 0 /\ i___04040^post44-Irql^0 == 0 /\ keA^post44 == 0 /\ b3535^0-b3535^post44 == 0 /\ __rho_8_^0-__rho_8_^post44 == 0 /\ k4^0-k4^post44 == 0 /\ i___02424^0-i___02424^post44 == 0 /\ -i___04646^post44+i___04646^0 == 0 /\ -a4444^post44+a4444^0 == 0 /\ -__rho_10_^post44+__rho_10_^0 == 0 /\ -AsyncAddressData^post44+AsyncAddressData^0 == 0 /\ ntStatus^0-ntStatus^post44 == 0 /\ -b2929^post44+b2929^0 == 0 /\ i___01313^0-i___01313^post44 == 0 /\ -a1818^post44+a1818^0 == 0), cost: 1
  45: l16 -> l31 : i___01717^0'=i___01717^post45, IsochDetachData^0'=IsochDetachData^post45, ntStatus^0'=ntStatus^post45, __rho_6_^0'=__rho_6_^post45, k5^0'=k5^post45, __rho_2_^0'=__rho_2_^post45, a3838^0'=a3838^post45, a2828^0'=a2828^post45, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post45, b3535^0'=b3535^post45, CromData^0'=CromData^post45, b2626^0'=b2626^post45, __rho_4_^0'=__rho_4_^post45, k2^0'=k2^post45, __rho_12_^0'=__rho_12_^post45, i___02424^0'=i___02424^post45, a11^0'=a11^post45, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post45, __rho_8_^0'=__rho_8_^post45, keR^0'=keR^post45, a4444^0'=a4444^post45, a3232^0'=a3232^post45, ResourceIrp^0'=ResourceIrp^post45, i___01313^0'=i___01313^post45, Irql^0'=Irql^post45, b3333^0'=b3333^post45, __rho_5_^0'=__rho_5_^post45, k4^0'=k4^post45, __rho_1_^0'=__rho_1_^post45, i___04646^0'=i___04646^post45, a2525^0'=a2525^post45, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post45, __rho_9_^0'=__rho_9_^post45, AsyncAddressData^0'=AsyncAddressData^post45, b22^0'=b22^post45, a3737^0'=a3737^post45, k1^0'=k1^post45, __rho_11_^0'=__rho_11_^post45, i___02020^0'=i___02020^post45, IsochResourceData^0'=IsochResourceData^post45, pIrb^0'=pIrb^post45, __rho_7_^0'=__rho_7_^post45, keA^0'=keA^post45, __rho_3_^0'=__rho_3_^post45, a4343^0'=a4343^post45, a3131^0'=a3131^post45, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post45, i^0'=i^post45, Irp^0'=Irp^post45, b2929^0'=b2929^post45, __rho_56_^0'=__rho_56_^post45, k3^0'=k3^post45, __rho_13_^0'=__rho_13_^post45, i___04040^0'=i___04040^post45, a1818^0'=a1818^post45, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post45, __rho_99_^0'=__rho_99_^post45, a77^0'=a77^post45, a3434^0'=a3434^post45, i___099^0'=i___099^post45, __rho_10_^0'=__rho_10_^post45, (0 == 0 /\ -__rho_5_^post45+__rho_5_^0 == 0 /\ a3838^0-a3838^post45 == 0 /\ 1-k4^0 <= 0 /\ -b3333^post45+b3333^0 == 0 /\ -a4343^post45+a4343^0 == 0 /\ i___02424^post45-Irql^0 == 0 /\ -i___04040^post45+i___04040^0 == 0 /\ IsochDetachData^0-IsochDetachData^post45 == 0 /\ -AsyncAddressData^post45+AsyncAddressData^0 == 0 /\ -b2929^post45+b2929^0 == 0 /\ -__rho_56_^post45+__rho_56_^0 == 0 /\ -keA^post45+keA^0 == 0 /\ Irp^0-Irp^post45 == 0 /\ -b2626^post45+b2626^0 == 0 /\ __rho_6_^0-__rho_6_^post45 == 0 /\ k5^0-k5^post45 == 0 /\ ret_t1394_SubmitIrpSynch3636^0-ret_t1394_SubmitIrpSynch3636^post45 == 0 /\ b3535^0-b3535^post45 == 0 /\ keR^post45 == 0 /\ -a77^post45+a77^0 == 0 /\ IsochResourceData^post45-__rho_12_^post45 == 0 /\ pIrb^0-pIrb^post45 == 0 /\ -ret_IoAllocateIrp2727^post45+ret_IoAllocateIrp2727^0 == 0 /\ -__rho_13_^post45+__rho_13_^0 == 0 /\ -i^post45+i^0 == 0 /\ -__rho_8_^post45+__rho_8_^0 == 0 /\ __rho_4_^0-__rho_4_^post45 == 0 /\ __rho_11_^0-__rho_11_^post45 == 0 /\ i___01313^0-i___01313^post45 == 0 /\ -__rho_9_^post45+__rho_9_^0 == 0 /\ -a3232^post45+a3232^0 == 0 /\ -1+keR^121 == 0 /\ -b22^post45+b22^0 == 0 /\ -k3^post45+k3^0 == 0 /\ -__rho_1_^post45+__rho_1_^0 == 0 /\ a3737^0-a3737^post45 == 0 /\ -a3434^post45+a3434^0 == 0 /\ a2525^0-a2525^post45 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post45 == 0 /\ a2828^0-a2828^post45 == 0 /\ i___04646^0-i___04646^post45 == 0 /\ i___01717^0-i___01717^post45 == 0 /\ -__rho_10_^post45+__rho_10_^0 == 0 /\ -i___02020^post45+i___02020^0 == 0 /\ CromData^0-CromData^post45 == 0 /\ -__rho_99_^post45+__rho_99_^0 == 0 /\ -i___099^post45+i___099^0 == 0 /\ -a11^post45+a11^0 == 0 /\ __rho_3_^0-__rho_3_^post45 == 0 /\ k2^0-k2^post45 == 0 /\ -ret_IoSetDeviceInterfaceState44^post45+ret_IoSetDeviceInterfaceState44^0 == 0 /\ -a1818^post45+a1818^0 == 0 /\ ResourceIrp^0-ResourceIrp^post45 == 0 /\ 1-k4^0+k4^post45 == 0 /\ Irql^0-Irql^post45 == 0 /\ -__rho_7_^post45+__rho_7_^0 == 0 /\ ntStatus^0-ntStatus^post45 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post45 == 0 /\ __rho_2_^0-__rho_2_^post45 == 0 /\ keR^240 == 0 /\ -k1^post45+k1^0 == 0 /\ -a3131^post45+a3131^0 == 0 /\ -1+keR^340 == 0 /\ a4444^0-a4444^post45 == 0), cost: 1
  20: l17 -> l14 : i___01717^0'=i___01717^post20, IsochDetachData^0'=IsochDetachData^post20, ntStatus^0'=ntStatus^post20, __rho_6_^0'=__rho_6_^post20, k5^0'=k5^post20, __rho_2_^0'=__rho_2_^post20, a3838^0'=a3838^post20, a2828^0'=a2828^post20, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post20, b3535^0'=b3535^post20, CromData^0'=CromData^post20, b2626^0'=b2626^post20, __rho_4_^0'=__rho_4_^post20, k2^0'=k2^post20, __rho_12_^0'=__rho_12_^post20, i___02424^0'=i___02424^post20, a11^0'=a11^post20, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post20, __rho_8_^0'=__rho_8_^post20, keR^0'=keR^post20, a4444^0'=a4444^post20, a3232^0'=a3232^post20, ResourceIrp^0'=ResourceIrp^post20, i___01313^0'=i___01313^post20, Irql^0'=Irql^post20, b3333^0'=b3333^post20, __rho_5_^0'=__rho_5_^post20, k4^0'=k4^post20, __rho_1_^0'=__rho_1_^post20, i___04646^0'=i___04646^post20, a2525^0'=a2525^post20, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post20, __rho_9_^0'=__rho_9_^post20, AsyncAddressData^0'=AsyncAddressData^post20, b22^0'=b22^post20, a3737^0'=a3737^post20, k1^0'=k1^post20, __rho_11_^0'=__rho_11_^post20, i___02020^0'=i___02020^post20, IsochResourceData^0'=IsochResourceData^post20, pIrb^0'=pIrb^post20, __rho_7_^0'=__rho_7_^post20, keA^0'=keA^post20, __rho_3_^0'=__rho_3_^post20, a4343^0'=a4343^post20, a3131^0'=a3131^post20, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post20, i^0'=i^post20, Irp^0'=Irp^post20, b2929^0'=b2929^post20, __rho_56_^0'=__rho_56_^post20, k3^0'=k3^post20, __rho_13_^0'=__rho_13_^post20, i___04040^0'=i___04040^post20, a1818^0'=a1818^post20, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post20, __rho_99_^0'=__rho_99_^post20, a77^0'=a77^post20, a3434^0'=a3434^post20, i___099^0'=i___099^post20, __rho_10_^0'=__rho_10_^post20, (ntStatus^0-ntStatus^post20 == 0 /\ -__rho_99_^post20+__rho_99_^0 == 0 /\ -a4343^post20+a4343^0 == 0 /\ ResourceIrp^0-ResourceIrp^post20 == 0 /\ a2525^0-a2525^post20 == 0 /\ __rho_11_^0-__rho_11_^post20 == 0 /\ -k2^post20+k2^0 == 0 /\ -k4^post20+k4^0 == 0 /\ a3232^0-a3232^post20 == 0 /\ keR^0-keR^post20 == 0 /\ IsochDetachData^0-IsochDetachData^post20 == 0 /\ -i___04040^post20+i___04040^0 == 0 /\ -__rho_8_^post20+__rho_8_^0 == 0 /\ k1^0-k1^post20 == 0 /\ __rho_4_^0-__rho_4_^post20 == 0 /\ -a3434^post20+a3434^0 == 0 /\ i___04646^0-i___04646^post20 == 0 /\ __rho_4_^0 <= 0 /\ a11^0-a11^post20 == 0 /\ __rho_6_^0-__rho_6_^post20 == 0 /\ -__rho_1_^post20+__rho_1_^0 == 0 /\ -a1818^post20+a1818^0 == 0 /\ b3535^0-b3535^post20 == 0 /\ -b22^post20+b22^0 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post20+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ k5^0-k5^post20 == 0 /\ -__rho_5_^post20+__rho_5_^0 == 0 /\ -__rho_13_^post20+__rho_13_^0 == 0 /\ -AsyncAddressData^post20+AsyncAddressData^0 == 0 /\ -a3131^post20+a3131^0 == 0 /\ -i___02424^post20+i___02424^0 == 0 /\ a2828^0-a2828^post20 == 0 /\ -k3^post20+k3^0 == 0 /\ -Irql^post20+Irql^0 == 0 /\ __rho_9_^0-__rho_9_^post20 == 0 /\ -i___099^post20+i___099^0 == 0 /\ -__rho_10_^post20+__rho_10_^0 == 0 /\ -i___02020^post20+i___02020^0 == 0 /\ -ret_t1394Diag_PnpStopDevice33^post20+ret_t1394Diag_PnpStopDevice33^0 == 0 /\ a4444^0-a4444^post20 == 0 /\ -b2929^post20+b2929^0 == 0 /\ __rho_12_^0-__rho_12_^post20 == 0 /\ i___01717^0-i___01717^post20 == 0 /\ a3737^0-a3737^post20 == 0 /\ i___01313^0-i___01313^post20 == 0 /\ -keA^post20+keA^0 == 0 /\ a3838^0-a3838^post20 == 0 /\ b2626^0-b2626^post20 == 0 /\ b3333^0-b3333^post20 == 0 /\ __rho_7_^0-__rho_7_^post20 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post20 == 0 /\ -i^post20+i^0 == 0 /\ CromData^0-CromData^post20 == 0 /\ -ret_IoAllocateIrp2727^post20+ret_IoAllocateIrp2727^0 == 0 /\ -ret_IoSetDeviceInterfaceState44^post20+ret_IoSetDeviceInterfaceState44^0 == 0 /\ -__rho_56_^post20+__rho_56_^0 == 0 /\ -a77^post20+a77^0 == 0 /\ -IsochResourceData^post20+IsochResourceData^0 == 0 /\ __rho_2_^0-__rho_2_^post20 == 0 /\ -Irp^post20+Irp^0 == 0 /\ pIrb^0-pIrb^post20 == 0 /\ -__rho_3_^post20+__rho_3_^0 == 0), cost: 1
  21: l17 -> l14 : i___01717^0'=i___01717^post21, IsochDetachData^0'=IsochDetachData^post21, ntStatus^0'=ntStatus^post21, __rho_6_^0'=__rho_6_^post21, k5^0'=k5^post21, __rho_2_^0'=__rho_2_^post21, a3838^0'=a3838^post21, a2828^0'=a2828^post21, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post21, b3535^0'=b3535^post21, CromData^0'=CromData^post21, b2626^0'=b2626^post21, __rho_4_^0'=__rho_4_^post21, k2^0'=k2^post21, __rho_12_^0'=__rho_12_^post21, i___02424^0'=i___02424^post21, a11^0'=a11^post21, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post21, __rho_8_^0'=__rho_8_^post21, keR^0'=keR^post21, a4444^0'=a4444^post21, a3232^0'=a3232^post21, ResourceIrp^0'=ResourceIrp^post21, i___01313^0'=i___01313^post21, Irql^0'=Irql^post21, b3333^0'=b3333^post21, __rho_5_^0'=__rho_5_^post21, k4^0'=k4^post21, __rho_1_^0'=__rho_1_^post21, i___04646^0'=i___04646^post21, a2525^0'=a2525^post21, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post21, __rho_9_^0'=__rho_9_^post21, AsyncAddressData^0'=AsyncAddressData^post21, b22^0'=b22^post21, a3737^0'=a3737^post21, k1^0'=k1^post21, __rho_11_^0'=__rho_11_^post21, i___02020^0'=i___02020^post21, IsochResourceData^0'=IsochResourceData^post21, pIrb^0'=pIrb^post21, __rho_7_^0'=__rho_7_^post21, keA^0'=keA^post21, __rho_3_^0'=__rho_3_^post21, a4343^0'=a4343^post21, a3131^0'=a3131^post21, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post21, i^0'=i^post21, Irp^0'=Irp^post21, b2929^0'=b2929^post21, __rho_56_^0'=__rho_56_^post21, k3^0'=k3^post21, __rho_13_^0'=__rho_13_^post21, i___04040^0'=i___04040^post21, a1818^0'=a1818^post21, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post21, __rho_99_^0'=__rho_99_^post21, a77^0'=a77^post21, a3434^0'=a3434^post21, i___099^0'=i___099^post21, __rho_10_^0'=__rho_10_^post21, (IsochDetachData^0-IsochDetachData^post21 == 0 /\ -__rho_56_^post21+__rho_56_^0 == 0 /\ __rho_12_^0-__rho_12_^post21 == 0 /\ __rho_11_^0-__rho_11_^post21 == 0 /\ -b22^post21+b22^0 == 0 /\ -a1818^post21+a1818^0 == 0 /\ -b3535^post21+b3535^0 == 0 /\ -a3131^post21+a3131^0 == 0 /\ __rho_6_^0-__rho_6_^post21 == 0 /\ -k3^post21+k3^0 == 0 /\ i___04646^0-i___04646^post21 == 0 /\ a3838^0-a3838^post21 == 0 /\ -i^post21+i^0 == 0 /\ ntStatus^0-ntStatus^post21 == 0 /\ -k4^post21+k4^0 == 0 /\ i___01313^0-i___01313^post21 == 0 /\ __rho_8_^0-__rho_8_^post21 == 0 /\ a3737^0-a3737^post21 == 0 /\ -keR^post21+keR^0 == 0 /\ -__rho_10_^post21+__rho_10_^0 == 0 /\ -Irql^post21+Irql^0 == 0 /\ -keA^post21+keA^0 == 0 /\ -i___04040^post21+i___04040^0 == 0 /\ k5^0-k5^post21 == 0 /\ k1^0-k1^post21 == 0 /\ -ResourceIrp^post21+ResourceIrp^0 == 0 /\ __rho_4_^0-__rho_4_^post21 == 0 /\ -__rho_1_^post21+__rho_1_^0 == 0 /\ -__rho_3_^post21+__rho_3_^0 == 0 /\ i___01717^0-i___01717^post21 == 0 /\ -b3333^post21+b3333^0 == 0 /\ -a11^post21+a11^0 == 0 /\ -b2929^post21+b2929^0 == 0 /\ -AsyncAddressData^post21+AsyncAddressData^0 == 0 /\ a2525^0-a2525^post21 == 0 /\ 1-__rho_4_^0 <= 0 /\ -i___02424^post21+i___02424^0 == 0 /\ -__rho_5_^post21+__rho_5_^0 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post21 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post21+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ pIrb^0-pIrb^post21 == 0 /\ -ret_IoAllocateIrp2727^post21+ret_IoAllocateIrp2727^0 == 0 /\ -a3232^post21+a3232^0 == 0 /\ -a4343^post21+a4343^0 == 0 /\ a2828^0-a2828^post21 == 0 /\ -__rho_2_^post21+__rho_2_^0 == 0 /\ CromData^0-CromData^post21 == 0 /\ k2^0-k2^post21 == 0 /\ -a77^post21+a77^0 == 0 /\ a4444^0-a4444^post21 == 0 /\ __rho_9_^0-__rho_9_^post21 == 0 /\ -i___099^post21+i___099^0 == 0 /\ -IsochResourceData^post21+IsochResourceData^0 == 0 /\ -Irp^post21+Irp^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post21 == 0 /\ -ret_IoSetDeviceInterfaceState44^post21+ret_IoSetDeviceInterfaceState44^0 == 0 /\ __rho_99_^0-__rho_99_^post21 == 0 /\ -b2626^post21+b2626^0 == 0 /\ __rho_7_^0-__rho_7_^post21 == 0 /\ -a3434^post21+a3434^0 == 0 /\ -__rho_13_^post21+__rho_13_^0 == 0 /\ i___02020^0-i___02020^post21 == 0), cost: 1
  22: l18 -> l7 : i___01717^0'=i___01717^post22, IsochDetachData^0'=IsochDetachData^post22, ntStatus^0'=ntStatus^post22, __rho_6_^0'=__rho_6_^post22, k5^0'=k5^post22, __rho_2_^0'=__rho_2_^post22, a3838^0'=a3838^post22, a2828^0'=a2828^post22, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post22, b3535^0'=b3535^post22, CromData^0'=CromData^post22, b2626^0'=b2626^post22, __rho_4_^0'=__rho_4_^post22, k2^0'=k2^post22, __rho_12_^0'=__rho_12_^post22, i___02424^0'=i___02424^post22, a11^0'=a11^post22, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post22, __rho_8_^0'=__rho_8_^post22, keR^0'=keR^post22, a4444^0'=a4444^post22, a3232^0'=a3232^post22, ResourceIrp^0'=ResourceIrp^post22, i___01313^0'=i___01313^post22, Irql^0'=Irql^post22, b3333^0'=b3333^post22, __rho_5_^0'=__rho_5_^post22, k4^0'=k4^post22, __rho_1_^0'=__rho_1_^post22, i___04646^0'=i___04646^post22, a2525^0'=a2525^post22, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post22, __rho_9_^0'=__rho_9_^post22, AsyncAddressData^0'=AsyncAddressData^post22, b22^0'=b22^post22, a3737^0'=a3737^post22, k1^0'=k1^post22, __rho_11_^0'=__rho_11_^post22, i___02020^0'=i___02020^post22, IsochResourceData^0'=IsochResourceData^post22, pIrb^0'=pIrb^post22, __rho_7_^0'=__rho_7_^post22, keA^0'=keA^post22, __rho_3_^0'=__rho_3_^post22, a4343^0'=a4343^post22, a3131^0'=a3131^post22, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post22, i^0'=i^post22, Irp^0'=Irp^post22, b2929^0'=b2929^post22, __rho_56_^0'=__rho_56_^post22, k3^0'=k3^post22, __rho_13_^0'=__rho_13_^post22, i___04040^0'=i___04040^post22, a1818^0'=a1818^post22, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post22, __rho_99_^0'=__rho_99_^post22, a77^0'=a77^post22, a3434^0'=a3434^post22, i___099^0'=i___099^post22, __rho_10_^0'=__rho_10_^post22, (-ret_t1394_SubmitIrpSynch3636^post22+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ -i^post22+i^0 == 0 /\ __rho_2_^0-__rho_2_^post22 == 0 /\ a3232^0-a3232^post22 == 0 /\ -__rho_3_^post22+__rho_3_^0 == 0 /\ -a77^post22+a77^0 == 0 /\ k2^0-k2^post22 == 0 /\ CromData^0-CromData^post22 == 0 /\ CromData^0 <= 0 /\ i___01717^0-i___01717^post22 == 0 /\ -__rho_5_^post22+__rho_5_^0 == 0 /\ pIrb^0-pIrb^post22 == 0 /\ -i___04040^post22+i___04040^0 == 0 /\ -__rho_99_^post22+__rho_99_^0 == 0 /\ __rho_6_^0-__rho_6_^post22 == 0 /\ -__rho_10_^post22+__rho_10_^0 == 0 /\ AsyncAddressData^0-AsyncAddressData^post22 == 0 /\ -ResourceIrp^post22+ResourceIrp^0 == 0 /\ __rho_11_^0-__rho_11_^post22 == 0 /\ -b2929^post22+b2929^0 == 0 /\ -__rho_9_^post22+__rho_9_^0 == 0 /\ -a3434^post22+a3434^0 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post22 == 0 /\ -keR^post22+keR^0 == 0 /\ -a1818^post22+a1818^0 == 0 /\ -IsochResourceData^post22+IsochResourceData^0 == 0 /\ -__rho_1_^post22+__rho_1_^0 == 0 /\ k1^0-k1^post22 == 0 /\ a3737^0-a3737^post22 == 0 /\ -__rho_13_^post22+__rho_13_^0 == 0 /\ i___04646^0-i___04646^post22 == 0 /\ __rho_12_^0-__rho_12_^post22 == 0 /\ -__rho_56_^post22+__rho_56_^0 == 0 /\ -ret_IoSetDeviceInterfaceState44^post22+ret_IoSetDeviceInterfaceState44^0 == 0 /\ -ret_IoAllocateIrp2727^post22+ret_IoAllocateIrp2727^0 == 0 /\ -Irp^post22+Irp^0 == 0 /\ __rho_7_^0-__rho_7_^post22 == 0 /\ a3838^0-a3838^post22 == 0 /\ -a3131^post22+a3131^0 == 0 /\ -b22^post22+b22^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post22 == 0 /\ a4444^0-a4444^post22 == 0 /\ Irql^0-Irql^post22 == 0 /\ -k3^post22+k3^0 == 0 /\ i___01313^0-i___01313^post22 == 0 /\ -a2525^post22+a2525^0 == 0 /\ -a11^post22+a11^0 == 0 /\ -i___099^post22+i___099^0 == 0 /\ __rho_8_^0-__rho_8_^post22 == 0 /\ b3535^0-b3535^post22 == 0 /\ -b3333^post22+b3333^0 == 0 /\ a4343^0-a4343^post22 == 0 /\ k5^0-k5^post22 == 0 /\ k4^0-k4^post22 == 0 /\ a2828^0-a2828^post22 == 0 /\ i___02424^0-i___02424^post22 == 0 /\ i___02020^0-i___02020^post22 == 0 /\ ntStatus^0-ntStatus^post22 == 0 /\ -keA^post22+keA^0 == 0 /\ __rho_4_^0-__rho_4_^post22 == 0 /\ IsochDetachData^0-IsochDetachData^post22 == 0 /\ b2626^0-b2626^post22 == 0), cost: 1
  23: l18 -> l17 : i___01717^0'=i___01717^post23, IsochDetachData^0'=IsochDetachData^post23, ntStatus^0'=ntStatus^post23, __rho_6_^0'=__rho_6_^post23, k5^0'=k5^post23, __rho_2_^0'=__rho_2_^post23, a3838^0'=a3838^post23, a2828^0'=a2828^post23, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post23, b3535^0'=b3535^post23, CromData^0'=CromData^post23, b2626^0'=b2626^post23, __rho_4_^0'=__rho_4_^post23, k2^0'=k2^post23, __rho_12_^0'=__rho_12_^post23, i___02424^0'=i___02424^post23, a11^0'=a11^post23, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post23, __rho_8_^0'=__rho_8_^post23, keR^0'=keR^post23, a4444^0'=a4444^post23, a3232^0'=a3232^post23, ResourceIrp^0'=ResourceIrp^post23, i___01313^0'=i___01313^post23, Irql^0'=Irql^post23, b3333^0'=b3333^post23, __rho_5_^0'=__rho_5_^post23, k4^0'=k4^post23, __rho_1_^0'=__rho_1_^post23, i___04646^0'=i___04646^post23, a2525^0'=a2525^post23, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post23, __rho_9_^0'=__rho_9_^post23, AsyncAddressData^0'=AsyncAddressData^post23, b22^0'=b22^post23, a3737^0'=a3737^post23, k1^0'=k1^post23, __rho_11_^0'=__rho_11_^post23, i___02020^0'=i___02020^post23, IsochResourceData^0'=IsochResourceData^post23, pIrb^0'=pIrb^post23, __rho_7_^0'=__rho_7_^post23, keA^0'=keA^post23, __rho_3_^0'=__rho_3_^post23, a4343^0'=a4343^post23, a3131^0'=a3131^post23, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post23, i^0'=i^post23, Irp^0'=Irp^post23, b2929^0'=b2929^post23, __rho_56_^0'=__rho_56_^post23, k3^0'=k3^post23, __rho_13_^0'=__rho_13_^post23, i___04040^0'=i___04040^post23, a1818^0'=a1818^post23, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post23, __rho_99_^0'=__rho_99_^post23, a77^0'=a77^post23, a3434^0'=a3434^post23, i___099^0'=i___099^post23, __rho_10_^0'=__rho_10_^post23, (0 == 0 /\ Irql^0-Irql^post23 == 0 /\ k3^0-k3^post23 == 0 /\ -i___01313^post23+i___01313^0 == 0 /\ -i^post23+i^0 == 0 /\ a3131^0-a3131^post23 == 0 /\ -a3434^post23+a3434^0 == 0 /\ -__rho_7_^post23+__rho_7_^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post23 == 0 /\ -__rho_56_^post23+__rho_56_^0 == 0 /\ ntStatus^0-ntStatus^post23 == 0 /\ ret_IoSetDeviceInterfaceState44^0-ret_IoSetDeviceInterfaceState44^post23 == 0 /\ -k1^post23+k1^0 == 0 /\ CromData^0-CromData^post23 == 0 /\ i___02424^0-i___02424^post23 == 0 /\ -__rho_9_^post23+__rho_9_^0 == 0 /\ -pIrb^post23+pIrb^0 == 0 /\ Irp^0-Irp^post23 == 0 /\ -__rho_3_^post23+__rho_3_^0 == 0 /\ a11^0-a11^post23 == 0 /\ -i___04040^post23+i___04040^0 == 0 /\ i___02020^0-i___02020^post23 == 0 /\ k4^0-k4^post23 == 0 /\ -a3737^post23+a3737^0 == 0 /\ -__rho_10_^post23+__rho_10_^0 == 0 /\ k5^0-k5^post23 == 0 /\ b3535^0-b3535^post23 == 0 /\ a3232^0-a3232^post23 == 0 /\ -b2929^post23+b2929^0 == 0 /\ a2828^0-a2828^post23 == 0 /\ -a1818^post23+a1818^0 == 0 /\ keR^0-keR^post23 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post23+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ IsochDetachData^0-IsochDetachData^post23 == 0 /\ __rho_2_^0-__rho_2_^post23 == 0 /\ -IsochResourceData^post23+IsochResourceData^0 == 0 /\ -ret_IoAllocateIrp2727^post23+ret_IoAllocateIrp2727^0 == 0 /\ __rho_8_^0-__rho_8_^post23 == 0 /\ keA^0-keA^post23 == 0 /\ -__rho_13_^post23+__rho_13_^0 == 0 /\ -ret_ExAllocatePool3030^post23+ret_ExAllocatePool3030^0 == 0 /\ k2^0-k2^post23 == 0 /\ a3838^0-a3838^post23 == 0 /\ 1-CromData^0 <= 0 /\ __rho_1_^0-__rho_1_^post23 == 0 /\ -b22^post23+b22^0 == 0 /\ -a2525^post23+a2525^0 == 0 /\ i___01717^0-i___01717^post23 == 0 /\ -a4343^post23+a4343^0 == 0 /\ __rho_12_^0-__rho_12_^post23 == 0 /\ __rho_5_^0-__rho_5_^post23 == 0 /\ -__rho_99_^post23+__rho_99_^0 == 0 /\ -__rho_6_^post23+__rho_6_^0 == 0 /\ -a77^post23+a77^0 == 0 /\ -i___04646^post23+i___04646^0 == 0 /\ -a4444^post23+a4444^0 == 0 /\ -__rho_11_^post23+__rho_11_^0 == 0 /\ -i___099^post23+i___099^0 == 0 /\ ResourceIrp^0-ResourceIrp^post23 == 0 /\ AsyncAddressData^0-AsyncAddressData^post23 == 0 /\ b2626^0-b2626^post23 == 0 /\ b3333^0-b3333^post23 == 0), cost: 1
  26: l19 -> l20 : i___01717^0'=i___01717^post26, IsochDetachData^0'=IsochDetachData^post26, ntStatus^0'=ntStatus^post26, __rho_6_^0'=__rho_6_^post26, k5^0'=k5^post26, __rho_2_^0'=__rho_2_^post26, a3838^0'=a3838^post26, a2828^0'=a2828^post26, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post26, b3535^0'=b3535^post26, CromData^0'=CromData^post26, b2626^0'=b2626^post26, __rho_4_^0'=__rho_4_^post26, k2^0'=k2^post26, __rho_12_^0'=__rho_12_^post26, i___02424^0'=i___02424^post26, a11^0'=a11^post26, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post26, __rho_8_^0'=__rho_8_^post26, keR^0'=keR^post26, a4444^0'=a4444^post26, a3232^0'=a3232^post26, ResourceIrp^0'=ResourceIrp^post26, i___01313^0'=i___01313^post26, Irql^0'=Irql^post26, b3333^0'=b3333^post26, __rho_5_^0'=__rho_5_^post26, k4^0'=k4^post26, __rho_1_^0'=__rho_1_^post26, i___04646^0'=i___04646^post26, a2525^0'=a2525^post26, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post26, __rho_9_^0'=__rho_9_^post26, AsyncAddressData^0'=AsyncAddressData^post26, b22^0'=b22^post26, a3737^0'=a3737^post26, k1^0'=k1^post26, __rho_11_^0'=__rho_11_^post26, i___02020^0'=i___02020^post26, IsochResourceData^0'=IsochResourceData^post26, pIrb^0'=pIrb^post26, __rho_7_^0'=__rho_7_^post26, keA^0'=keA^post26, __rho_3_^0'=__rho_3_^post26, a4343^0'=a4343^post26, a3131^0'=a3131^post26, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post26, i^0'=i^post26, Irp^0'=Irp^post26, b2929^0'=b2929^post26, __rho_56_^0'=__rho_56_^post26, k3^0'=k3^post26, __rho_13_^0'=__rho_13_^post26, i___04040^0'=i___04040^post26, a1818^0'=a1818^post26, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post26, __rho_99_^0'=__rho_99_^post26, a77^0'=a77^post26, a3434^0'=a3434^post26, i___099^0'=i___099^post26, __rho_10_^0'=__rho_10_^post26, (-__rho_9_^post26+__rho_9_^0 == 0 /\ -__rho_99_^post26+__rho_99_^0 == 0 /\ k5^0-k5^post26 == 0 /\ k4^0-k4^post26 == 0 /\ -k1^post26+k1^0 == 0 /\ -a4343^post26+a4343^0 == 0 /\ -i___04646^post26+i___04646^0 == 0 /\ a3838^0-a3838^post26 == 0 /\ b2626^0-b2626^post26 == 0 /\ CromData^0-CromData^post26 == 0 /\ -a77^post26+a77^0 == 0 /\ -__rho_7_^post26+__rho_7_^0 == 0 /\ -a3737^post26+a3737^0 == 0 /\ -i___04040^post26+i___04040^0 == 0 /\ -i___099^post26+i___099^0 == 0 /\ k3^0-k3^post26 == 0 /\ -b3333^post26+b3333^0 == 0 /\ -__rho_4_^post26+__rho_4_^0 == 0 /\ -b2929^post26+b2929^0 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post26+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ -i^post26+i^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post26 == 0 /\ -a3434^post26+a3434^0 == 0 /\ -ret_ExAllocatePool3030^post26+ret_ExAllocatePool3030^0 == 0 /\ IsochDetachData^0-IsochDetachData^post26 == 0 /\ a2828^0-a2828^post26 == 0 /\ i___02424^0-i___02424^post26 == 0 /\ ret_IoSetDeviceInterfaceState44^0-ret_IoSetDeviceInterfaceState44^post26 == 0 /\ Irql^0-Irql^post26 == 0 /\ keR^0-keR^post26 == 0 /\ -__rho_13_^post26+__rho_13_^0 == 0 /\ a4444^0-a4444^post26 == 0 /\ a3232^0-a3232^post26 == 0 /\ -__rho_3_^post26+__rho_3_^0 == 0 /\ -b22^post26+b22^0 == 0 /\ ntStatus^0-ntStatus^post26 == 0 /\ a11^0-a11^post26 == 0 /\ -Irp^post26+Irp^0 == 0 /\ k2^0-k2^post26 == 0 /\ -pIrb^post26+pIrb^0 == 0 /\ i___02020^0-i___02020^post26 == 0 /\ b3535^0-b3535^post26 == 0 /\ keA^0-keA^post26 == 0 /\ -__rho_56_^post26+__rho_56_^0 == 0 /\ __rho_1_^0-__rho_1_^post26 == 0 /\ -__rho_11_^post26+__rho_11_^0 == 0 /\ -__rho_10_^post26+__rho_10_^0 == 0 /\ -a1818^post26+a1818^0 == 0 /\ __rho_2_^0-__rho_2_^post26 == 0 /\ __rho_8_^0-__rho_8_^post26 == 0 /\ AsyncAddressData^0-AsyncAddressData^post26 == 0 /\ -IsochResourceData^post26+IsochResourceData^0 == 0 /\ ResourceIrp^0-ResourceIrp^post26 == 0 /\ i___01717^0-i___01717^post26 == 0 /\ -ret_IoAllocateIrp2727^post26+ret_IoAllocateIrp2727^0 == 0 /\ -i___01313^post26+i___01313^0 == 0 /\ __rho_12_^0-__rho_12_^post26 == 0 /\ __rho_5_^0-__rho_5_^post26 == 0 /\ a3131^0-a3131^post26 == 0 /\ __rho_6_^0-__rho_6_^post26 == 0 /\ -a2525^post26+a2525^0 == 0), cost: 1
  31: l20 -> l24 : i___01717^0'=i___01717^post31, IsochDetachData^0'=IsochDetachData^post31, ntStatus^0'=ntStatus^post31, __rho_6_^0'=__rho_6_^post31, k5^0'=k5^post31, __rho_2_^0'=__rho_2_^post31, a3838^0'=a3838^post31, a2828^0'=a2828^post31, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post31, b3535^0'=b3535^post31, CromData^0'=CromData^post31, b2626^0'=b2626^post31, __rho_4_^0'=__rho_4_^post31, k2^0'=k2^post31, __rho_12_^0'=__rho_12_^post31, i___02424^0'=i___02424^post31, a11^0'=a11^post31, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post31, __rho_8_^0'=__rho_8_^post31, keR^0'=keR^post31, a4444^0'=a4444^post31, a3232^0'=a3232^post31, ResourceIrp^0'=ResourceIrp^post31, i___01313^0'=i___01313^post31, Irql^0'=Irql^post31, b3333^0'=b3333^post31, __rho_5_^0'=__rho_5_^post31, k4^0'=k4^post31, __rho_1_^0'=__rho_1_^post31, i___04646^0'=i___04646^post31, a2525^0'=a2525^post31, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post31, __rho_9_^0'=__rho_9_^post31, AsyncAddressData^0'=AsyncAddressData^post31, b22^0'=b22^post31, a3737^0'=a3737^post31, k1^0'=k1^post31, __rho_11_^0'=__rho_11_^post31, i___02020^0'=i___02020^post31, IsochResourceData^0'=IsochResourceData^post31, pIrb^0'=pIrb^post31, __rho_7_^0'=__rho_7_^post31, keA^0'=keA^post31, __rho_3_^0'=__rho_3_^post31, a4343^0'=a4343^post31, a3131^0'=a3131^post31, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post31, i^0'=i^post31, Irp^0'=Irp^post31, b2929^0'=b2929^post31, __rho_56_^0'=__rho_56_^post31, k3^0'=k3^post31, __rho_13_^0'=__rho_13_^post31, i___04040^0'=i___04040^post31, a1818^0'=a1818^post31, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post31, __rho_99_^0'=__rho_99_^post31, a77^0'=a77^post31, a3434^0'=a3434^post31, i___099^0'=i___099^post31, __rho_10_^0'=__rho_10_^post31, (0 == 0 /\ i___04040^0-i___04040^post31 == 0 /\ -k3^post31+k3^0 == 0 /\ a2828^0-a2828^post31 == 0 /\ a3838^0-a3838^post31 == 0 /\ -__rho_10_^post31+__rho_10_^0 == 0 /\ __rho_4_^0-__rho_4_^post31 == 0 /\ __rho_2_^0-__rho_2_^post31 == 0 /\ i___01717^0-i___01717^post31 == 0 /\ -a3434^post31+a3434^0 == 0 /\ k1^0-k1^post31 == 0 /\ -b2626^post31+b2626^0 == 0 /\ -__rho_99_^post31+__rho_99_^0 == 0 /\ -a11^post31+a11^0 == 0 /\ -a1818^post31+a1818^0 == 0 /\ __rho_6_^0-__rho_6_^post31 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post31 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post31+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ -ret_IoAllocateIrp2727^post31+ret_IoAllocateIrp2727^0 == 0 /\ -__rho_8_^post31+__rho_8_^0 == 0 /\ -IsochResourceData^post31+IsochResourceData^0 == 0 /\ keR^0-keR^post31 == 0 /\ -i^post31+i^0 == 0 /\ __rho_11_^0-__rho_11_^post31 == 0 /\ i___01313^0-i___01313^post31 == 0 /\ -a3131^post31+a3131^0 == 0 /\ pIrb^0-pIrb^post31 == 0 /\ CromData^0-CromData^post31 == 0 /\ -a3232^post31+a3232^0 == 0 /\ -ret_IoSetDeviceInterfaceState44^post31+ret_IoSetDeviceInterfaceState44^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post31 == 0 /\ -a4343^post31+a4343^0 == 0 /\ ntStatus^0-ntStatus^post31 == 0 /\ a2525^0-a2525^post31 == 0 /\ -AsyncAddressData^post31+AsyncAddressData^0 == 0 /\ -__rho_9_^post31+__rho_9_^0 == 0 /\ -b2929^post31+b2929^0 == 0 /\ -keA^post31+keA^0 == 0 /\ __rho_5_^0-__rho_5_^post31 == 0 /\ -__rho_1_^post31+__rho_1_^0 == 0 /\ k2^0-k2^post31 == 0 /\ -b3333^post31+b3333^0 == 0 /\ ResourceIrp^0-ResourceIrp^post31 == 0 /\ i___02020^0-i___02020^post31 == 0 /\ __rho_7_^0-__rho_7_^post31 == 0 /\ -b22^post31+b22^0 == 0 /\ a4444^0-a4444^post31 == 0 /\ 1-k5^0 <= 0 /\ -__rho_13_^post31+__rho_13_^0 == 0 /\ -__rho_3_^post31+__rho_3_^0 == 0 /\ a3737^0-a3737^post31 == 0 /\ __rho_12_^0-__rho_12_^post31 == 0 /\ -Irp^post31+Irp^0 == 0 /\ Irql^0-Irql^post31 == 0 /\ IsochDetachData^0-IsochDetachData^post31 == 0 /\ -i___02424^post31+i___02424^0 == 0 /\ k5^0-k5^post31 == 0 /\ -a77^post31+a77^0 == 0 /\ b3535^0-b3535^post31 == 0 /\ -i___04646^post31+i___04646^0 == 0 /\ k4^0-k4^post31 == 0 /\ -i___099^post31+i___099^0 == 0), cost: 1
  32: l20 -> l25 : i___01717^0'=i___01717^post32, IsochDetachData^0'=IsochDetachData^post32, ntStatus^0'=ntStatus^post32, __rho_6_^0'=__rho_6_^post32, k5^0'=k5^post32, __rho_2_^0'=__rho_2_^post32, a3838^0'=a3838^post32, a2828^0'=a2828^post32, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post32, b3535^0'=b3535^post32, CromData^0'=CromData^post32, b2626^0'=b2626^post32, __rho_4_^0'=__rho_4_^post32, k2^0'=k2^post32, __rho_12_^0'=__rho_12_^post32, i___02424^0'=i___02424^post32, a11^0'=a11^post32, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post32, __rho_8_^0'=__rho_8_^post32, keR^0'=keR^post32, a4444^0'=a4444^post32, a3232^0'=a3232^post32, ResourceIrp^0'=ResourceIrp^post32, i___01313^0'=i___01313^post32, Irql^0'=Irql^post32, b3333^0'=b3333^post32, __rho_5_^0'=__rho_5_^post32, k4^0'=k4^post32, __rho_1_^0'=__rho_1_^post32, i___04646^0'=i___04646^post32, a2525^0'=a2525^post32, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post32, __rho_9_^0'=__rho_9_^post32, AsyncAddressData^0'=AsyncAddressData^post32, b22^0'=b22^post32, a3737^0'=a3737^post32, k1^0'=k1^post32, __rho_11_^0'=__rho_11_^post32, i___02020^0'=i___02020^post32, IsochResourceData^0'=IsochResourceData^post32, pIrb^0'=pIrb^post32, __rho_7_^0'=__rho_7_^post32, keA^0'=keA^post32, __rho_3_^0'=__rho_3_^post32, a4343^0'=a4343^post32, a3131^0'=a3131^post32, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post32, i^0'=i^post32, Irp^0'=Irp^post32, b2929^0'=b2929^post32, __rho_56_^0'=__rho_56_^post32, k3^0'=k3^post32, __rho_13_^0'=__rho_13_^post32, i___04040^0'=i___04040^post32, a1818^0'=a1818^post32, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post32, __rho_99_^0'=__rho_99_^post32, a77^0'=a77^post32, a3434^0'=a3434^post32, i___099^0'=i___099^post32, __rho_10_^0'=__rho_10_^post32, (-a3434^post32+a3434^0 == 0 /\ -__rho_10_^post32+__rho_10_^0 == 0 /\ -i^post32+i^0 == 0 /\ __rho_9_^0-__rho_9_^post32 == 0 /\ -pIrb^post32+pIrb^0 == 0 /\ CromData^0-CromData^post32 == 0 /\ k5^0 <= 0 /\ -1+keR^111 == 0 /\ -__rho_11_^post32+__rho_11_^0 == 0 /\ -k4^post32+k4^0 == 0 /\ -a3232^post32+a3232^0 == 0 /\ a4444^0-a4444^post32 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post32 == 0 /\ __rho_4_^0-__rho_4_^post32 == 0 /\ -__rho_8_^post32+__rho_8_^0 == 0 /\ __rho_7_^0-__rho_7_^post32 == 0 /\ b22^0-b22^post32 == 0 /\ -b2929^post32+b2929^0 == 0 /\ __rho_1_^0-__rho_1_^post32 == 0 /\ -__rho_99_^post32+__rho_99_^0 == 0 /\ -a1818^post32+a1818^0 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post32+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ a11^0-a11^post32 == 0 /\ i___02020^0-i___02020^post32 == 0 /\ k5^0-k5^post32 == 0 /\ keR^post32 == 0 /\ -a3737^post32+a3737^0 == 0 /\ ntStatus^0-ntStatus^post32 == 0 /\ b3333^0-b3333^post32 == 0 /\ b3535^0-b3535^post32 == 0 /\ IsochDetachData^0-IsochDetachData^post32 == 0 /\ -ret_IoAllocateIrp2727^post32+ret_IoAllocateIrp2727^0 == 0 /\ AsyncAddressData^0-AsyncAddressData^post32 == 0 /\ __rho_12_^0-__rho_12_^post32 == 0 /\ a2828^0-a2828^post32 == 0 /\ keR^220 == 0 /\ -i___04040^post32+i___04040^0 == 0 /\ a3131^0-a3131^post32 == 0 /\ ret_IoSetDeviceInterfaceState44^0-ret_IoSetDeviceInterfaceState44^post32 == 0 /\ -ret_ExAllocatePool3030^post32+ret_ExAllocatePool3030^0 == 0 /\ i___01313^0-i___01313^post32 == 0 /\ -Irp^post32+Irp^0 == 0 /\ -keA^post32+keA^0 == 0 /\ __rho_2_^0-__rho_2_^post32 == 0 /\ -IsochResourceData^post32+IsochResourceData^0 == 0 /\ a3838^0-a3838^post32 == 0 /\ b2626^0-b2626^post32 == 0 /\ -k2^post32+k2^0 == 0 /\ __rho_5_^0-__rho_5_^post32 == 0 /\ -ResourceIrp^post32+ResourceIrp^0 == 0 /\ -__rho_13_^post32+__rho_13_^0 == 0 /\ -Irql^0+i___04646^post32 == 0 /\ i___01717^0-i___01717^post32 == 0 /\ k1^0-k1^post32 == 0 /\ i___02424^0-i___02424^post32 == 0 /\ -__rho_3_^post32+__rho_3_^0 == 0 /\ -__rho_6_^post32+__rho_6_^0 == 0 /\ a2525^0-a2525^post32 == 0 /\ -__rho_56_^post32+__rho_56_^0 == 0 /\ Irql^0-Irql^post32 == 0 /\ -a77^post32+a77^0 == 0 /\ -1+keR^320 == 0 /\ -i___099^post32+i___099^0 == 0 /\ -k3^post32+k3^0 == 0 /\ a4343^0-a4343^post32 == 0), cost: 1
  27: l21 -> l22 : i___01717^0'=i___01717^post27, IsochDetachData^0'=IsochDetachData^post27, ntStatus^0'=ntStatus^post27, __rho_6_^0'=__rho_6_^post27, k5^0'=k5^post27, __rho_2_^0'=__rho_2_^post27, a3838^0'=a3838^post27, a2828^0'=a2828^post27, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post27, b3535^0'=b3535^post27, CromData^0'=CromData^post27, b2626^0'=b2626^post27, __rho_4_^0'=__rho_4_^post27, k2^0'=k2^post27, __rho_12_^0'=__rho_12_^post27, i___02424^0'=i___02424^post27, a11^0'=a11^post27, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post27, __rho_8_^0'=__rho_8_^post27, keR^0'=keR^post27, a4444^0'=a4444^post27, a3232^0'=a3232^post27, ResourceIrp^0'=ResourceIrp^post27, i___01313^0'=i___01313^post27, Irql^0'=Irql^post27, b3333^0'=b3333^post27, __rho_5_^0'=__rho_5_^post27, k4^0'=k4^post27, __rho_1_^0'=__rho_1_^post27, i___04646^0'=i___04646^post27, a2525^0'=a2525^post27, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post27, __rho_9_^0'=__rho_9_^post27, AsyncAddressData^0'=AsyncAddressData^post27, b22^0'=b22^post27, a3737^0'=a3737^post27, k1^0'=k1^post27, __rho_11_^0'=__rho_11_^post27, i___02020^0'=i___02020^post27, IsochResourceData^0'=IsochResourceData^post27, pIrb^0'=pIrb^post27, __rho_7_^0'=__rho_7_^post27, keA^0'=keA^post27, __rho_3_^0'=__rho_3_^post27, a4343^0'=a4343^post27, a3131^0'=a3131^post27, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post27, i^0'=i^post27, Irp^0'=Irp^post27, b2929^0'=b2929^post27, __rho_56_^0'=__rho_56_^post27, k3^0'=k3^post27, __rho_13_^0'=__rho_13_^post27, i___04040^0'=i___04040^post27, a1818^0'=a1818^post27, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post27, __rho_99_^0'=__rho_99_^post27, a77^0'=a77^post27, a3434^0'=a3434^post27, i___099^0'=i___099^post27, __rho_10_^0'=__rho_10_^post27, (-k4^post27+k4^0 == 0 /\ __rho_1_^0-__rho_1_^post27 == 0 /\ __rho_8_^0-__rho_8_^post27 == 0 /\ b3535^0-b3535^post27 == 0 /\ b22^0-b22^post27 == 0 /\ __rho_12_^0-__rho_12_^post27 == 0 /\ __rho_56_^0-__rho_56_^post27 == 0 /\ -__rho_99_^post27+__rho_99_^0 == 0 /\ a4444^0-a4444^post27 == 0 /\ -__rho_7_^post27+__rho_7_^0 == 0 /\ -a3737^post27+a3737^0 == 0 /\ -i___04646^post27+i___04646^0 == 0 /\ -i___099^post27+i___099^0 == 0 /\ -i___04040^post27+i___04040^0 == 0 /\ ret_t1394_SubmitIrpSynch3636^0-ret_t1394_SubmitIrpSynch3636^post27 == 0 /\ -i___01313^post27+i___01313^0 == 0 /\ __rho_2_^0-__rho_2_^post27 == 0 /\ -a4343^post27+a4343^0 == 0 /\ -b2929^post27+b2929^0 == 0 /\ keA^0-keA^post27 == 0 /\ -AsyncAddressData^post27+AsyncAddressData^0 == 0 /\ -i^post27+i^0 == 0 /\ a3838^0-a3838^post27 == 0 /\ __rho_9_^0-__rho_9_^post27 == 0 /\ -ret_ExAllocatePool3030^post27+ret_ExAllocatePool3030^0 == 0 /\ a2525^0-a2525^post27 == 0 /\ -a3434^post27+a3434^0 == 0 /\ i___01717^0-i___01717^post27 == 0 /\ -__rho_13_^post27+__rho_13_^0 == 0 /\ __rho_6_^0-__rho_6_^post27 == 0 /\ __rho_5_^0-__rho_5_^post27 == 0 /\ b3333^0-b3333^post27 == 0 /\ -Irql^post27+Irql^0 == 0 /\ -Irp^post27+Irp^0 == 0 /\ -i___02020^post27+i___02020^0 == 0 /\ b2626^0-b2626^post27 == 0 /\ ResourceIrp^0-ResourceIrp^post27 == 0 /\ IsochResourceData^0-IsochResourceData^post27 == 0 /\ -__rho_3_^post27+__rho_3_^0 == 0 /\ ntStatus^0-ntStatus^post27 == 0 /\ -a3131^post27+a3131^0 == 0 /\ -a77^post27+a77^0 == 0 /\ CromData^0-CromData^post27 == 0 /\ i___02424^0-i___02424^post27 == 0 /\ k5^0-k5^post27 == 0 /\ -k1^post27+k1^0 == 0 /\ -pIrb^post27+pIrb^0 == 0 /\ keR^0-keR^post27 == 0 /\ -__rho_11_^post27+__rho_11_^0 == 0 /\ -a1818^post27+a1818^0 == 0 /\ __rho_4_^0-__rho_4_^post27 == 0 /\ -k3^post27+k3^0 == 0 /\ -__rho_10_^post27+__rho_10_^0 == 0 /\ -a2828^post27+a2828^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post27 == 0 /\ IsochDetachData^0-IsochDetachData^post27 == 0 /\ a3232^0-a3232^post27 == 0 /\ ret_IoSetDeviceInterfaceState44^0-ret_IoSetDeviceInterfaceState44^post27 == 0 /\ a11^0-a11^post27 == 0 /\ k2^0-k2^post27 == 0 /\ ret_IoAllocateIrp2727^0-ret_IoAllocateIrp2727^post27 == 0), cost: 1
  28: l23 -> l19 : i___01717^0'=i___01717^post28, IsochDetachData^0'=IsochDetachData^post28, ntStatus^0'=ntStatus^post28, __rho_6_^0'=__rho_6_^post28, k5^0'=k5^post28, __rho_2_^0'=__rho_2_^post28, a3838^0'=a3838^post28, a2828^0'=a2828^post28, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post28, b3535^0'=b3535^post28, CromData^0'=CromData^post28, b2626^0'=b2626^post28, __rho_4_^0'=__rho_4_^post28, k2^0'=k2^post28, __rho_12_^0'=__rho_12_^post28, i___02424^0'=i___02424^post28, a11^0'=a11^post28, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post28, __rho_8_^0'=__rho_8_^post28, keR^0'=keR^post28, a4444^0'=a4444^post28, a3232^0'=a3232^post28, ResourceIrp^0'=ResourceIrp^post28, i___01313^0'=i___01313^post28, Irql^0'=Irql^post28, b3333^0'=b3333^post28, __rho_5_^0'=__rho_5_^post28, k4^0'=k4^post28, __rho_1_^0'=__rho_1_^post28, i___04646^0'=i___04646^post28, a2525^0'=a2525^post28, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post28, __rho_9_^0'=__rho_9_^post28, AsyncAddressData^0'=AsyncAddressData^post28, b22^0'=b22^post28, a3737^0'=a3737^post28, k1^0'=k1^post28, __rho_11_^0'=__rho_11_^post28, i___02020^0'=i___02020^post28, IsochResourceData^0'=IsochResourceData^post28, pIrb^0'=pIrb^post28, __rho_7_^0'=__rho_7_^post28, keA^0'=keA^post28, __rho_3_^0'=__rho_3_^post28, a4343^0'=a4343^post28, a3131^0'=a3131^post28, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post28, i^0'=i^post28, Irp^0'=Irp^post28, b2929^0'=b2929^post28, __rho_56_^0'=__rho_56_^post28, k3^0'=k3^post28, __rho_13_^0'=__rho_13_^post28, i___04040^0'=i___04040^post28, a1818^0'=a1818^post28, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post28, __rho_99_^0'=__rho_99_^post28, a77^0'=a77^post28, a3434^0'=a3434^post28, i___099^0'=i___099^post28, __rho_10_^0'=__rho_10_^post28, (-a77^post28+a77^0 == 0 /\ -i___01313^post28+i___01313^0 == 0 /\ a2828^0-a2828^post28 == 0 /\ ret_t1394_SubmitIrpSynch3636^0-ret_t1394_SubmitIrpSynch3636^post28 == 0 /\ k5^0-k5^post28 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post28 == 0 /\ -ret_IoSetDeviceInterfaceState44^post28+ret_IoSetDeviceInterfaceState44^0 == 0 /\ __rho_9_^0-__rho_9_^post28 == 0 /\ -ret_IoAllocateIrp2727^post28+ret_IoAllocateIrp2727^0 == 0 /\ -CromData^post28+CromData^0 == 0 /\ -k1^post28+k1^0 == 0 /\ b3333^0-b3333^post28 == 0 /\ keR^0-keR^post28 == 0 /\ __rho_2_^0-__rho_2_^post28 == 0 /\ -i___099^post28+i___099^0 == 0 /\ IsochDetachData^0-IsochDetachData^post28 == 0 /\ IsochResourceData^0-IsochResourceData^post28 == 0 /\ -1+a4444^post28 == 0 /\ -k3^post28+k3^0 == 0 /\ __rho_8_^0-__rho_8_^post28 == 0 /\ b2929^0-b2929^post28 == 0 /\ __rho_13_^0-__rho_13_^post28 == 0 /\ -a3434^post28+a3434^0 == 0 /\ ResourceIrp^0-ResourceIrp^post28 == 0 /\ a3838^0-a3838^post28 == 0 /\ i^0-i^post28 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post28 == 0 /\ ntStatus^0-ntStatus^post28 == 0 /\ -__rho_99_^post28+__rho_99_^0 == 0 /\ a11^0-a11^post28 == 0 /\ -a1818^post28+a1818^0 == 0 /\ -__rho_7_^post28+__rho_7_^0 == 0 /\ a3232^0-a3232^post28 == 0 /\ -__rho_56_^post28+__rho_56_^0 == 0 /\ -2+a4343^post28 == 0 /\ -__rho_5_^post28+__rho_5_^0 == 0 /\ -AsyncAddressData^post28+AsyncAddressData^0 == 0 /\ __rho_3_^0-__rho_3_^post28 == 0 /\ __rho_6_^0-__rho_6_^post28 == 0 /\ k2^0-k2^post28 == 0 /\ i___02424^0-i___02424^post28 == 0 /\ -a3131^post28+a3131^0 == 0 /\ -__rho_11_^post28+__rho_11_^0 == 0 /\ b2626^0-b2626^post28 == 0 /\ -k4^post28+k4^0 == 0 /\ b22^0-b22^post28 == 0 /\ i___01717^0-i___01717^post28 == 0 /\ -a2525^post28+a2525^0 == 0 /\ -i___04040^post28+i___04040^0 == 0 /\ -a3737^post28+a3737^0 == 0 /\ -__rho_10_^post28+__rho_10_^0 == 0 /\ b3535^0-b3535^post28 == 0 /\ -Irp^post28+Irp^0 == 0 /\ -__rho_4_^post28+__rho_4_^0 == 0 /\ -__rho_1_^post28+__rho_1_^0 == 0 /\ -pIrb^post28+pIrb^0 == 0 /\ -i___02020^post28+i___02020^0 == 0 /\ i___04646^0-i___04646^post28 == 0 /\ -__rho_12_^post28+__rho_12_^0 == 0 /\ -keA^post28+keA^0 == 0 /\ -Irql^post28+Irql^0 == 0), cost: 1
  29: l24 -> l23 : i___01717^0'=i___01717^post29, IsochDetachData^0'=IsochDetachData^post29, ntStatus^0'=ntStatus^post29, __rho_6_^0'=__rho_6_^post29, k5^0'=k5^post29, __rho_2_^0'=__rho_2_^post29, a3838^0'=a3838^post29, a2828^0'=a2828^post29, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post29, b3535^0'=b3535^post29, CromData^0'=CromData^post29, b2626^0'=b2626^post29, __rho_4_^0'=__rho_4_^post29, k2^0'=k2^post29, __rho_12_^0'=__rho_12_^post29, i___02424^0'=i___02424^post29, a11^0'=a11^post29, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post29, __rho_8_^0'=__rho_8_^post29, keR^0'=keR^post29, a4444^0'=a4444^post29, a3232^0'=a3232^post29, ResourceIrp^0'=ResourceIrp^post29, i___01313^0'=i___01313^post29, Irql^0'=Irql^post29, b3333^0'=b3333^post29, __rho_5_^0'=__rho_5_^post29, k4^0'=k4^post29, __rho_1_^0'=__rho_1_^post29, i___04646^0'=i___04646^post29, a2525^0'=a2525^post29, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post29, __rho_9_^0'=__rho_9_^post29, AsyncAddressData^0'=AsyncAddressData^post29, b22^0'=b22^post29, a3737^0'=a3737^post29, k1^0'=k1^post29, __rho_11_^0'=__rho_11_^post29, i___02020^0'=i___02020^post29, IsochResourceData^0'=IsochResourceData^post29, pIrb^0'=pIrb^post29, __rho_7_^0'=__rho_7_^post29, keA^0'=keA^post29, __rho_3_^0'=__rho_3_^post29, a4343^0'=a4343^post29, a3131^0'=a3131^post29, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post29, i^0'=i^post29, Irp^0'=Irp^post29, b2929^0'=b2929^post29, __rho_56_^0'=__rho_56_^post29, k3^0'=k3^post29, __rho_13_^0'=__rho_13_^post29, i___04040^0'=i___04040^post29, a1818^0'=a1818^post29, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post29, __rho_99_^0'=__rho_99_^post29, a77^0'=a77^post29, a3434^0'=a3434^post29, i___099^0'=i___099^post29, __rho_10_^0'=__rho_10_^post29, (a4444^0-a4444^post29 == 0 /\ Irp^0-Irp^post29 == 0 /\ -__rho_12_^post29+__rho_12_^0 == 0 /\ b3333^0-b3333^post29 == 0 /\ __rho_13_^0-__rho_13_^post29 == 0 /\ __rho_2_^0-__rho_2_^post29 == 0 /\ -keA^post29+keA^0 == 0 /\ k2^0-k2^post29 == 0 /\ k5^0-k5^post29 == 0 /\ -__rho_56_^post29+__rho_56_^0 == 0 /\ -ret_IoSetDeviceInterfaceState44^post29+ret_IoSetDeviceInterfaceState44^0 == 0 /\ -Irql^post29+Irql^0 == 0 /\ __rho_9_^0-__rho_9_^post29 == 0 /\ a2525^0-a2525^post29 == 0 /\ -i___02020^post29+i___02020^0 == 0 /\ __rho_5_^0-__rho_5_^post29 == 0 /\ ret_t1394_SubmitIrpSynch3636^0-ret_t1394_SubmitIrpSynch3636^post29 == 0 /\ -__rho_11_^post29+__rho_11_^0 == 0 /\ a3838^0-a3838^post29 == 0 /\ -i___01313^post29+i___01313^0 == 0 /\ IsochResourceData^0-IsochResourceData^post29 == 0 /\ __rho_8_^0-__rho_8_^post29 == 0 /\ b2626^0-b2626^post29 == 0 /\ -__rho_10_^post29+__rho_10_^0 == 0 /\ -i___04040^post29+i___04040^0 == 0 /\ b22^0-b22^post29 == 0 /\ -a3737^post29+a3737^0 == 0 /\ -i^post29+i^0 == 0 /\ __rho_1_^0-__rho_1_^post29 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post29 == 0 /\ i___02424^0-i___02424^post29 == 0 /\ -ret_IoAllocateIrp2727^post29+ret_IoAllocateIrp2727^0 == 0 /\ -a3434^post29+a3434^0 == 0 /\ -__rho_4_^post29+__rho_4_^0 == 0 /\ __rho_6_^0-__rho_6_^post29 == 0 /\ ResourceIrp^0-ResourceIrp^post29 == 0 /\ __rho_3_^0-__rho_3_^post29 == 0 /\ b3535^0-b3535^post29 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post29 == 0 /\ -a77^post29+a77^0 == 0 /\ ntStatus^0-ntStatus^post29 == 0 /\ keR^0-keR^post29 == 0 /\ CromData^0-CromData^post29 == 0 /\ IsochDetachData^0-IsochDetachData^post29 == 0 /\ -AsyncAddressData^post29+AsyncAddressData^0 == 0 /\ -a4343^post29+a4343^0 == 0 /\ -pIrb^post29+pIrb^0 == 0 /\ -b2929^post29+b2929^0 == 0 /\ a11^0-a11^post29 == 0 /\ __rho_56_^0 <= 0 /\ -a3131^post29+a3131^0 == 0 /\ -__rho_99_^post29+__rho_99_^0 == 0 /\ -k4^post29+k4^0 == 0 /\ -k1^post29+k1^0 == 0 /\ i___04646^0-i___04646^post29 == 0 /\ -a1818^post29+a1818^0 == 0 /\ -i___099^post29+i___099^0 == 0 /\ -a2828^post29+a2828^0 == 0 /\ -__rho_7_^post29+__rho_7_^0 == 0 /\ i___01717^0-i___01717^post29 == 0 /\ -k3^post29+k3^0 == 0 /\ a3232^0-a3232^post29 == 0), cost: 1
  30: l24 -> l23 : i___01717^0'=i___01717^post30, IsochDetachData^0'=IsochDetachData^post30, ntStatus^0'=ntStatus^post30, __rho_6_^0'=__rho_6_^post30, k5^0'=k5^post30, __rho_2_^0'=__rho_2_^post30, a3838^0'=a3838^post30, a2828^0'=a2828^post30, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post30, b3535^0'=b3535^post30, CromData^0'=CromData^post30, b2626^0'=b2626^post30, __rho_4_^0'=__rho_4_^post30, k2^0'=k2^post30, __rho_12_^0'=__rho_12_^post30, i___02424^0'=i___02424^post30, a11^0'=a11^post30, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post30, __rho_8_^0'=__rho_8_^post30, keR^0'=keR^post30, a4444^0'=a4444^post30, a3232^0'=a3232^post30, ResourceIrp^0'=ResourceIrp^post30, i___01313^0'=i___01313^post30, Irql^0'=Irql^post30, b3333^0'=b3333^post30, __rho_5_^0'=__rho_5_^post30, k4^0'=k4^post30, __rho_1_^0'=__rho_1_^post30, i___04646^0'=i___04646^post30, a2525^0'=a2525^post30, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post30, __rho_9_^0'=__rho_9_^post30, AsyncAddressData^0'=AsyncAddressData^post30, b22^0'=b22^post30, a3737^0'=a3737^post30, k1^0'=k1^post30, __rho_11_^0'=__rho_11_^post30, i___02020^0'=i___02020^post30, IsochResourceData^0'=IsochResourceData^post30, pIrb^0'=pIrb^post30, __rho_7_^0'=__rho_7_^post30, keA^0'=keA^post30, __rho_3_^0'=__rho_3_^post30, a4343^0'=a4343^post30, a3131^0'=a3131^post30, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post30, i^0'=i^post30, Irp^0'=Irp^post30, b2929^0'=b2929^post30, __rho_56_^0'=__rho_56_^post30, k3^0'=k3^post30, __rho_13_^0'=__rho_13_^post30, i___04040^0'=i___04040^post30, a1818^0'=a1818^post30, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post30, __rho_99_^0'=__rho_99_^post30, a77^0'=a77^post30, a3434^0'=a3434^post30, i___099^0'=i___099^post30, __rho_10_^0'=__rho_10_^post30, (i___04646^0-i___04646^post30 == 0 /\ -i___04040^post30+i___04040^0 == 0 /\ ret_t1394_SubmitIrpSynch3636^0-ret_t1394_SubmitIrpSynch3636^post30 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post30 == 0 /\ -a3434^post30+a3434^0 == 0 /\ -k3^post30+k3^0 == 0 /\ ntStatus^0-ntStatus^post30 == 0 /\ -__rho_99_^post30+__rho_99_^0 == 0 /\ -__rho_5_^post30+__rho_5_^0 == 0 /\ a2525^0-a2525^post30 == 0 /\ 1-k5^0+k5^post30 == 0 /\ __rho_13_^0-__rho_13_^post30 == 0 /\ b2929^0-b2929^post30 == 0 /\ -a1818^post30+a1818^0 == 0 /\ -__rho_7_^post30+__rho_7_^0 == 0 /\ ResourceIrp^0-ResourceIrp^post30 == 0 /\ -__rho_8_^post30+__rho_8_^0 == 0 /\ i^0-i^post30 == 0 /\ a4444^0-a4444^post30 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post30 == 0 /\ 1-__rho_56_^0 <= 0 /\ -AsyncAddressData^post30+AsyncAddressData^0 == 0 /\ -k1^post30+k1^0 == 0 /\ a3737^0-a3737^post30 == 0 /\ IsochDetachData^0-IsochDetachData^post30 == 0 /\ a11^0-a11^post30 == 0 /\ -k2^post30+k2^0 == 0 /\ -a3131^post30+a3131^0 == 0 /\ -k4^post30+k4^0 == 0 /\ b3535^0-b3535^post30 == 0 /\ a2828^0-a2828^post30 == 0 /\ -__rho_10_^post30+__rho_10_^0 == 0 /\ -ret_IoSetDeviceInterfaceState44^post30+ret_IoSetDeviceInterfaceState44^0 == 0 /\ a3838^0-a3838^post30 == 0 /\ -a4343^post30+a4343^0 == 0 /\ -__rho_12_^post30+__rho_12_^0 == 0 /\ -Irp^post30+Irp^0 == 0 /\ b2626^0-b2626^post30 == 0 /\ __rho_4_^0-__rho_4_^post30 == 0 /\ __rho_2_^0-__rho_2_^post30 == 0 /\ -__rho_1_^post30+__rho_1_^0 == 0 /\ a77^0-a77^post30 == 0 /\ -i___02020^post30+i___02020^0 == 0 /\ -Irql^post30+Irql^0 == 0 /\ -keA^post30+keA^0 == 0 /\ i___01717^0-i___01717^post30 == 0 /\ b3333^0-b3333^post30 == 0 /\ pIrb^0-pIrb^post30 == 0 /\ -__rho_56_^post30+__rho_56_^0 == 0 /\ __rho_6_^0-__rho_6_^post30 == 0 /\ i___02424^0-i___02424^post30 == 0 /\ -b22^post30+b22^0 == 0 /\ keR^0-keR^post30 == 0 /\ __rho_9_^0-__rho_9_^post30 == 0 /\ a3232^0-a3232^post30 == 0 /\ -IsochResourceData^post30+IsochResourceData^0 == 0 /\ -__rho_11_^post30+__rho_11_^0 == 0 /\ -i___099^post30+i___099^0 == 0 /\ -CromData^post30+CromData^0 == 0 /\ -ret_IoAllocateIrp2727^post30+ret_IoAllocateIrp2727^0 == 0 /\ __rho_3_^0-__rho_3_^post30 == 0 /\ i___01313^0-i___01313^post30 == 0), cost: 1
  33: l25 -> l26 : i___01717^0'=i___01717^post33, IsochDetachData^0'=IsochDetachData^post33, ntStatus^0'=ntStatus^post33, __rho_6_^0'=__rho_6_^post33, k5^0'=k5^post33, __rho_2_^0'=__rho_2_^post33, a3838^0'=a3838^post33, a2828^0'=a2828^post33, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post33, b3535^0'=b3535^post33, CromData^0'=CromData^post33, b2626^0'=b2626^post33, __rho_4_^0'=__rho_4_^post33, k2^0'=k2^post33, __rho_12_^0'=__rho_12_^post33, i___02424^0'=i___02424^post33, a11^0'=a11^post33, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post33, __rho_8_^0'=__rho_8_^post33, keR^0'=keR^post33, a4444^0'=a4444^post33, a3232^0'=a3232^post33, ResourceIrp^0'=ResourceIrp^post33, i___01313^0'=i___01313^post33, Irql^0'=Irql^post33, b3333^0'=b3333^post33, __rho_5_^0'=__rho_5_^post33, k4^0'=k4^post33, __rho_1_^0'=__rho_1_^post33, i___04646^0'=i___04646^post33, a2525^0'=a2525^post33, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post33, __rho_9_^0'=__rho_9_^post33, AsyncAddressData^0'=AsyncAddressData^post33, b22^0'=b22^post33, a3737^0'=a3737^post33, k1^0'=k1^post33, __rho_11_^0'=__rho_11_^post33, i___02020^0'=i___02020^post33, IsochResourceData^0'=IsochResourceData^post33, pIrb^0'=pIrb^post33, __rho_7_^0'=__rho_7_^post33, keA^0'=keA^post33, __rho_3_^0'=__rho_3_^post33, a4343^0'=a4343^post33, a3131^0'=a3131^post33, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post33, i^0'=i^post33, Irp^0'=Irp^post33, b2929^0'=b2929^post33, __rho_56_^0'=__rho_56_^post33, k3^0'=k3^post33, __rho_13_^0'=__rho_13_^post33, i___04040^0'=i___04040^post33, a1818^0'=a1818^post33, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post33, __rho_99_^0'=__rho_99_^post33, a77^0'=a77^post33, a3434^0'=a3434^post33, i___099^0'=i___099^post33, __rho_10_^0'=__rho_10_^post33, (-k1^post33+k1^0 == 0 /\ -b2929^post33+b2929^0 == 0 /\ __rho_8_^0-__rho_8_^post33 == 0 /\ k5^0-k5^post33 == 0 /\ b3333^0-b3333^post33 == 0 /\ -i___099^post33+i___099^0 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post33 == 0 /\ -__rho_99_^post33+__rho_99_^0 == 0 /\ -Irql^post33+Irql^0 == 0 /\ -i___04040^post33+i___04040^0 == 0 /\ -a4343^post33+a4343^0 == 0 /\ ret_t1394_SubmitIrpSynch3636^0-ret_t1394_SubmitIrpSynch3636^post33 == 0 /\ -__rho_12_^post33+__rho_12_^0 == 0 /\ a3737^0-a3737^post33 == 0 /\ -i___01313^post33+i___01313^0 == 0 /\ -AsyncAddressData^post33+AsyncAddressData^0 == 0 /\ a3838^0-a3838^post33 == 0 /\ ntStatus^0-ntStatus^post33 == 0 /\ b2626^0-b2626^post33 == 0 /\ -__rho_5_^post33+__rho_5_^0 == 0 /\ a2828^0-a2828^post33 == 0 /\ i^0-i^post33 == 0 /\ -__rho_7_^post33+__rho_7_^0 == 0 /\ a2525^0-a2525^post33 == 0 /\ IsochDetachData^0-IsochDetachData^post33 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post33 == 0 /\ -ret_IoSetDeviceInterfaceState44^post33+ret_IoSetDeviceInterfaceState44^0 == 0 /\ -__rho_56_^post33+__rho_56_^0 == 0 /\ -__rho_13_^post33+__rho_13_^0 == 0 /\ a4444^0-a4444^post33 == 0 /\ -a77^post33+a77^0 == 0 /\ a11^0-a11^post33 == 0 /\ -Irp^post33+Irp^0 == 0 /\ ResourceIrp^0-ResourceIrp^post33 == 0 /\ b22^0-b22^post33 == 0 /\ b3535^0-b3535^post33 == 0 /\ __rho_3_^0-__rho_3_^post33 == 0 /\ -__rho_11_^post33+__rho_11_^0 == 0 /\ -a3131^post33+a3131^0 == 0 /\ -i___02020^post33+i___02020^0 == 0 /\ -k4^post33+k4^0 == 0 /\ keR^0-keR^post33 == 0 /\ __rho_1_^0-__rho_1_^post33 == 0 /\ i___02424^0-i___02424^post33 == 0 /\ -a1818^post33+a1818^0 == 0 /\ __rho_2_^0-__rho_2_^post33 == 0 /\ __rho_4_^0-__rho_4_^post33 == 0 /\ -pIrb^post33+pIrb^0 == 0 /\ -a3434^post33+a3434^0 == 0 /\ -__rho_10_^post33+__rho_10_^0 == 0 /\ -k3^post33+k3^0 == 0 /\ -CromData^post33+CromData^0 == 0 /\ __rho_9_^0-__rho_9_^post33 == 0 /\ a3232^0-a3232^post33 == 0 /\ -keA^post33+keA^0 == 0 /\ -IsochResourceData^post33+IsochResourceData^0 == 0 /\ i___01717^0-i___01717^post33 == 0 /\ i___04646^0-i___04646^post33 == 0 /\ k2^0-k2^post33 == 0 /\ ret_IoAllocateIrp2727^0-ret_IoAllocateIrp2727^post33 == 0 /\ __rho_6_^0-__rho_6_^post33 == 0), cost: 1
  34: l26 -> l25 : i___01717^0'=i___01717^post34, IsochDetachData^0'=IsochDetachData^post34, ntStatus^0'=ntStatus^post34, __rho_6_^0'=__rho_6_^post34, k5^0'=k5^post34, __rho_2_^0'=__rho_2_^post34, a3838^0'=a3838^post34, a2828^0'=a2828^post34, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post34, b3535^0'=b3535^post34, CromData^0'=CromData^post34, b2626^0'=b2626^post34, __rho_4_^0'=__rho_4_^post34, k2^0'=k2^post34, __rho_12_^0'=__rho_12_^post34, i___02424^0'=i___02424^post34, a11^0'=a11^post34, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post34, __rho_8_^0'=__rho_8_^post34, keR^0'=keR^post34, a4444^0'=a4444^post34, a3232^0'=a3232^post34, ResourceIrp^0'=ResourceIrp^post34, i___01313^0'=i___01313^post34, Irql^0'=Irql^post34, b3333^0'=b3333^post34, __rho_5_^0'=__rho_5_^post34, k4^0'=k4^post34, __rho_1_^0'=__rho_1_^post34, i___04646^0'=i___04646^post34, a2525^0'=a2525^post34, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post34, __rho_9_^0'=__rho_9_^post34, AsyncAddressData^0'=AsyncAddressData^post34, b22^0'=b22^post34, a3737^0'=a3737^post34, k1^0'=k1^post34, __rho_11_^0'=__rho_11_^post34, i___02020^0'=i___02020^post34, IsochResourceData^0'=IsochResourceData^post34, pIrb^0'=pIrb^post34, __rho_7_^0'=__rho_7_^post34, keA^0'=keA^post34, __rho_3_^0'=__rho_3_^post34, a4343^0'=a4343^post34, a3131^0'=a3131^post34, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post34, i^0'=i^post34, Irp^0'=Irp^post34, b2929^0'=b2929^post34, __rho_56_^0'=__rho_56_^post34, k3^0'=k3^post34, __rho_13_^0'=__rho_13_^post34, i___04040^0'=i___04040^post34, a1818^0'=a1818^post34, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post34, __rho_99_^0'=__rho_99_^post34, a77^0'=a77^post34, a3434^0'=a3434^post34, i___099^0'=i___099^post34, __rho_10_^0'=__rho_10_^post34, (-__rho_3_^post34+__rho_3_^0 == 0 /\ a2525^0-a2525^post34 == 0 /\ -a77^post34+a77^0 == 0 /\ -a1818^post34+a1818^0 == 0 /\ a3232^0-a3232^post34 == 0 /\ IsochDetachData^0-IsochDetachData^post34 == 0 /\ __rho_11_^0-__rho_11_^post34 == 0 /\ k1^0-k1^post34 == 0 /\ i___04646^0-i___04646^post34 == 0 /\ -ret_IoAllocateIrp2727^post34+ret_IoAllocateIrp2727^0 == 0 /\ __rho_6_^0-__rho_6_^post34 == 0 /\ -a3131^post34+a3131^0 == 0 /\ a11^0-a11^post34 == 0 /\ -IsochResourceData^post34+IsochResourceData^0 == 0 /\ ResourceIrp^0-ResourceIrp^post34 == 0 /\ b2626^0-b2626^post34 == 0 /\ -k2^post34+k2^0 == 0 /\ b3333^0-b3333^post34 == 0 /\ b3535^0-b3535^post34 == 0 /\ -k3^post34+k3^0 == 0 /\ k5^0-k5^post34 == 0 /\ b2929^0-b2929^post34 == 0 /\ __rho_13_^0-__rho_13_^post34 == 0 /\ -__rho_1_^post34+__rho_1_^0 == 0 /\ a4444^0-a4444^post34 == 0 /\ a3737^0-a3737^post34 == 0 /\ ntStatus^0-ntStatus^post34 == 0 /\ -__rho_99_^post34+__rho_99_^0 == 0 /\ -__rho_8_^post34+__rho_8_^0 == 0 /\ __rho_9_^0-__rho_9_^post34 == 0 /\ -__rho_56_^post34+__rho_56_^0 == 0 /\ -ret_t1394Diag_PnpStopDevice33^post34+ret_t1394Diag_PnpStopDevice33^0 == 0 /\ -AsyncAddressData^post34+AsyncAddressData^0 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post34+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ i___01717^0-i___01717^post34 == 0 /\ a2828^0-a2828^post34 == 0 /\ -__rho_7_^post34+__rho_7_^0 == 0 /\ -a4343^post34+a4343^0 == 0 /\ -i___099^post34+i___099^0 == 0 /\ -k4^post34+k4^0 == 0 /\ -i^post34+i^0 == 0 /\ -__rho_2_^post34+__rho_2_^0 == 0 /\ -i___04040^post34+i___04040^0 == 0 /\ -Irql^post34+Irql^0 == 0 /\ -__rho_10_^post34+__rho_10_^0 == 0 /\ keR^0-keR^post34 == 0 /\ -keA^post34+keA^0 == 0 /\ __rho_12_^0-__rho_12_^post34 == 0 /\ CromData^0-CromData^post34 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post34 == 0 /\ -Irp^post34+Irp^0 == 0 /\ i___01313^0-i___01313^post34 == 0 /\ -a3434^post34+a3434^0 == 0 /\ -ret_IoSetDeviceInterfaceState44^post34+ret_IoSetDeviceInterfaceState44^0 == 0 /\ pIrb^0-pIrb^post34 == 0 /\ -b22^post34+b22^0 == 0 /\ -__rho_5_^post34+__rho_5_^0 == 0 /\ i___02424^0-i___02424^post34 == 0 /\ __rho_4_^0-__rho_4_^post34 == 0 /\ -i___02020^post34+i___02020^0 == 0 /\ a3838^0-a3838^post34 == 0), cost: 1
  35: l27 -> l15 : i___01717^0'=i___01717^post35, IsochDetachData^0'=IsochDetachData^post35, ntStatus^0'=ntStatus^post35, __rho_6_^0'=__rho_6_^post35, k5^0'=k5^post35, __rho_2_^0'=__rho_2_^post35, a3838^0'=a3838^post35, a2828^0'=a2828^post35, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post35, b3535^0'=b3535^post35, CromData^0'=CromData^post35, b2626^0'=b2626^post35, __rho_4_^0'=__rho_4_^post35, k2^0'=k2^post35, __rho_12_^0'=__rho_12_^post35, i___02424^0'=i___02424^post35, a11^0'=a11^post35, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post35, __rho_8_^0'=__rho_8_^post35, keR^0'=keR^post35, a4444^0'=a4444^post35, a3232^0'=a3232^post35, ResourceIrp^0'=ResourceIrp^post35, i___01313^0'=i___01313^post35, Irql^0'=Irql^post35, b3333^0'=b3333^post35, __rho_5_^0'=__rho_5_^post35, k4^0'=k4^post35, __rho_1_^0'=__rho_1_^post35, i___04646^0'=i___04646^post35, a2525^0'=a2525^post35, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post35, __rho_9_^0'=__rho_9_^post35, AsyncAddressData^0'=AsyncAddressData^post35, b22^0'=b22^post35, a3737^0'=a3737^post35, k1^0'=k1^post35, __rho_11_^0'=__rho_11_^post35, i___02020^0'=i___02020^post35, IsochResourceData^0'=IsochResourceData^post35, pIrb^0'=pIrb^post35, __rho_7_^0'=__rho_7_^post35, keA^0'=keA^post35, __rho_3_^0'=__rho_3_^post35, a4343^0'=a4343^post35, a3131^0'=a3131^post35, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post35, i^0'=i^post35, Irp^0'=Irp^post35, b2929^0'=b2929^post35, __rho_56_^0'=__rho_56_^post35, k3^0'=k3^post35, __rho_13_^0'=__rho_13_^post35, i___04040^0'=i___04040^post35, a1818^0'=a1818^post35, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post35, __rho_99_^0'=__rho_99_^post35, a77^0'=a77^post35, a3434^0'=a3434^post35, i___099^0'=i___099^post35, __rho_10_^0'=__rho_10_^post35, (-__rho_1_^post35+__rho_1_^0 == 0 /\ i___01313^0-i___01313^post35 == 0 /\ -__rho_13_^post35+__rho_13_^0 == 0 /\ -__rho_3_^post35+__rho_3_^0 == 0 /\ a3434^post35-ResourceIrp^0 == 0 /\ -pIrb^post35+pIrb^0 == 0 /\ a3232^post35-pIrb^0 == 0 /\ a2828^0-a2828^post35 == 0 /\ -b22^post35+b22^0 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post35 == 0 /\ __rho_11_^0-__rho_11_^post35 == 0 /\ i___04040^0-i___04040^post35 == 0 /\ -ret_IoAllocateIrp2727^post35+ret_IoAllocateIrp2727^0 == 0 /\ -a77^post35+a77^0 == 0 /\ -IsochResourceData^post35+IsochResourceData^0 == 0 /\ -a2525^post35+a2525^0 == 0 /\ i___01717^0-i___01717^post35 == 0 /\ i___04646^0-i___04646^post35 == 0 /\ -Irql^post35+Irql^0 == 0 /\ ret_t1394_SubmitIrpSynch3636^post35 == 0 /\ __rho_8_^0-__rho_8_^post35 == 0 /\ __rho_12_^0-__rho_12_^post35 == 0 /\ -k3^post35+k3^0 == 0 /\ b3333^post35 == 0 /\ -keR^post35+keR^0 == 0 /\ CromData^0-CromData^post35 == 0 /\ -__rho_99_^post35+__rho_99_^0 == 0 /\ -a11^post35+a11^0 == 0 /\ a3838^post35-ResourceIrp^0 == 0 /\ __rho_4_^0-__rho_4_^post35 == 0 /\ __rho_2_^0-__rho_2_^post35 == 0 /\ a4444^0-a4444^post35 == 0 /\ k1^0-k1^post35 == 0 /\ ntStatus^post35-ret_t1394_SubmitIrpSynch3636^post35 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post35 == 0 /\ -__rho_9_^post35+__rho_9_^0 == 0 /\ -a1818^post35+a1818^0 == 0 /\ -AsyncAddressData^post35+AsyncAddressData^0 == 0 /\ k2^0-k2^post35 == 0 /\ -a3131^post35+a3131^0 == 0 /\ -i^post35+i^0 == 0 /\ a4343^0-a4343^post35 == 0 /\ 1-pIrb^0 <= 0 /\ __rho_6_^0-__rho_6_^post35 == 0 /\ i___02424^0-i___02424^post35 == 0 /\ __rho_7_^0-__rho_7_^post35 == 0 /\ k4^0-k4^post35 == 0 /\ -pIrb^0+b3535^post35 == 0 /\ __rho_5_^0-__rho_5_^post35 == 0 /\ -__rho_56_^post35+__rho_56_^0 == 0 /\ -i___099^post35+i___099^0 == 0 /\ b2626^0-b2626^post35 == 0 /\ i___02020^0-i___02020^post35 == 0 /\ IsochDetachData^0-IsochDetachData^post35 == 0 /\ -ret_IoSetDeviceInterfaceState44^post35+ret_IoSetDeviceInterfaceState44^0 == 0 /\ -keA^post35+keA^0 == 0 /\ -__rho_10_^post35+__rho_10_^0 == 0 /\ -Irp^post35+Irp^0 == 0 /\ k5^0-k5^post35 == 0 /\ -ResourceIrp^post35+ResourceIrp^0 == 0 /\ -b2929^post35+b2929^0 == 0 /\ a3737^post35-pIrb^0 == 0), cost: 1
  36: l27 -> l15 : i___01717^0'=i___01717^post36, IsochDetachData^0'=IsochDetachData^post36, ntStatus^0'=ntStatus^post36, __rho_6_^0'=__rho_6_^post36, k5^0'=k5^post36, __rho_2_^0'=__rho_2_^post36, a3838^0'=a3838^post36, a2828^0'=a2828^post36, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post36, b3535^0'=b3535^post36, CromData^0'=CromData^post36, b2626^0'=b2626^post36, __rho_4_^0'=__rho_4_^post36, k2^0'=k2^post36, __rho_12_^0'=__rho_12_^post36, i___02424^0'=i___02424^post36, a11^0'=a11^post36, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post36, __rho_8_^0'=__rho_8_^post36, keR^0'=keR^post36, a4444^0'=a4444^post36, a3232^0'=a3232^post36, ResourceIrp^0'=ResourceIrp^post36, i___01313^0'=i___01313^post36, Irql^0'=Irql^post36, b3333^0'=b3333^post36, __rho_5_^0'=__rho_5_^post36, k4^0'=k4^post36, __rho_1_^0'=__rho_1_^post36, i___04646^0'=i___04646^post36, a2525^0'=a2525^post36, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post36, __rho_9_^0'=__rho_9_^post36, AsyncAddressData^0'=AsyncAddressData^post36, b22^0'=b22^post36, a3737^0'=a3737^post36, k1^0'=k1^post36, __rho_11_^0'=__rho_11_^post36, i___02020^0'=i___02020^post36, IsochResourceData^0'=IsochResourceData^post36, pIrb^0'=pIrb^post36, __rho_7_^0'=__rho_7_^post36, keA^0'=keA^post36, __rho_3_^0'=__rho_3_^post36, a4343^0'=a4343^post36, a3131^0'=a3131^post36, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post36, i^0'=i^post36, Irp^0'=Irp^post36, b2929^0'=b2929^post36, __rho_56_^0'=__rho_56_^post36, k3^0'=k3^post36, __rho_13_^0'=__rho_13_^post36, i___04040^0'=i___04040^post36, a1818^0'=a1818^post36, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post36, __rho_99_^0'=__rho_99_^post36, a77^0'=a77^post36, a3434^0'=a3434^post36, i___099^0'=i___099^post36, __rho_10_^0'=__rho_10_^post36, (a4444^0-a4444^post36 == 0 /\ -__rho_7_^post36+__rho_7_^0 == 0 /\ k2^0-k2^post36 == 0 /\ -__rho_1_^post36+__rho_1_^0 == 0 /\ -i^post36+i^0 == 0 /\ k5^0-k5^post36 == 0 /\ AsyncAddressData^0-AsyncAddressData^post36 == 0 /\ -Irp^post36+Irp^0 == 0 /\ k4^0-k4^post36 == 0 /\ -__rho_56_^post36+__rho_56_^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post36 == 0 /\ CromData^0-CromData^post36 == 0 /\ a11^0-a11^post36 == 0 /\ -ResourceIrp^post36+ResourceIrp^0 == 0 /\ -a77^post36+a77^0 == 0 /\ -i___04646^post36+i___04646^0 == 0 /\ -a3232^post36+a3232^0 == 0 /\ ret_IoSetDeviceInterfaceState44^0-ret_IoSetDeviceInterfaceState44^post36 == 0 /\ -b3333^post36+b3333^0 == 0 /\ -keR^post36+keR^0 == 0 /\ -i___04040^post36+i___04040^0 == 0 /\ i___02020^0-i___02020^post36 == 0 /\ -__rho_10_^post36+__rho_10_^0 == 0 /\ a2828^0-a2828^post36 == 0 /\ -a3737^post36+a3737^0 == 0 /\ __rho_12_^0-__rho_12_^post36 == 0 /\ -b22^post36+b22^0 == 0 /\ -ret_IoAllocateIrp2727^post36+ret_IoAllocateIrp2727^0 == 0 /\ -i___01313^post36+i___01313^0 == 0 /\ -ResourceIrp^0+a3131^post36 == 0 /\ __rho_2_^0-__rho_2_^post36 == 0 /\ -a3434^post36+a3434^0 == 0 /\ -IsochResourceData^post36+IsochResourceData^0 == 0 /\ __rho_6_^0-__rho_6_^post36 == 0 /\ __rho_11_^0-__rho_11_^post36 == 0 /\ -a2525^post36+a2525^0 == 0 /\ b3535^0-b3535^post36 == 0 /\ -__rho_3_^post36+__rho_3_^0 == 0 /\ pIrb^0 <= 0 /\ -ret_ExAllocatePool3030^post36+ret_ExAllocatePool3030^0 == 0 /\ a3838^0-a3838^post36 == 0 /\ keA^0-keA^post36 == 0 /\ -__rho_13_^post36+__rho_13_^0 == 0 /\ -k1^post36+k1^0 == 0 /\ Irql^0-Irql^post36 == 0 /\ IsochDetachData^0-IsochDetachData^post36 == 0 /\ __rho_4_^0-__rho_4_^post36 == 0 /\ -__rho_9_^post36+__rho_9_^0 == 0 /\ -pIrb^post36+pIrb^0 == 0 /\ -i___099^post36+i___099^0 == 0 /\ __rho_8_^0-__rho_8_^post36 == 0 /\ -ntStatus^post36+ntStatus^0 == 0 /\ -__rho_99_^post36+__rho_99_^0 == 0 /\ __rho_5_^0-__rho_5_^post36 == 0 /\ -b2929^post36+b2929^0 == 0 /\ b2626^0-b2626^post36 == 0 /\ i___02424^0-i___02424^post36 == 0 /\ -k3^post36+k3^0 == 0 /\ i___01717^0-i___01717^post36 == 0 /\ a4343^0-a4343^post36 == 0 /\ -a1818^post36+a1818^0 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post36+ret_t1394_SubmitIrpSynch3636^0 == 0), cost: 1
  37: l28 -> l7 : i___01717^0'=i___01717^post37, IsochDetachData^0'=IsochDetachData^post37, ntStatus^0'=ntStatus^post37, __rho_6_^0'=__rho_6_^post37, k5^0'=k5^post37, __rho_2_^0'=__rho_2_^post37, a3838^0'=a3838^post37, a2828^0'=a2828^post37, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post37, b3535^0'=b3535^post37, CromData^0'=CromData^post37, b2626^0'=b2626^post37, __rho_4_^0'=__rho_4_^post37, k2^0'=k2^post37, __rho_12_^0'=__rho_12_^post37, i___02424^0'=i___02424^post37, a11^0'=a11^post37, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post37, __rho_8_^0'=__rho_8_^post37, keR^0'=keR^post37, a4444^0'=a4444^post37, a3232^0'=a3232^post37, ResourceIrp^0'=ResourceIrp^post37, i___01313^0'=i___01313^post37, Irql^0'=Irql^post37, b3333^0'=b3333^post37, __rho_5_^0'=__rho_5_^post37, k4^0'=k4^post37, __rho_1_^0'=__rho_1_^post37, i___04646^0'=i___04646^post37, a2525^0'=a2525^post37, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post37, __rho_9_^0'=__rho_9_^post37, AsyncAddressData^0'=AsyncAddressData^post37, b22^0'=b22^post37, a3737^0'=a3737^post37, k1^0'=k1^post37, __rho_11_^0'=__rho_11_^post37, i___02020^0'=i___02020^post37, IsochResourceData^0'=IsochResourceData^post37, pIrb^0'=pIrb^post37, __rho_7_^0'=__rho_7_^post37, keA^0'=keA^post37, __rho_3_^0'=__rho_3_^post37, a4343^0'=a4343^post37, a3131^0'=a3131^post37, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post37, i^0'=i^post37, Irp^0'=Irp^post37, b2929^0'=b2929^post37, __rho_56_^0'=__rho_56_^post37, k3^0'=k3^post37, __rho_13_^0'=__rho_13_^post37, i___04040^0'=i___04040^post37, a1818^0'=a1818^post37, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post37, __rho_99_^0'=__rho_99_^post37, a77^0'=a77^post37, a3434^0'=a3434^post37, i___099^0'=i___099^post37, __rho_10_^0'=__rho_10_^post37, (0 == 0 /\ a2828^0-a2828^post37 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post37+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ -Irql^post37+Irql^0 == 0 /\ -ret_IoAllocateIrp2727^post37+ret_IoAllocateIrp2727^0 == 0 /\ -ResourceIrp^post37+ResourceIrp^0 == 0 /\ -__rho_13_^post37+__rho_13_^0 == 0 /\ __rho_5_^0-__rho_5_^post37 == 0 /\ a4444^0-a4444^post37 == 0 /\ b3333^0-b3333^post37 == 0 /\ -a11^post37+a11^0 == 0 /\ -a77^post37+a77^0 == 0 /\ __rho_12_^0-__rho_12_^post37 == 0 /\ a4343^0-a4343^post37 == 0 /\ a2525^0-a2525^post37 == 0 /\ b22^0-b22^post37 == 0 /\ -__rho_3_^post37+__rho_3_^0 == 0 /\ -__rho_11_^post37+__rho_11_^0 == 0 /\ i___01313^0-i___01313^post37 == 0 /\ CromData^0-CromData^post37 == 0 /\ -__rho_99_^post37+__rho_99_^0 == 0 /\ a3838^0-a3838^post37 == 0 /\ -k3^post37+k3^0 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post37 == 0 /\ Irp^0-Irp^post37 == 0 /\ k4^0-k4^post37 == 0 /\ keA^230 == 0 /\ __rho_4_^0-__rho_4_^post37 == 0 /\ -b2929^post37+b2929^0 == 0 /\ b3535^0-b3535^post37 == 0 /\ -a3434^post37+a3434^0 == 0 /\ __rho_8_^0-__rho_8_^post37 == 0 /\ IsochDetachData^0-IsochDetachData^post37 == 0 /\ -__rho_7_^post37+__rho_7_^0 == 0 /\ -a3232^post37+a3232^0 == 0 /\ -b2626^post37+b2626^0 == 0 /\ -a1818^post37+a1818^0 == 0 /\ -i___099^post37+i___099^0 == 0 /\ i___02424^0-i___02424^post37 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post37 == 0 /\ -1+keA^13 == 0 /\ -i^post37+i^0 == 0 /\ -__rho_56_^post37+__rho_56_^0 == 0 /\ -keR^post37+keR^0 == 0 /\ -i___04646^post37+i___04646^0 == 0 /\ k2^0-k2^post37 == 0 /\ ret_IoSetDeviceInterfaceState44^post37 == 0 /\ __rho_1_^0-__rho_1_^post37 == 0 /\ -a3737^post37+a3737^0 == 0 /\ k5^0-k5^post37 == 0 /\ IsochResourceData^0-IsochResourceData^post37 == 0 /\ i___01717^0-i___01717^post37 == 0 /\ keA^post37 == 0 /\ AsyncAddressData^0-AsyncAddressData^post37 == 0 /\ -__rho_6_^post37+__rho_6_^0 == 0 /\ -pIrb^post37+pIrb^0 == 0 /\ -__rho_10_^post37+__rho_10_^0 == 0 /\ -i___04040^post37+i___04040^0 == 0 /\ -i___02020^post37+i___02020^0 == 0 /\ k1^post37-__rho_2_^post37 == 0 /\ -1+keA^330 == 0 /\ -__rho_9_^post37+__rho_9_^0 == 0 /\ -ret_IoSetDeviceInterfaceState44^post37+ntStatus^post37 == 0 /\ a3131^0-a3131^post37 == 0), cost: 1
  38: l29 -> l27 : i___01717^0'=i___01717^post38, IsochDetachData^0'=IsochDetachData^post38, ntStatus^0'=ntStatus^post38, __rho_6_^0'=__rho_6_^post38, k5^0'=k5^post38, __rho_2_^0'=__rho_2_^post38, a3838^0'=a3838^post38, a2828^0'=a2828^post38, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post38, b3535^0'=b3535^post38, CromData^0'=CromData^post38, b2626^0'=b2626^post38, __rho_4_^0'=__rho_4_^post38, k2^0'=k2^post38, __rho_12_^0'=__rho_12_^post38, i___02424^0'=i___02424^post38, a11^0'=a11^post38, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post38, __rho_8_^0'=__rho_8_^post38, keR^0'=keR^post38, a4444^0'=a4444^post38, a3232^0'=a3232^post38, ResourceIrp^0'=ResourceIrp^post38, i___01313^0'=i___01313^post38, Irql^0'=Irql^post38, b3333^0'=b3333^post38, __rho_5_^0'=__rho_5_^post38, k4^0'=k4^post38, __rho_1_^0'=__rho_1_^post38, i___04646^0'=i___04646^post38, a2525^0'=a2525^post38, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post38, __rho_9_^0'=__rho_9_^post38, AsyncAddressData^0'=AsyncAddressData^post38, b22^0'=b22^post38, a3737^0'=a3737^post38, k1^0'=k1^post38, __rho_11_^0'=__rho_11_^post38, i___02020^0'=i___02020^post38, IsochResourceData^0'=IsochResourceData^post38, pIrb^0'=pIrb^post38, __rho_7_^0'=__rho_7_^post38, keA^0'=keA^post38, __rho_3_^0'=__rho_3_^post38, a4343^0'=a4343^post38, a3131^0'=a3131^post38, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post38, i^0'=i^post38, Irp^0'=Irp^post38, b2929^0'=b2929^post38, __rho_56_^0'=__rho_56_^post38, k3^0'=k3^post38, __rho_13_^0'=__rho_13_^post38, i___04040^0'=i___04040^post38, a1818^0'=a1818^post38, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post38, __rho_99_^0'=__rho_99_^post38, a77^0'=a77^post38, a3434^0'=a3434^post38, i___099^0'=i___099^post38, __rho_10_^0'=__rho_10_^post38, (-i___04040^post38+i___04040^0 == 0 /\ i___04646^0-i___04646^post38 == 0 /\ __rho_4_^0-__rho_4_^post38 == 0 /\ -IsochResourceData^post38+IsochResourceData^0 == 0 /\ ntStatus^0-ntStatus^post38 == 0 /\ -a3434^post38+a3434^0 == 0 /\ -__rho_5_^post38+__rho_5_^0 == 0 /\ a3232^0-a3232^post38 == 0 /\ b2626^0-b2626^post38 == 0 /\ -__rho_99_^post38+__rho_99_^0 == 0 /\ -b22^post38+b22^0 == 0 /\ k1^0-k1^post38 == 0 /\ -__rho_13_^post38+__rho_13_^0 == 0 /\ -a3131^post38+a3131^0 == 0 /\ a4444^0-a4444^post38 == 0 /\ -a11^post38+a11^0 == 0 /\ a3737^0-a3737^post38 == 0 /\ -a1818^post38+a1818^0 == 0 /\ -i___099^post38+i___099^0 == 0 /\ -ret_ExAllocatePool3030^post38+pIrb^post38 == 0 /\ IsochDetachData^0-IsochDetachData^post38 == 0 /\ i___01313^0-i___01313^post38 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post38+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ -k3^post38+k3^0 == 0 /\ keR^0-keR^post38 == 0 /\ -__rho_8_^post38+__rho_8_^0 == 0 /\ -k4^post38+k4^0 == 0 /\ b3535^0-b3535^post38 == 0 /\ -AsyncAddressData^post38+AsyncAddressData^0 == 0 /\ k5^0-k5^post38 == 0 /\ -ret_IoSetDeviceInterfaceState44^post38+ret_IoSetDeviceInterfaceState44^0 == 0 /\ -__rho_10_^post38+__rho_10_^0 == 0 /\ -Irp^post38+Irp^0 == 0 /\ k2^0-k2^post38 == 0 /\ ret_ExAllocatePool3030^post38 == 0 /\ __rho_2_^0-__rho_2_^post38 == 0 /\ -keA^post38+keA^0 == 0 /\ a77^0-a77^post38 == 0 /\ -__rho_1_^post38+__rho_1_^0 == 0 /\ -Irql^post38+Irql^0 == 0 /\ -1+a2828^post38 == 0 /\ i___01717^0-i___01717^post38 == 0 /\ -i___02424^post38+i___02424^0 == 0 /\ -i___02020^post38+i___02020^0 == 0 /\ -__rho_56_^post38+__rho_56_^0 == 0 /\ b3333^0-b3333^post38 == 0 /\ __rho_7_^0-__rho_7_^post38 == 0 /\ b2929^post38 == 0 /\ __rho_6_^0-__rho_6_^post38 == 0 /\ ResourceIrp^0-ResourceIrp^post38 == 0 /\ -__rho_3_^post38+__rho_3_^0 == 0 /\ a3838^0-a3838^post38 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post38 == 0 /\ __rho_9_^0-__rho_9_^post38 == 0 /\ -__rho_11_^post38+__rho_11_^0 == 0 /\ a2525^0-a2525^post38 == 0 /\ __rho_12_^0-__rho_12_^post38 == 0 /\ CromData^0-CromData^post38 == 0 /\ -i^post38+i^0 == 0 /\ -a4343^post38+a4343^0 == 0 /\ -ret_IoAllocateIrp2727^post38+ret_IoAllocateIrp2727^0 == 0), cost: 1
  39: l30 -> l29 : i___01717^0'=i___01717^post39, IsochDetachData^0'=IsochDetachData^post39, ntStatus^0'=ntStatus^post39, __rho_6_^0'=__rho_6_^post39, k5^0'=k5^post39, __rho_2_^0'=__rho_2_^post39, a3838^0'=a3838^post39, a2828^0'=a2828^post39, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post39, b3535^0'=b3535^post39, CromData^0'=CromData^post39, b2626^0'=b2626^post39, __rho_4_^0'=__rho_4_^post39, k2^0'=k2^post39, __rho_12_^0'=__rho_12_^post39, i___02424^0'=i___02424^post39, a11^0'=a11^post39, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post39, __rho_8_^0'=__rho_8_^post39, keR^0'=keR^post39, a4444^0'=a4444^post39, a3232^0'=a3232^post39, ResourceIrp^0'=ResourceIrp^post39, i___01313^0'=i___01313^post39, Irql^0'=Irql^post39, b3333^0'=b3333^post39, __rho_5_^0'=__rho_5_^post39, k4^0'=k4^post39, __rho_1_^0'=__rho_1_^post39, i___04646^0'=i___04646^post39, a2525^0'=a2525^post39, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post39, __rho_9_^0'=__rho_9_^post39, AsyncAddressData^0'=AsyncAddressData^post39, b22^0'=b22^post39, a3737^0'=a3737^post39, k1^0'=k1^post39, __rho_11_^0'=__rho_11_^post39, i___02020^0'=i___02020^post39, IsochResourceData^0'=IsochResourceData^post39, pIrb^0'=pIrb^post39, __rho_7_^0'=__rho_7_^post39, keA^0'=keA^post39, __rho_3_^0'=__rho_3_^post39, a4343^0'=a4343^post39, a3131^0'=a3131^post39, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post39, i^0'=i^post39, Irp^0'=Irp^post39, b2929^0'=b2929^post39, __rho_56_^0'=__rho_56_^post39, k3^0'=k3^post39, __rho_13_^0'=__rho_13_^post39, i___04040^0'=i___04040^post39, a1818^0'=a1818^post39, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post39, __rho_99_^0'=__rho_99_^post39, a77^0'=a77^post39, a3434^0'=a3434^post39, i___099^0'=i___099^post39, __rho_10_^0'=__rho_10_^post39, (-keR^post39+keR^0 == 0 /\ k2^0-k2^post39 == 0 /\ -Irql^post39+Irql^0 == 0 /\ __rho_2_^0-__rho_2_^post39 == 0 /\ i___01717^0-i___01717^post39 == 0 /\ __rho_8_^0-__rho_8_^post39 == 0 /\ -__rho_9_^post39+__rho_9_^0 == 0 /\ -a3434^post39+a3434^0 == 0 /\ -__rho_99_^post39+__rho_99_^0 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post39 == 0 /\ 1-ResourceIrp^0 <= 0 /\ __rho_6_^0-__rho_6_^post39 == 0 /\ __rho_7_^0-__rho_7_^post39 == 0 /\ -b22^post39+b22^0 == 0 /\ -__rho_5_^post39+__rho_5_^0 == 0 /\ __rho_11_^0-__rho_11_^post39 == 0 /\ -b2929^post39+b2929^0 == 0 /\ -a11^post39+a11^0 == 0 /\ -b3333^post39+b3333^0 == 0 /\ -a1818^post39+a1818^0 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post39+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ -a3232^post39+a3232^0 == 0 /\ __rho_12_^0-__rho_12_^post39 == 0 /\ CromData^0-CromData^post39 == 0 /\ i___04646^0-i___04646^post39 == 0 /\ AsyncAddressData^0-AsyncAddressData^post39 == 0 /\ -i___04040^post39+i___04040^0 == 0 /\ -ret_IoSetDeviceInterfaceState44^post39+ret_IoSetDeviceInterfaceState44^0 == 0 /\ a3131^0-a3131^post39 == 0 /\ -Irp^post39+Irp^0 == 0 /\ -__rho_10_^post39+__rho_10_^0 == 0 /\ __rho_4_^0-__rho_4_^post39 == 0 /\ -keA^post39+keA^0 == 0 /\ -a2525^post39+a2525^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post39 == 0 /\ b2626^0-b2626^post39 == 0 /\ -i___02020^post39+i___02020^0 == 0 /\ ntStatus^0-ntStatus^post39 == 0 /\ a4444^0-a4444^post39 == 0 /\ a3838^0-a3838^post39 == 0 /\ a3737^0-a3737^post39 == 0 /\ -ResourceIrp^post39+ResourceIrp^0 == 0 /\ -__rho_13_^post39+__rho_13_^0 == 0 /\ k4^0-k4^post39 == 0 /\ pIrb^0-pIrb^post39 == 0 /\ k1^0-k1^post39 == 0 /\ i___02424^0-i___02424^post39 == 0 /\ -__rho_3_^post39+__rho_3_^0 == 0 /\ -__rho_56_^post39+__rho_56_^0 == 0 /\ -__rho_1_^post39+__rho_1_^0 == 0 /\ -a77^post39+a77^0 == 0 /\ -k3^post39+k3^0 == 0 /\ i___01313^0-i___01313^post39 == 0 /\ -ret_IoAllocateIrp2727^post39+ret_IoAllocateIrp2727^0 == 0 /\ IsochDetachData^0-IsochDetachData^post39 == 0 /\ -IsochResourceData^post39+IsochResourceData^0 == 0 /\ k5^0-k5^post39 == 0 /\ b3535^0-b3535^post39 == 0 /\ a2828^0-a2828^post39 == 0 /\ -i___099^post39+i___099^0 == 0 /\ a4343^0-a4343^post39 == 0 /\ -i^post39+i^0 == 0), cost: 1
  40: l30 -> l29 : i___01717^0'=i___01717^post40, IsochDetachData^0'=IsochDetachData^post40, ntStatus^0'=ntStatus^post40, __rho_6_^0'=__rho_6_^post40, k5^0'=k5^post40, __rho_2_^0'=__rho_2_^post40, a3838^0'=a3838^post40, a2828^0'=a2828^post40, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post40, b3535^0'=b3535^post40, CromData^0'=CromData^post40, b2626^0'=b2626^post40, __rho_4_^0'=__rho_4_^post40, k2^0'=k2^post40, __rho_12_^0'=__rho_12_^post40, i___02424^0'=i___02424^post40, a11^0'=a11^post40, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post40, __rho_8_^0'=__rho_8_^post40, keR^0'=keR^post40, a4444^0'=a4444^post40, a3232^0'=a3232^post40, ResourceIrp^0'=ResourceIrp^post40, i___01313^0'=i___01313^post40, Irql^0'=Irql^post40, b3333^0'=b3333^post40, __rho_5_^0'=__rho_5_^post40, k4^0'=k4^post40, __rho_1_^0'=__rho_1_^post40, i___04646^0'=i___04646^post40, a2525^0'=a2525^post40, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post40, __rho_9_^0'=__rho_9_^post40, AsyncAddressData^0'=AsyncAddressData^post40, b22^0'=b22^post40, a3737^0'=a3737^post40, k1^0'=k1^post40, __rho_11_^0'=__rho_11_^post40, i___02020^0'=i___02020^post40, IsochResourceData^0'=IsochResourceData^post40, pIrb^0'=pIrb^post40, __rho_7_^0'=__rho_7_^post40, keA^0'=keA^post40, __rho_3_^0'=__rho_3_^post40, a4343^0'=a4343^post40, a3131^0'=a3131^post40, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post40, i^0'=i^post40, Irp^0'=Irp^post40, b2929^0'=b2929^post40, __rho_56_^0'=__rho_56_^post40, k3^0'=k3^post40, __rho_13_^0'=__rho_13_^post40, i___04040^0'=i___04040^post40, a1818^0'=a1818^post40, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post40, __rho_99_^0'=__rho_99_^post40, a77^0'=a77^post40, a3434^0'=a3434^post40, i___099^0'=i___099^post40, __rho_10_^0'=__rho_10_^post40, (-i___04646^post40+i___04646^0 == 0 /\ k5^0-k5^post40 == 0 /\ -__rho_99_^post40+__rho_99_^0 == 0 /\ k4^0-k4^post40 == 0 /\ -ResourceIrp^post40+ResourceIrp^0 == 0 /\ -i___04040^post40+i___04040^0 == 0 /\ -i___099^post40+i___099^0 == 0 /\ i___02424^0-i___02424^post40 == 0 /\ CromData^0-CromData^post40 == 0 /\ -a4343^post40+a4343^0 == 0 /\ -b2929^post40+b2929^0 == 0 /\ keR^0-keR^post40 == 0 /\ k3^0-k3^post40 == 0 /\ -__rho_9_^post40+__rho_9_^0 == 0 /\ -a3737^post40+a3737^0 == 0 /\ AsyncAddressData^0-AsyncAddressData^post40 == 0 /\ ret_IoSetDeviceInterfaceState44^0-ret_IoSetDeviceInterfaceState44^post40 == 0 /\ k2^0-k2^post40 == 0 /\ a2828^0-a2828^post40 == 0 /\ ntStatus^0-ntStatus^post40 == 0 /\ a3232^0-a3232^post40 == 0 /\ -ret_ExAllocatePool3030^post40+ret_ExAllocatePool3030^0 == 0 /\ -__rho_13_^post40+__rho_13_^0 == 0 /\ IsochDetachData^0-IsochDetachData^post40 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post40 == 0 /\ __rho_7_^0-__rho_7_^post40 == 0 /\ -i___01313^post40+i___01313^0 == 0 /\ -b3333^post40+b3333^0 == 0 /\ a4444^0-a4444^post40 == 0 /\ a11^0-a11^post40 == 0 /\ -__rho_56_^post40+__rho_56_^0 == 0 /\ Irql^0-Irql^post40 == 0 /\ -a77^post40+a77^0 == 0 /\ -Irp^post40+Irp^0 == 0 /\ -a2525^post40+a2525^0 == 0 /\ -__rho_3_^post40+__rho_3_^0 == 0 /\ -b22^post40+b22^0 == 0 /\ keA^0-keA^post40 == 0 /\ b3535^0-b3535^post40 == 0 /\ i___02020^0-i___02020^post40 == 0 /\ -__rho_11_^post40+__rho_11_^0 == 0 /\ -__rho_10_^post40+__rho_10_^0 == 0 /\ __rho_1_^0-__rho_1_^post40 == 0 /\ __rho_12_^0-__rho_12_^post40 == 0 /\ -a3838^post40+a3838^0 == 0 /\ __rho_2_^0-__rho_2_^post40 == 0 /\ -pIrb^post40+pIrb^0 == 0 /\ -a3434^post40+a3434^0 == 0 /\ -a1818^post40+a1818^0 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post40+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ -i^post40+i^0 == 0 /\ a3131^0-a3131^post40 == 0 /\ b2626^0-b2626^post40 == 0 /\ -IsochResourceData^post40+IsochResourceData^0 == 0 /\ __rho_4_^0-__rho_4_^post40 == 0 /\ -ret_IoAllocateIrp2727^post40+ret_IoAllocateIrp2727^0 == 0 /\ i___01717^0-i___01717^post40 == 0 /\ __rho_8_^0-__rho_8_^post40 == 0 /\ -k1^post40+k1^0 == 0 /\ __rho_6_^0-__rho_6_^post40 == 0 /\ __rho_5_^0-__rho_5_^post40 == 0 /\ 1+ResourceIrp^0 <= 0), cost: 1
  41: l30 -> l15 : i___01717^0'=i___01717^post41, IsochDetachData^0'=IsochDetachData^post41, ntStatus^0'=ntStatus^post41, __rho_6_^0'=__rho_6_^post41, k5^0'=k5^post41, __rho_2_^0'=__rho_2_^post41, a3838^0'=a3838^post41, a2828^0'=a2828^post41, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post41, b3535^0'=b3535^post41, CromData^0'=CromData^post41, b2626^0'=b2626^post41, __rho_4_^0'=__rho_4_^post41, k2^0'=k2^post41, __rho_12_^0'=__rho_12_^post41, i___02424^0'=i___02424^post41, a11^0'=a11^post41, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post41, __rho_8_^0'=__rho_8_^post41, keR^0'=keR^post41, a4444^0'=a4444^post41, a3232^0'=a3232^post41, ResourceIrp^0'=ResourceIrp^post41, i___01313^0'=i___01313^post41, Irql^0'=Irql^post41, b3333^0'=b3333^post41, __rho_5_^0'=__rho_5_^post41, k4^0'=k4^post41, __rho_1_^0'=__rho_1_^post41, i___04646^0'=i___04646^post41, a2525^0'=a2525^post41, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post41, __rho_9_^0'=__rho_9_^post41, AsyncAddressData^0'=AsyncAddressData^post41, b22^0'=b22^post41, a3737^0'=a3737^post41, k1^0'=k1^post41, __rho_11_^0'=__rho_11_^post41, i___02020^0'=i___02020^post41, IsochResourceData^0'=IsochResourceData^post41, pIrb^0'=pIrb^post41, __rho_7_^0'=__rho_7_^post41, keA^0'=keA^post41, __rho_3_^0'=__rho_3_^post41, a4343^0'=a4343^post41, a3131^0'=a3131^post41, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post41, i^0'=i^post41, Irp^0'=Irp^post41, b2929^0'=b2929^post41, __rho_56_^0'=__rho_56_^post41, k3^0'=k3^post41, __rho_13_^0'=__rho_13_^post41, i___04040^0'=i___04040^post41, a1818^0'=a1818^post41, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post41, __rho_99_^0'=__rho_99_^post41, a77^0'=a77^post41, a3434^0'=a3434^post41, i___099^0'=i___099^post41, __rho_10_^0'=__rho_10_^post41, (-__rho_56_^post41+__rho_56_^0 == 0 /\ -__rho_3_^post41+__rho_3_^0 == 0 /\ keR^0-keR^post41 == 0 /\ -k1^post41+k1^0 == 0 /\ -b2929^post41+b2929^0 == 0 /\ k5^0-k5^post41 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post41+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ -a4444^post41+a4444^0 == 0 /\ -pIrb^post41+pIrb^0 == 0 /\ ret_IoSetDeviceInterfaceState44^0-ret_IoSetDeviceInterfaceState44^post41 == 0 /\ -ResourceIrp^0 <= 0 /\ -a4343^post41+a4343^0 == 0 /\ CromData^0-CromData^post41 == 0 /\ -i___01313^post41+i___01313^0 == 0 /\ -__rho_11_^post41+__rho_11_^0 == 0 /\ __rho_5_^0-__rho_5_^post41 == 0 /\ i___02424^0-i___02424^post41 == 0 /\ ntStatus^0-ntStatus^post41 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post41 == 0 /\ __rho_4_^0-__rho_4_^post41 == 0 /\ k3^0-k3^post41 == 0 /\ -i___099^post41+i___099^0 == 0 /\ -i___04040^post41+i___04040^0 == 0 /\ a3232^0-a3232^post41 == 0 /\ -Irp^post41+Irp^0 == 0 /\ -__rho_10_^post41+__rho_10_^0 == 0 /\ IsochDetachData^0-IsochDetachData^post41 == 0 /\ a11^0-a11^post41 == 0 /\ -a2525^post41+a2525^0 == 0 /\ ResourceIrp^0 <= 0 /\ a2828^0-a2828^post41 == 0 /\ -a3434^post41+a3434^0 == 0 /\ k2^0-k2^post41 == 0 /\ -__rho_13_^post41+__rho_13_^0 == 0 /\ __rho_8_^0-__rho_8_^post41 == 0 /\ -k4^post41+k4^0 == 0 /\ -a77^post41+a77^0 == 0 /\ -a1818^post41+a1818^0 == 0 /\ -__rho_9_^post41+__rho_9_^0 == 0 /\ __rho_12_^0-__rho_12_^post41 == 0 /\ b3535^0-b3535^post41 == 0 /\ b3333^0-b3333^post41 == 0 /\ -i___04646^post41+i___04646^0 == 0 /\ -__rho_7_^post41+__rho_7_^0 == 0 /\ -ret_IoAllocateIrp2727^post41+ret_IoAllocateIrp2727^0 == 0 /\ a3838^0-a3838^post41 == 0 /\ -ret_ExAllocatePool3030^post41+ret_ExAllocatePool3030^0 == 0 /\ __rho_2_^0-__rho_2_^post41 == 0 /\ -i^post41+i^0 == 0 /\ IsochResourceData^0-IsochResourceData^post41 == 0 /\ i___01717^0-i___01717^post41 == 0 /\ __rho_1_^0-__rho_1_^post41 == 0 /\ AsyncAddressData^0-AsyncAddressData^post41 == 0 /\ -a3737^post41+a3737^0 == 0 /\ Irql^0-Irql^post41 == 0 /\ a3131^0-a3131^post41 == 0 /\ __rho_6_^0-__rho_6_^post41 == 0 /\ -b22^post41+b22^0 == 0 /\ -__rho_99_^post41+__rho_99_^0 == 0 /\ ResourceIrp^0-ResourceIrp^post41 == 0 /\ b2626^0-b2626^post41 == 0 /\ -i___02020^post41+i___02020^0 == 0 /\ keA^0-keA^post41 == 0), cost: 1
  42: l31 -> l15 : i___01717^0'=i___01717^post42, IsochDetachData^0'=IsochDetachData^post42, ntStatus^0'=ntStatus^post42, __rho_6_^0'=__rho_6_^post42, k5^0'=k5^post42, __rho_2_^0'=__rho_2_^post42, a3838^0'=a3838^post42, a2828^0'=a2828^post42, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post42, b3535^0'=b3535^post42, CromData^0'=CromData^post42, b2626^0'=b2626^post42, __rho_4_^0'=__rho_4_^post42, k2^0'=k2^post42, __rho_12_^0'=__rho_12_^post42, i___02424^0'=i___02424^post42, a11^0'=a11^post42, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post42, __rho_8_^0'=__rho_8_^post42, keR^0'=keR^post42, a4444^0'=a4444^post42, a3232^0'=a3232^post42, ResourceIrp^0'=ResourceIrp^post42, i___01313^0'=i___01313^post42, Irql^0'=Irql^post42, b3333^0'=b3333^post42, __rho_5_^0'=__rho_5_^post42, k4^0'=k4^post42, __rho_1_^0'=__rho_1_^post42, i___04646^0'=i___04646^post42, a2525^0'=a2525^post42, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post42, __rho_9_^0'=__rho_9_^post42, AsyncAddressData^0'=AsyncAddressData^post42, b22^0'=b22^post42, a3737^0'=a3737^post42, k1^0'=k1^post42, __rho_11_^0'=__rho_11_^post42, i___02020^0'=i___02020^post42, IsochResourceData^0'=IsochResourceData^post42, pIrb^0'=pIrb^post42, __rho_7_^0'=__rho_7_^post42, keA^0'=keA^post42, __rho_3_^0'=__rho_3_^post42, a4343^0'=a4343^post42, a3131^0'=a3131^post42, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post42, i^0'=i^post42, Irp^0'=Irp^post42, b2929^0'=b2929^post42, __rho_56_^0'=__rho_56_^post42, k3^0'=k3^post42, __rho_13_^0'=__rho_13_^post42, i___04040^0'=i___04040^post42, a1818^0'=a1818^post42, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post42, __rho_99_^0'=__rho_99_^post42, a77^0'=a77^post42, a3434^0'=a3434^post42, i___099^0'=i___099^post42, __rho_10_^0'=__rho_10_^post42, (__rho_5_^0-__rho_5_^post42 == 0 /\ a3131^0-a3131^post42 == 0 /\ -ret_ExAllocatePool3030^post42+ret_ExAllocatePool3030^0 == 0 /\ Irp^0-Irp^post42 == 0 /\ -ret_IoAllocateIrp2727^post42+ret_IoAllocateIrp2727^0 == 0 /\ a11^0-a11^post42 == 0 /\ -__rho_13_^post42+__rho_13_^0 == 0 /\ __rho_6_^0-__rho_6_^post42 == 0 /\ b3535^0-b3535^post42 == 0 /\ b22^0-b22^post42 == 0 /\ -a4444^post42+a4444^0 == 0 /\ b2626^0-b2626^post42 == 0 /\ __rho_1_^0-__rho_1_^post42 == 0 /\ i___02424^0-i___02424^post42 == 0 /\ -a77^post42+a77^0 == 0 /\ __rho_56_^0-__rho_56_^post42 == 0 /\ keR^0-keR^post42 == 0 /\ -k3^post42+k3^0 == 0 /\ -__rho_99_^post42+__rho_99_^0 == 0 /\ i___01717^0-i___01717^post42 == 0 /\ -k1^post42+k1^0 == 0 /\ __rho_8_^0-__rho_8_^post42 == 0 /\ -i___099^post42+i___099^0 == 0 /\ -a4343^post42+a4343^0 == 0 /\ -a1818^post42+a1818^0 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post42+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ -a3434^post42+a3434^0 == 0 /\ a2525^0-a2525^post42 == 0 /\ -i^post42+i^0 == 0 /\ i___04646^0-i___04646^post42 == 0 /\ -__rho_7_^post42+__rho_7_^0 == 0 /\ k5^0-k5^post42 == 0 /\ IsochResourceData^0 <= 0 /\ a2828^0-a2828^post42 == 0 /\ -k4^post42+k4^0 == 0 /\ b3333^0-b3333^post42 == 0 /\ a3232^0-a3232^post42 == 0 /\ Irql^0-Irql^post42 == 0 /\ -__rho_11_^post42+__rho_11_^0 == 0 /\ IsochDetachData^0-IsochDetachData^post42 == 0 /\ -pIrb^post42+pIrb^0 == 0 /\ __rho_2_^0-__rho_2_^post42 == 0 /\ __rho_12_^0-__rho_12_^post42 == 0 /\ -__rho_3_^post42+__rho_3_^0 == 0 /\ -i___02020^post42+i___02020^0 == 0 /\ -__rho_10_^post42+__rho_10_^0 == 0 /\ -i___04040^post42+i___04040^0 == 0 /\ IsochResourceData^0-IsochResourceData^post42 == 0 /\ k2^0-k2^post42 == 0 /\ -AsyncAddressData^post42+AsyncAddressData^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post42 == 0 /\ ntStatus^0-ntStatus^post42 == 0 /\ ResourceIrp^0-ResourceIrp^post42 == 0 /\ ret_IoSetDeviceInterfaceState44^0-ret_IoSetDeviceInterfaceState44^post42 == 0 /\ -__rho_4_^post42+__rho_4_^0 == 0 /\ keA^0-keA^post42 == 0 /\ -b2929^post42+b2929^0 == 0 /\ -i___01313^post42+i___01313^0 == 0 /\ -__rho_9_^post42+__rho_9_^0 == 0 /\ -a3838^post42+a3838^0 == 0 /\ CromData^0-CromData^post42 == 0 /\ -a3737^post42+a3737^0 == 0), cost: 1
  43: l31 -> l30 : i___01717^0'=i___01717^post43, IsochDetachData^0'=IsochDetachData^post43, ntStatus^0'=ntStatus^post43, __rho_6_^0'=__rho_6_^post43, k5^0'=k5^post43, __rho_2_^0'=__rho_2_^post43, a3838^0'=a3838^post43, a2828^0'=a2828^post43, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post43, b3535^0'=b3535^post43, CromData^0'=CromData^post43, b2626^0'=b2626^post43, __rho_4_^0'=__rho_4_^post43, k2^0'=k2^post43, __rho_12_^0'=__rho_12_^post43, i___02424^0'=i___02424^post43, a11^0'=a11^post43, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post43, __rho_8_^0'=__rho_8_^post43, keR^0'=keR^post43, a4444^0'=a4444^post43, a3232^0'=a3232^post43, ResourceIrp^0'=ResourceIrp^post43, i___01313^0'=i___01313^post43, Irql^0'=Irql^post43, b3333^0'=b3333^post43, __rho_5_^0'=__rho_5_^post43, k4^0'=k4^post43, __rho_1_^0'=__rho_1_^post43, i___04646^0'=i___04646^post43, a2525^0'=a2525^post43, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post43, __rho_9_^0'=__rho_9_^post43, AsyncAddressData^0'=AsyncAddressData^post43, b22^0'=b22^post43, a3737^0'=a3737^post43, k1^0'=k1^post43, __rho_11_^0'=__rho_11_^post43, i___02020^0'=i___02020^post43, IsochResourceData^0'=IsochResourceData^post43, pIrb^0'=pIrb^post43, __rho_7_^0'=__rho_7_^post43, keA^0'=keA^post43, __rho_3_^0'=__rho_3_^post43, a4343^0'=a4343^post43, a3131^0'=a3131^post43, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post43, i^0'=i^post43, Irp^0'=Irp^post43, b2929^0'=b2929^post43, __rho_56_^0'=__rho_56_^post43, k3^0'=k3^post43, __rho_13_^0'=__rho_13_^post43, i___04040^0'=i___04040^post43, a1818^0'=a1818^post43, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=__rho_99_^post43, a77^0'=a77^post43, a3434^0'=a3434^post43, i___099^0'=i___099^post43, __rho_10_^0'=__rho_10_^post43, (0 == 0 /\ ntStatus^0-ntStatus^post43 == 0 /\ b2929^0-b2929^post43 == 0 /\ k5^0-k5^post43 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post43 == 0 /\ -a3232^post43+a3232^0 == 0 /\ IsochDetachData^0-IsochDetachData^post43 == 0 /\ keR^0-keR^post43 == 0 /\ -k1^post43+k1^0 == 0 /\ -__rho_8_^post43+__rho_8_^0 == 0 /\ __rho_4_^0-__rho_4_^post43 == 0 /\ -i___04040^post43+i___04040^0 == 0 /\ -i___099^post43+i___099^0 == 0 /\ ret_t1394_SubmitIrpSynch3636^0-ret_t1394_SubmitIrpSynch3636^post43 == 0 /\ -AsyncAddressData^post43+AsyncAddressData^0 == 0 /\ -a4343^post43+a4343^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post43 == 0 /\ -b22^post43+b22^0 == 0 /\ -__rho_5_^post43+__rho_5_^0 == 0 /\ a2828^0-a2828^post43 == 0 /\ b2626^post43 == 0 /\ -__rho_13_^post43+__rho_13_^0 == 0 /\ a11^0-a11^post43 == 0 /\ -Irp^post43+Irp^0 == 0 /\ __rho_11_^0-__rho_11_^post43 == 0 /\ -keA^post43+keA^0 == 0 /\ b3535^0-b3535^post43 == 0 /\ -a1818^post43+a1818^0 == 0 /\ ResourceIrp^post43-ret_IoAllocateIrp2727^post43 == 0 /\ __rho_12_^0-__rho_12_^post43 == 0 /\ -a77^post43+a77^0 == 0 /\ i___01717^0-i___01717^post43 == 0 /\ -ret_IoSetDeviceInterfaceState44^post43+ret_IoSetDeviceInterfaceState44^0 == 0 /\ -k2^post43+k2^0 == 0 /\ a3737^0-a3737^post43 == 0 /\ -__rho_99_^post43+ret_IoAllocateIrp2727^post43 == 0 /\ -__rho_1_^post43+__rho_1_^0 == 0 /\ -a3131^post43+a3131^0 == 0 /\ -1+a2525^post43 == 0 /\ -k3^post43+k3^0 == 0 /\ 1-IsochResourceData^0 <= 0 /\ -__rho_10_^post43+__rho_10_^0 == 0 /\ -i___02020^post43+i___02020^0 == 0 /\ __rho_2_^0-__rho_2_^post43 == 0 /\ a3838^0-a3838^post43 == 0 /\ i___01313^0-i___01313^post43 == 0 /\ __rho_7_^0-__rho_7_^post43 == 0 /\ -a3434^post43+a3434^0 == 0 /\ a4444^0-a4444^post43 == 0 /\ -__rho_9_^post43+__rho_9_^0 == 0 /\ -CromData^post43+CromData^0 == 0 /\ -i^post43+i^0 == 0 /\ i___02424^0-i___02424^post43 == 0 /\ k4^0-k4^post43 == 0 /\ -IsochResourceData^post43+IsochResourceData^0 == 0 /\ __rho_6_^0-__rho_6_^post43 == 0 /\ -i___04646^post43+i___04646^0 == 0 /\ -__rho_56_^post43+__rho_56_^0 == 0 /\ -__rho_3_^post43+__rho_3_^0 == 0 /\ Irql^0-Irql^post43 == 0 /\ -b3333^post43+b3333^0 == 0), cost: 1
  46: l32 -> l28 : i___01717^0'=i___01717^post46, IsochDetachData^0'=IsochDetachData^post46, ntStatus^0'=ntStatus^post46, __rho_6_^0'=__rho_6_^post46, k5^0'=k5^post46, __rho_2_^0'=__rho_2_^post46, a3838^0'=a3838^post46, a2828^0'=a2828^post46, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post46, b3535^0'=b3535^post46, CromData^0'=CromData^post46, b2626^0'=b2626^post46, __rho_4_^0'=__rho_4_^post46, k2^0'=k2^post46, __rho_12_^0'=__rho_12_^post46, i___02424^0'=i___02424^post46, a11^0'=a11^post46, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post46, __rho_8_^0'=__rho_8_^post46, keR^0'=keR^post46, a4444^0'=a4444^post46, a3232^0'=a3232^post46, ResourceIrp^0'=ResourceIrp^post46, i___01313^0'=i___01313^post46, Irql^0'=Irql^post46, b3333^0'=b3333^post46, __rho_5_^0'=__rho_5_^post46, k4^0'=k4^post46, __rho_1_^0'=__rho_1_^post46, i___04646^0'=i___04646^post46, a2525^0'=a2525^post46, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post46, __rho_9_^0'=__rho_9_^post46, AsyncAddressData^0'=AsyncAddressData^post46, b22^0'=b22^post46, a3737^0'=a3737^post46, k1^0'=k1^post46, __rho_11_^0'=__rho_11_^post46, i___02020^0'=i___02020^post46, IsochResourceData^0'=IsochResourceData^post46, pIrb^0'=pIrb^post46, __rho_7_^0'=__rho_7_^post46, keA^0'=keA^post46, __rho_3_^0'=__rho_3_^post46, a4343^0'=a4343^post46, a3131^0'=a3131^post46, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post46, i^0'=i^post46, Irp^0'=Irp^post46, b2929^0'=b2929^post46, __rho_56_^0'=__rho_56_^post46, k3^0'=k3^post46, __rho_13_^0'=__rho_13_^post46, i___04040^0'=i___04040^post46, a1818^0'=a1818^post46, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post46, __rho_99_^0'=__rho_99_^post46, a77^0'=a77^post46, a3434^0'=a3434^post46, i___099^0'=i___099^post46, __rho_10_^0'=__rho_10_^post46, (i___01313^0-i___01313^post46 == 0 /\ -__rho_3_^post46+__rho_3_^0 == 0 /\ -b3333^post46+b3333^0 == 0 /\ __rho_8_^0-__rho_8_^post46 == 0 /\ -b2929^post46+b2929^0 == 0 /\ -a77^post46+a77^0 == 0 /\ -__rho_9_^post46+__rho_9_^0 == 0 /\ -__rho_5_^post46+__rho_5_^0 == 0 /\ -i^post46+i^0 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post46+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ -a3232^post46+a3232^0 == 0 /\ __rho_2_^0-__rho_2_^post46 == 0 /\ -i___04040^post46+i___04040^0 == 0 /\ -i___099^post46+i___099^0 == 0 /\ i___01717^0-i___01717^post46 == 0 /\ -Irp^post46+Irp^0 == 0 /\ -ret_IoSetDeviceInterfaceState44^post46+ret_IoSetDeviceInterfaceState44^0 == 0 /\ __rho_12_^0-__rho_12_^post46 == 0 /\ CromData^0-CromData^post46 == 0 /\ -a2525^post46+a2525^0 == 0 /\ AsyncAddressData^0-AsyncAddressData^post46 == 0 /\ __rho_11_^0-__rho_11_^post46 == 0 /\ pIrb^0-pIrb^post46 == 0 /\ __rho_6_^0-__rho_6_^post46 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post46 == 0 /\ -a3434^post46+a3434^0 == 0 /\ i___04646^0-i___04646^post46 == 0 /\ __rho_1_^0 <= 0 /\ -__rho_99_^post46+__rho_99_^0 == 0 /\ a3838^0-a3838^post46 == 0 /\ -__rho_13_^post46+__rho_13_^0 == 0 /\ a3737^0-a3737^post46 == 0 /\ -__rho_56_^post46+__rho_56_^0 == 0 /\ k5^0-k5^post46 == 0 /\ -b22^post46+b22^0 == 0 /\ -b3535^post46+b3535^0 == 0 /\ k4^0-k4^post46 == 0 /\ -a3131^post46+a3131^0 == 0 /\ -a1818^post46+a1818^0 == 0 /\ a4343^0-a4343^post46 == 0 /\ k1^0-k1^post46 == 0 /\ -k3^post46+k3^0 == 0 /\ __rho_7_^0-__rho_7_^post46 == 0 /\ i___02424^0-i___02424^post46 == 0 /\ -IsochResourceData^post46+IsochResourceData^0 == 0 /\ __rho_4_^0-__rho_4_^post46 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post46 == 0 /\ -ret_IoAllocateIrp2727^post46+ret_IoAllocateIrp2727^0 == 0 /\ b2626^0-b2626^post46 == 0 /\ -__rho_10_^post46+__rho_10_^0 == 0 /\ -keR^post46+keR^0 == 0 /\ Irql^0-Irql^post46 == 0 /\ -keA^post46+keA^0 == 0 /\ IsochDetachData^0-IsochDetachData^post46 == 0 /\ a2828^0-a2828^post46 == 0 /\ -__rho_1_^post46+__rho_1_^0 == 0 /\ -ResourceIrp^post46+ResourceIrp^0 == 0 /\ k2^0-k2^post46 == 0 /\ -a11^post46+a11^0 == 0 /\ a4444^0-a4444^post46 == 0 /\ ntStatus^0-ntStatus^post46 == 0 /\ i___02020^0-i___02020^post46 == 0), cost: 1
  47: l32 -> l28 : i___01717^0'=i___01717^post47, IsochDetachData^0'=IsochDetachData^post47, ntStatus^0'=ntStatus^post47, __rho_6_^0'=__rho_6_^post47, k5^0'=k5^post47, __rho_2_^0'=__rho_2_^post47, a3838^0'=a3838^post47, a2828^0'=a2828^post47, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post47, b3535^0'=b3535^post47, CromData^0'=CromData^post47, b2626^0'=b2626^post47, __rho_4_^0'=__rho_4_^post47, k2^0'=k2^post47, __rho_12_^0'=__rho_12_^post47, i___02424^0'=i___02424^post47, a11^0'=a11^post47, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post47, __rho_8_^0'=__rho_8_^post47, keR^0'=keR^post47, a4444^0'=a4444^post47, a3232^0'=a3232^post47, ResourceIrp^0'=ResourceIrp^post47, i___01313^0'=i___01313^post47, Irql^0'=Irql^post47, b3333^0'=b3333^post47, __rho_5_^0'=__rho_5_^post47, k4^0'=k4^post47, __rho_1_^0'=__rho_1_^post47, i___04646^0'=i___04646^post47, a2525^0'=a2525^post47, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post47, __rho_9_^0'=__rho_9_^post47, AsyncAddressData^0'=AsyncAddressData^post47, b22^0'=b22^post47, a3737^0'=a3737^post47, k1^0'=k1^post47, __rho_11_^0'=__rho_11_^post47, i___02020^0'=i___02020^post47, IsochResourceData^0'=IsochResourceData^post47, pIrb^0'=pIrb^post47, __rho_7_^0'=__rho_7_^post47, keA^0'=keA^post47, __rho_3_^0'=__rho_3_^post47, a4343^0'=a4343^post47, a3131^0'=a3131^post47, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post47, i^0'=i^post47, Irp^0'=Irp^post47, b2929^0'=b2929^post47, __rho_56_^0'=__rho_56_^post47, k3^0'=k3^post47, __rho_13_^0'=__rho_13_^post47, i___04040^0'=i___04040^post47, a1818^0'=a1818^post47, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post47, __rho_99_^0'=__rho_99_^post47, a77^0'=a77^post47, a3434^0'=a3434^post47, i___099^0'=i___099^post47, __rho_10_^0'=__rho_10_^post47, (-__rho_1_^post47+__rho_1_^0 == 0 /\ -__rho_56_^post47+__rho_56_^0 == 0 /\ keR^0-keR^post47 == 0 /\ 1-__rho_1_^0 <= 0 /\ -b3333^post47+b3333^0 == 0 /\ -b2929^post47+b2929^0 == 0 /\ k5^0-k5^post47 == 0 /\ -IsochResourceData^post47+IsochResourceData^0 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post47+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ -a4444^post47+a4444^0 == 0 /\ CromData^0-CromData^post47 == 0 /\ -ret_t1394Diag_PnpStopDevice33^post47+ntStatus^post47 == 0 /\ -1+a11^post47 == 0 /\ -__rho_3_^post47+__rho_3_^0 == 0 /\ -a4343^post47+a4343^0 == 0 /\ i___02424^0-i___02424^post47 == 0 /\ -k1^post47+k1^0 == 0 /\ k4^0-k4^post47 == 0 /\ -i___01313^post47+i___01313^0 == 0 /\ -a77^post47+a77^0 == 0 /\ k3^0-k3^post47 == 0 /\ -i___04646^post47+i___04646^0 == 0 /\ a3232^0-a3232^post47 == 0 /\ -__rho_10_^post47+__rho_10_^0 == 0 /\ -i___04040^post47+i___04040^0 == 0 /\ IsochDetachData^0-IsochDetachData^post47 == 0 /\ -a2525^post47+a2525^0 == 0 /\ Irql^0-Irql^post47 == 0 /\ -Irp^post47+Irp^0 == 0 /\ ret_IoSetDeviceInterfaceState44^0-ret_IoSetDeviceInterfaceState44^post47 == 0 /\ -a3434^post47+a3434^0 == 0 /\ a2828^0-a2828^post47 == 0 /\ k2^0-k2^post47 == 0 /\ -__rho_4_^post47+__rho_4_^0 == 0 /\ -i^post47+i^0 == 0 /\ -__rho_13_^post47+__rho_13_^0 == 0 /\ i___099^0-i___099^post47 == 0 /\ -a1818^post47+a1818^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^post47 == 0 /\ __rho_8_^0-__rho_8_^post47 == 0 /\ b3535^0-b3535^post47 == 0 /\ __rho_5_^0-__rho_5_^post47 == 0 /\ -ret_ExAllocatePool3030^post47+ret_ExAllocatePool3030^0 == 0 /\ __rho_11_^0-__rho_11_^post47 == 0 /\ i___02020^0-i___02020^post47 == 0 /\ a3838^0-a3838^post47 == 0 /\ __rho_7_^0-__rho_7_^post47 == 0 /\ -ret_IoAllocateIrp2727^post47+ret_IoAllocateIrp2727^0 == 0 /\ __rho_2_^0-__rho_2_^post47 == 0 /\ i___01717^0-i___01717^post47 == 0 /\ b22^post47-Irp^0 == 0 /\ AsyncAddressData^0-AsyncAddressData^post47 == 0 /\ __rho_12_^0-__rho_12_^post47 == 0 /\ -__rho_99_^post47+__rho_99_^0 == 0 /\ __rho_6_^0-__rho_6_^post47 == 0 /\ -keA^post47+keA^0 == 0 /\ -a3737^post47+a3737^0 == 0 /\ -pIrb^post47+pIrb^0 == 0 /\ ResourceIrp^0-ResourceIrp^post47 == 0 /\ b2626^0-b2626^post47 == 0 /\ -__rho_9_^post47+__rho_9_^0 == 0 /\ a3131^0-a3131^post47 == 0), cost: 1
  50: l33 -> l32 : i___01717^0'=i___01717^post50, IsochDetachData^0'=IsochDetachData^post50, ntStatus^0'=ntStatus^post50, __rho_6_^0'=__rho_6_^post50, k5^0'=k5^post50, __rho_2_^0'=__rho_2_^post50, a3838^0'=a3838^post50, a2828^0'=a2828^post50, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post50, b3535^0'=b3535^post50, CromData^0'=CromData^post50, b2626^0'=b2626^post50, __rho_4_^0'=__rho_4_^post50, k2^0'=k2^post50, __rho_12_^0'=__rho_12_^post50, i___02424^0'=i___02424^post50, a11^0'=a11^post50, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post50, __rho_8_^0'=__rho_8_^post50, keR^0'=keR^post50, a4444^0'=a4444^post50, a3232^0'=a3232^post50, ResourceIrp^0'=ResourceIrp^post50, i___01313^0'=i___01313^post50, Irql^0'=Irql^post50, b3333^0'=b3333^post50, __rho_5_^0'=__rho_5_^post50, k4^0'=k4^post50, __rho_1_^0'=__rho_1_^post50, i___04646^0'=i___04646^post50, a2525^0'=a2525^post50, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post50, __rho_9_^0'=__rho_9_^post50, AsyncAddressData^0'=AsyncAddressData^post50, b22^0'=b22^post50, a3737^0'=a3737^post50, k1^0'=k1^post50, __rho_11_^0'=__rho_11_^post50, i___02020^0'=i___02020^post50, IsochResourceData^0'=IsochResourceData^post50, pIrb^0'=pIrb^post50, __rho_7_^0'=__rho_7_^post50, keA^0'=keA^post50, __rho_3_^0'=__rho_3_^post50, a4343^0'=a4343^post50, a3131^0'=a3131^post50, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post50, i^0'=i^post50, Irp^0'=Irp^post50, b2929^0'=b2929^post50, __rho_56_^0'=__rho_56_^post50, k3^0'=k3^post50, __rho_13_^0'=__rho_13_^post50, i___04040^0'=i___04040^post50, a1818^0'=a1818^post50, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post50, __rho_99_^0'=__rho_99_^post50, a77^0'=a77^post50, a3434^0'=a3434^post50, i___099^0'=i___099^post50, __rho_10_^0'=__rho_10_^post50, (0 == 0 /\ k3^0-k3^post50 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post50+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ a11^0-a11^post50 == 0 /\ -b3333^post50+b3333^0 == 0 /\ -ret_IoAllocateIrp2727^post50+ret_IoAllocateIrp2727^0 == 0 /\ -i___01313^post50+i___01313^0 == 0 /\ -k1^post50+k1^0 == 0 /\ ret_IoSetDeviceInterfaceState44^0-ret_IoSetDeviceInterfaceState44^post50 == 0 /\ -a77^post50+a77^0 == 0 /\ -ret_ExAllocatePool3030^post50+ret_ExAllocatePool3030^0 == 0 /\ b2626^0-b2626^post50 == 0 /\ i___02424^0-i___02424^post50 == 0 /\ -__rho_3_^post50+__rho_3_^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post50 == 0 /\ Irql^0-Irql^post50 == 0 /\ -__rho_99_^post50+__rho_99_^0 == 0 /\ a3232^0-a3232^post50 == 0 /\ -i___04040^post50+i___04040^0 == 0 /\ Irp^0-Irp^post50 == 0 /\ -a4444^post50+a4444^0 == 0 /\ -__rho_4_^post50+__rho_4_^0 == 0 /\ k2^0-k2^post50 == 0 /\ ntStatus^0-ntStatus^post50 == 0 /\ -b2929^post50+b2929^0 == 0 /\ b3535^0-b3535^post50 == 0 /\ a2828^0-a2828^post50 == 0 /\ i___02020^0-i___02020^post50 == 0 /\ k5^0-k5^post50 == 0 /\ k4^0-k4^post50 == 0 /\ -a3737^post50+a3737^0 == 0 /\ -pIrb^post50+pIrb^0 == 0 /\ -a3434^post50+a3434^0 == 0 /\ IsochDetachData^0-IsochDetachData^post50 == 0 /\ -__rho_9_^post50+__rho_9_^0 == 0 /\ -__rho_7_^post50+__rho_7_^0 == 0 /\ -a1818^post50+a1818^0 == 0 /\ __rho_2_^0-__rho_2_^post50 == 0 /\ -__rho_13_^post50+__rho_13_^0 == 0 /\ -i^post50+i^0 == 0 /\ __rho_8_^0-__rho_8_^post50 == 0 /\ -__rho_56_^post50+__rho_56_^0 == 0 /\ -a2525^post50+a2525^0 == 0 /\ -b22^post50+b22^0 == 0 /\ __rho_12_^0-__rho_12_^post50 == 0 /\ -i___04646^post50+i___04646^0 == 0 /\ IsochResourceData^0-IsochResourceData^post50 == 0 /\ -__rho_11_^post50+__rho_11_^0 == 0 /\ i___01717^0-i___01717^post50 == 0 /\ -i___099^post50+i___099^0 == 0 /\ -__rho_6_^post50+__rho_6_^0 == 0 /\ keA^post50 == 0 /\ -a3838^post50+a3838^0 == 0 /\ AsyncAddressData^0-AsyncAddressData^post50 == 0 /\ -a4343^post50+a4343^0 == 0 /\ __rho_5_^0-__rho_5_^post50 == 0 /\ -__rho_10_^post50+__rho_10_^0 == 0 /\ keR^post50 == 0 /\ CromData^0-CromData^post50 == 0 /\ ResourceIrp^0-ResourceIrp^post50 == 0 /\ a3131^0-a3131^post50 == 0), cost: 1
  51: l34 -> l33 : i___01717^0'=i___01717^post51, IsochDetachData^0'=IsochDetachData^post51, ntStatus^0'=ntStatus^post51, __rho_6_^0'=__rho_6_^post51, k5^0'=k5^post51, __rho_2_^0'=__rho_2_^post51, a3838^0'=a3838^post51, a2828^0'=a2828^post51, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post51, b3535^0'=b3535^post51, CromData^0'=CromData^post51, b2626^0'=b2626^post51, __rho_4_^0'=__rho_4_^post51, k2^0'=k2^post51, __rho_12_^0'=__rho_12_^post51, i___02424^0'=i___02424^post51, a11^0'=a11^post51, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post51, __rho_8_^0'=__rho_8_^post51, keR^0'=keR^post51, a4444^0'=a4444^post51, a3232^0'=a3232^post51, ResourceIrp^0'=ResourceIrp^post51, i___01313^0'=i___01313^post51, Irql^0'=Irql^post51, b3333^0'=b3333^post51, __rho_5_^0'=__rho_5_^post51, k4^0'=k4^post51, __rho_1_^0'=__rho_1_^post51, i___04646^0'=i___04646^post51, a2525^0'=a2525^post51, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post51, __rho_9_^0'=__rho_9_^post51, AsyncAddressData^0'=AsyncAddressData^post51, b22^0'=b22^post51, a3737^0'=a3737^post51, k1^0'=k1^post51, __rho_11_^0'=__rho_11_^post51, i___02020^0'=i___02020^post51, IsochResourceData^0'=IsochResourceData^post51, pIrb^0'=pIrb^post51, __rho_7_^0'=__rho_7_^post51, keA^0'=keA^post51, __rho_3_^0'=__rho_3_^post51, a4343^0'=a4343^post51, a3131^0'=a3131^post51, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post51, i^0'=i^post51, Irp^0'=Irp^post51, b2929^0'=b2929^post51, __rho_56_^0'=__rho_56_^post51, k3^0'=k3^post51, __rho_13_^0'=__rho_13_^post51, i___04040^0'=i___04040^post51, a1818^0'=a1818^post51, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post51, __rho_99_^0'=__rho_99_^post51, a77^0'=a77^post51, a3434^0'=a3434^post51, i___099^0'=i___099^post51, __rho_10_^0'=__rho_10_^post51, (-i___01313^post51+i___01313^0 == 0 /\ -a3434^post51+a3434^0 == 0 /\ __rho_5_^0-__rho_5_^post51 == 0 /\ __rho_2_^0-__rho_2_^post51 == 0 /\ __rho_13_^0-__rho_13_^post51 == 0 /\ __rho_8_^0-__rho_8_^post51 == 0 /\ k2^0-k2^post51 == 0 /\ ret_t1394_SubmitIrpSynch3636^0-ret_t1394_SubmitIrpSynch3636^post51 == 0 /\ b22^0-b22^post51 == 0 /\ -a77^post51+a77^0 == 0 /\ i___01717^0-i___01717^post51 == 0 /\ -k1^post51+k1^0 == 0 /\ __rho_56_^0-__rho_56_^post51 == 0 /\ a2525^0-a2525^post51 == 0 /\ __rho_6_^0-__rho_6_^post51 == 0 /\ -__rho_10_^post51+__rho_10_^0 == 0 /\ -i___04040^post51+i___04040^0 == 0 /\ ResourceIrp^0-ResourceIrp^post51 == 0 /\ -AsyncAddressData^post51+AsyncAddressData^0 == 0 /\ -i___04646^post51+i___04646^0 == 0 /\ -__rho_7_^post51+__rho_7_^0 == 0 /\ -__rho_11_^post51+__rho_11_^0 == 0 /\ -b2929^post51+b2929^0 == 0 /\ a3838^0-a3838^post51 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post51 == 0 /\ -a1818^post51+a1818^0 == 0 /\ b3333^0-b3333^post51 == 0 /\ keR^0-keR^post51 == 0 /\ __rho_3_^0-__rho_3_^post51 == 0 /\ IsochResourceData^0-IsochResourceData^post51 == 0 /\ k4^0-k4^post51 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post51 == 0 /\ -Irp^post51+Irp^0 == 0 /\ b2626^0-b2626^post51 == 0 /\ i___02424^0-i___02424^post51 == 0 /\ CromData^0-CromData^post51 == 0 /\ -a3131^post51+a3131^0 == 0 /\ -i___02020^post51+i___02020^0 == 0 /\ __rho_4_^0-__rho_4_^post51 == 0 /\ -k3^post51+k3^0 == 0 /\ -a4343^post51+a4343^0 == 0 /\ -__rho_9_^post51+__rho_9_^0 == 0 /\ -__rho_99_^post51+__rho_99_^0 == 0 /\ -a4444^post51+a4444^0 == 0 /\ ret_IoAllocateIrp2727^0-ret_IoAllocateIrp2727^post51 == 0 /\ a11^0-a11^post51 == 0 /\ -a2828^post51+a2828^0 == 0 /\ -i___099^post51+i___099^0 == 0 /\ -pIrb^post51+pIrb^0 == 0 /\ k5^0-k5^post51 == 0 /\ b3535^0-b3535^post51 == 0 /\ -__rho_12_^post51+__rho_12_^0 == 0 /\ -a3737^post51+a3737^0 == 0 /\ ntStatus^0-ntStatus^post51 == 0 /\ __rho_1_^0-__rho_1_^post51 == 0 /\ -keA^post51+keA^0 == 0 /\ a3232^0-a3232^post51 == 0 /\ ret_IoSetDeviceInterfaceState44^0-ret_IoSetDeviceInterfaceState44^post51 == 0 /\ Irql^0-Irql^post51 == 0 /\ IsochDetachData^0-IsochDetachData^post51 == 0 /\ -i^post51+i^0 == 0), cost: 1


Removed unreachable rules and leafs
Start location: l34
   0: l0 -> l1 : i___01717^0'=i___01717^post0, IsochDetachData^0'=IsochDetachData^post0, ntStatus^0'=ntStatus^post0, __rho_6_^0'=__rho_6_^post0, k5^0'=k5^post0, __rho_2_^0'=__rho_2_^post0, a3838^0'=a3838^post0, a2828^0'=a2828^post0, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post0, b3535^0'=b3535^post0, CromData^0'=CromData^post0, b2626^0'=b2626^post0, __rho_4_^0'=__rho_4_^post0, k2^0'=k2^post0, __rho_12_^0'=__rho_12_^post0, i___02424^0'=i___02424^post0, a11^0'=a11^post0, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post0, __rho_8_^0'=__rho_8_^post0, keR^0'=keR^post0, a4444^0'=a4444^post0, a3232^0'=a3232^post0, ResourceIrp^0'=ResourceIrp^post0, i___01313^0'=i___01313^post0, Irql^0'=Irql^post0, b3333^0'=b3333^post0, __rho_5_^0'=__rho_5_^post0, k4^0'=k4^post0, __rho_1_^0'=__rho_1_^post0, i___04646^0'=i___04646^post0, a2525^0'=a2525^post0, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post0, __rho_9_^0'=__rho_9_^post0, AsyncAddressData^0'=AsyncAddressData^post0, b22^0'=b22^post0, a3737^0'=a3737^post0, k1^0'=k1^post0, __rho_11_^0'=__rho_11_^post0, i___02020^0'=i___02020^post0, IsochResourceData^0'=IsochResourceData^post0, pIrb^0'=pIrb^post0, __rho_7_^0'=__rho_7_^post0, keA^0'=keA^post0, __rho_3_^0'=__rho_3_^post0, a4343^0'=a4343^post0, a3131^0'=a3131^post0, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post0, i^0'=i^post0, Irp^0'=Irp^post0, b2929^0'=b2929^post0, __rho_56_^0'=__rho_56_^post0, k3^0'=k3^post0, __rho_13_^0'=__rho_13_^post0, i___04040^0'=i___04040^post0, a1818^0'=a1818^post0, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post0, __rho_99_^0'=__rho_99_^post0, a77^0'=a77^post0, a3434^0'=a3434^post0, i___099^0'=i___099^post0, __rho_10_^0'=__rho_10_^post0, (__rho_4_^0-__rho_4_^post0 == 0 /\ IsochDetachData^0-IsochDetachData^post0 == 0 /\ -a1818^post0+a1818^0 == 0 /\ keR^0-keR^post0 == 0 /\ -b3333^post0+b3333^0 == 0 /\ -__rho_5_^post0+__rho_5_^0 == 0 /\ __rho_12_^0-__rho_12_^post0 == 0 /\ ntStatus^0-ntStatus^post0 == 0 /\ -__rho_56_^post0+__rho_56_^0 == 0 /\ -i^post0+i^0 == 0 /\ a3838^0-a3838^post0 == 0 /\ -a3131^post0+a3131^0 == 0 /\ __rho_2_^0-__rho_2_^post0 == 0 /\ k1^0-k1^post0 == 0 /\ -a3232^post0+a3232^0 == 0 /\ -ret_IoSetDeviceInterfaceState44^post0+ret_IoSetDeviceInterfaceState44^0 == 0 /\ __rho_11_^0-__rho_11_^post0 == 0 /\ __rho_8_^0-__rho_8_^post0 == 0 /\ pIrb^0-pIrb^post0 == 0 /\ -ResourceIrp^post0+ResourceIrp^0 == 0 /\ i___01313^0-i___01313^post0 == 0 /\ -i___04040^post0+i___04040^0 == 0 /\ __rho_6_^0-__rho_6_^post0 == 0 /\ -__rho_10_^post0+__rho_10_^0 == 0 /\ i___04646^0-i___04646^post0 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post0 == 0 /\ -__rho_9_^post0+__rho_9_^0 == 0 /\ -b2929^post0+b2929^0 == 0 /\ -keA^post0+keA^0 == 0 /\ i___01717^0-i___01717^post0 == 0 /\ -b22^post0+b22^0 == 0 /\ a3737^0-a3737^post0 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post0+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ AsyncAddressData^0 <= 0 /\ -ret_IoAllocateIrp2727^post0+ret_IoAllocateIrp2727^0 == 0 /\ -__rho_13_^post0+__rho_13_^0 == 0 /\ k4^0-k4^post0 == 0 /\ k5^0-k5^post0 == 0 /\ k2^0-k2^post0 == 0 /\ -AsyncAddressData^post0+AsyncAddressData^0 == 0 /\ -Irp^post0+Irp^0 == 0 /\ CromData^0-CromData^post0 == 0 /\ -i___02424^post0+i___02424^0 == 0 /\ -a77^post0+a77^0 == 0 /\ -IsochResourceData^post0+IsochResourceData^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post0 == 0 /\ -__rho_3_^post0+__rho_3_^0 == 0 /\ a2525^0-a2525^post0 == 0 /\ -a4343^post0+a4343^0 == 0 /\ __rho_99_^0-__rho_99_^post0 == 0 /\ -i___099^post0+i___099^0 == 0 /\ -b2626^post0+b2626^0 == 0 /\ -k3^post0+k3^0 == 0 /\ Irql^0-Irql^post0 == 0 /\ a2828^0-a2828^post0 == 0 /\ i___02020^0-i___02020^post0 == 0 /\ a4444^0-a4444^post0 == 0 /\ __rho_7_^0-__rho_7_^post0 == 0 /\ -b3535^post0+b3535^0 == 0 /\ -a11^post0+a11^0 == 0 /\ -a3434^post0+a3434^0 == 0 /\ -__rho_1_^post0+__rho_1_^0 == 0), cost: 1
   1: l0 -> l1 : i___01717^0'=i___01717^post1, IsochDetachData^0'=IsochDetachData^post1, ntStatus^0'=ntStatus^post1, __rho_6_^0'=__rho_6_^post1, k5^0'=k5^post1, __rho_2_^0'=__rho_2_^post1, a3838^0'=a3838^post1, a2828^0'=a2828^post1, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post1, b3535^0'=b3535^post1, CromData^0'=CromData^post1, b2626^0'=b2626^post1, __rho_4_^0'=__rho_4_^post1, k2^0'=k2^post1, __rho_12_^0'=__rho_12_^post1, i___02424^0'=i___02424^post1, a11^0'=a11^post1, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post1, __rho_8_^0'=__rho_8_^post1, keR^0'=keR^post1, a4444^0'=a4444^post1, a3232^0'=a3232^post1, ResourceIrp^0'=ResourceIrp^post1, i___01313^0'=i___01313^post1, Irql^0'=Irql^post1, b3333^0'=b3333^post1, __rho_5_^0'=__rho_5_^post1, k4^0'=k4^post1, __rho_1_^0'=__rho_1_^post1, i___04646^0'=i___04646^post1, a2525^0'=a2525^post1, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post1, __rho_9_^0'=__rho_9_^post1, AsyncAddressData^0'=AsyncAddressData^post1, b22^0'=b22^post1, a3737^0'=a3737^post1, k1^0'=k1^post1, __rho_11_^0'=__rho_11_^post1, i___02020^0'=i___02020^post1, IsochResourceData^0'=IsochResourceData^post1, pIrb^0'=pIrb^post1, __rho_7_^0'=__rho_7_^post1, keA^0'=keA^post1, __rho_3_^0'=__rho_3_^post1, a4343^0'=a4343^post1, a3131^0'=a3131^post1, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post1, i^0'=i^post1, Irp^0'=Irp^post1, b2929^0'=b2929^post1, __rho_56_^0'=__rho_56_^post1, k3^0'=k3^post1, __rho_13_^0'=__rho_13_^post1, i___04040^0'=i___04040^post1, a1818^0'=a1818^post1, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post1, __rho_99_^0'=__rho_99_^post1, a77^0'=a77^post1, a3434^0'=a3434^post1, i___099^0'=i___099^post1, __rho_10_^0'=__rho_10_^post1, (-IsochResourceData^post1+IsochResourceData^0 == 0 /\ -ret_IoAllocateIrp2727^post1+ret_IoAllocateIrp2727^0 == 0 /\ -keR^post1+keR^0 == 0 /\ __rho_2_^0-__rho_2_^post1 == 0 /\ k2^0-k2^post1 == 0 /\ -a3434^post1+a3434^0 == 0 /\ -a2525^post1+a2525^0 == 0 /\ -__rho_5_^post1+__rho_5_^0 == 0 /\ __rho_8_^0-__rho_8_^post1 == 0 /\ -__rho_99_^post1+__rho_99_^0 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post1 == 0 /\ i___04040^0-i___04040^post1 == 0 /\ -b22^post1+b22^0 == 0 /\ a2828^0-a2828^post1 == 0 /\ i___01717^0-i___01717^post1 == 0 /\ -__rho_13_^post1+__rho_13_^0 == 0 /\ -__rho_9_^post1+__rho_9_^0 == 0 /\ pIrb^0-pIrb^post1 == 0 /\ __rho_12_^0-__rho_12_^post1 == 0 /\ -a11^post1+a11^0 == 0 /\ __rho_6_^0-__rho_6_^post1 == 0 /\ -i___099^post1+i___099^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post1 == 0 /\ -k3^post1+k3^0 == 0 /\ a3838^0-a3838^post1 == 0 /\ AsyncAddressData^0-AsyncAddressData^post1 == 0 /\ -a1818^post1+a1818^0 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post1+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ CromData^0-CromData^post1 == 0 /\ -b2929^post1+b2929^0 == 0 /\ __rho_11_^0-__rho_11_^post1 == 0 /\ __rho_4_^0-__rho_4_^post1 == 0 /\ a3131^0-a3131^post1 == 0 /\ -i^post1+i^0 == 0 /\ -__rho_1_^post1+__rho_1_^0 == 0 /\ ntStatus^0-ntStatus^post1 == 0 /\ -ret_IoSetDeviceInterfaceState44^post1+ret_IoSetDeviceInterfaceState44^0 == 0 /\ i___02020^0-i___02020^post1 == 0 /\ b2626^0-b2626^post1 == 0 /\ -Irp^post1+Irp^0 == 0 /\ k1^0-k1^post1 == 0 /\ i___02424^0-i___02424^post1 == 0 /\ __rho_7_^0-__rho_7_^post1 == 0 /\ -ResourceIrp^post1+ResourceIrp^0 == 0 /\ a4444^0-a4444^post1 == 0 /\ -__rho_3_^post1+__rho_3_^0 == 0 /\ -__rho_56_^post1+__rho_56_^0 == 0 /\ -a77^post1+a77^0 == 0 /\ -keA^post1+keA^0 == 0 /\ 1-AsyncAddressData^0 <= 0 /\ k4^0-k4^post1 == 0 /\ b3535^0-b3535^post1 == 0 /\ i___01313^0-i___01313^post1 == 0 /\ a4343^0-a4343^post1 == 0 /\ -i___04646^post1+i___04646^0 == 0 /\ -a3232^post1+a3232^0 == 0 /\ Irql^0-Irql^post1 == 0 /\ -b3333^post1+b3333^0 == 0 /\ IsochDetachData^0-IsochDetachData^post1 == 0 /\ -__rho_10_^post1+__rho_10_^0 == 0 /\ k5^0-k5^post1 == 0 /\ -a3737^post1+a3737^0 == 0), cost: 1
  13: l1 -> l9 : i___01717^0'=i___01717^post13, IsochDetachData^0'=IsochDetachData^post13, ntStatus^0'=ntStatus^post13, __rho_6_^0'=__rho_6_^post13, k5^0'=k5^post13, __rho_2_^0'=__rho_2_^post13, a3838^0'=a3838^post13, a2828^0'=a2828^post13, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post13, b3535^0'=b3535^post13, CromData^0'=CromData^post13, b2626^0'=b2626^post13, __rho_4_^0'=__rho_4_^post13, k2^0'=k2^post13, __rho_12_^0'=__rho_12_^post13, i___02424^0'=i___02424^post13, a11^0'=a11^post13, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post13, __rho_8_^0'=__rho_8_^post13, keR^0'=keR^post13, a4444^0'=a4444^post13, a3232^0'=a3232^post13, ResourceIrp^0'=ResourceIrp^post13, i___01313^0'=i___01313^post13, Irql^0'=Irql^post13, b3333^0'=b3333^post13, __rho_5_^0'=__rho_5_^post13, k4^0'=k4^post13, __rho_1_^0'=__rho_1_^post13, i___04646^0'=i___04646^post13, a2525^0'=a2525^post13, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post13, __rho_9_^0'=__rho_9_^post13, AsyncAddressData^0'=AsyncAddressData^post13, b22^0'=b22^post13, a3737^0'=a3737^post13, k1^0'=k1^post13, __rho_11_^0'=__rho_11_^post13, i___02020^0'=i___02020^post13, IsochResourceData^0'=IsochResourceData^post13, pIrb^0'=pIrb^post13, __rho_7_^0'=__rho_7_^post13, keA^0'=keA^post13, __rho_3_^0'=__rho_3_^post13, a4343^0'=a4343^post13, a3131^0'=a3131^post13, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post13, i^0'=i^post13, Irp^0'=Irp^post13, b2929^0'=b2929^post13, __rho_56_^0'=__rho_56_^post13, k3^0'=k3^post13, __rho_13_^0'=__rho_13_^post13, i___04040^0'=i___04040^post13, a1818^0'=a1818^post13, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post13, __rho_99_^0'=__rho_99_^post13, a77^0'=a77^post13, a3434^0'=a3434^post13, i___099^0'=i___099^post13, __rho_10_^0'=__rho_10_^post13, (-__rho_13_^post13+__rho_13_^0 == 0 /\ -b3333^post13+b3333^0 == 0 /\ -a1818^post13+a1818^0 == 0 /\ -__rho_3_^post13+__rho_3_^0 == 0 /\ -a11^post13+a11^0 == 0 /\ -pIrb^post13+pIrb^0 == 0 /\ __rho_12_^0-__rho_12_^post13 == 0 /\ a2828^0-a2828^post13 == 0 /\ i___01717^0-i___01717^post13 == 0 /\ -ret_IoAllocateIrp2727^post13+ret_IoAllocateIrp2727^0 == 0 /\ i___04040^0-i___04040^post13 == 0 /\ -a3131^post13+a3131^0 == 0 /\ -IsochResourceData^post13+IsochResourceData^0 == 0 /\ k1^0-k1^post13 == 0 /\ -k3^post13+k3^0 == 0 /\ i___01313^0-i___01313^post13 == 0 /\ -ResourceIrp^post13+ResourceIrp^0 == 0 /\ __rho_8_^0-__rho_8_^post13 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post13 == 0 /\ -__rho_1_^post13+__rho_1_^0 == 0 /\ CromData^0-CromData^post13 == 0 /\ __rho_2_^0-__rho_2_^post13 == 0 /\ -__rho_99_^post13+__rho_99_^0 == 0 /\ -keR^post13+keR^0 == 0 /\ a3838^0-a3838^post13 == 0 /\ __rho_4_^0-__rho_4_^post13 == 0 /\ -a77^post13+a77^0 == 0 /\ a2525^0-a2525^post13 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post13+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ -__rho_56_^post13+__rho_56_^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post13 == 0 /\ a3434^0-a3434^post13 == 0 /\ IsochDetachData^0-IsochDetachData^post13 == 0 /\ __rho_11_^0-__rho_11_^post13 == 0 /\ -b2929^post13+b2929^0 == 0 /\ -i___02424^post13+i___02424^0 == 0 /\ -__rho_9_^post13+__rho_9_^0 == 0 /\ -AsyncAddressData^post13+AsyncAddressData^0 == 0 /\ a4343^0-a4343^post13 == 0 /\ -i___04646^post13+i___04646^0 == 0 /\ k2^0-k2^post13 == 0 /\ __rho_6_^0-__rho_6_^post13 == 0 /\ __rho_5_^0-__rho_5_^post13 == 0 /\ __rho_7_^0-__rho_7_^post13 == 0 /\ -i___099^post13+i___099^0 == 0 /\ -a3232^post13+a3232^0 == 0 /\ b2626^0-b2626^post13 == 0 /\ -i^post13+i^0 == 0 /\ i___02020^0-i___02020^post13 == 0 /\ -ret_IoSetDeviceInterfaceState44^post13+ret_IoSetDeviceInterfaceState44^0 == 0 /\ -keA^post13+keA^0 == 0 /\ Irql^0-Irql^post13 == 0 /\ -__rho_10_^post13+__rho_10_^0 == 0 /\ b3535^0-b3535^post13 == 0 /\ -Irp^post13+Irp^0 == 0 /\ -a3737^post13+a3737^0 == 0 /\ k4^0-k4^post13 == 0 /\ k5^0-k5^post13 == 0 /\ -b22^post13+b22^0 == 0 /\ a4444^0-a4444^post13 == 0 /\ ntStatus^0-ntStatus^post13 == 0), cost: 1
   2: l2 -> l0 : i___01717^0'=i___01717^post2, IsochDetachData^0'=IsochDetachData^post2, ntStatus^0'=ntStatus^post2, __rho_6_^0'=__rho_6_^post2, k5^0'=k5^post2, __rho_2_^0'=__rho_2_^post2, a3838^0'=a3838^post2, a2828^0'=a2828^post2, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post2, b3535^0'=b3535^post2, CromData^0'=CromData^post2, b2626^0'=b2626^post2, __rho_4_^0'=__rho_4_^post2, k2^0'=k2^post2, __rho_12_^0'=__rho_12_^post2, i___02424^0'=i___02424^post2, a11^0'=a11^post2, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post2, __rho_8_^0'=__rho_8_^post2, keR^0'=keR^post2, a4444^0'=a4444^post2, a3232^0'=a3232^post2, ResourceIrp^0'=ResourceIrp^post2, i___01313^0'=i___01313^post2, Irql^0'=Irql^post2, b3333^0'=b3333^post2, __rho_5_^0'=__rho_5_^post2, k4^0'=k4^post2, __rho_1_^0'=__rho_1_^post2, i___04646^0'=i___04646^post2, a2525^0'=a2525^post2, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post2, __rho_9_^0'=__rho_9_^post2, AsyncAddressData^0'=AsyncAddressData^post2, b22^0'=b22^post2, a3737^0'=a3737^post2, k1^0'=k1^post2, __rho_11_^0'=__rho_11_^post2, i___02020^0'=i___02020^post2, IsochResourceData^0'=IsochResourceData^post2, pIrb^0'=pIrb^post2, __rho_7_^0'=__rho_7_^post2, keA^0'=keA^post2, __rho_3_^0'=__rho_3_^post2, a4343^0'=a4343^post2, a3131^0'=a3131^post2, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post2, i^0'=i^post2, Irp^0'=Irp^post2, b2929^0'=b2929^post2, __rho_56_^0'=__rho_56_^post2, k3^0'=k3^post2, __rho_13_^0'=__rho_13_^post2, i___04040^0'=i___04040^post2, a1818^0'=a1818^post2, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post2, __rho_99_^0'=__rho_99_^post2, a77^0'=a77^post2, a3434^0'=a3434^post2, i___099^0'=i___099^post2, __rho_10_^0'=__rho_10_^post2, (-__rho_4_^post2+__rho_4_^0 == 0 /\ -a3737^post2+a3737^0 == 0 /\ -ret_ExAllocatePool3030^post2+ret_ExAllocatePool3030^0 == 0 /\ -a3434^post2+a3434^0 == 0 /\ ntStatus^0-ntStatus^post2 == 0 /\ k3^0-k3^post2 == 0 /\ a4444^0-a4444^post2 == 0 /\ a11^0-a11^post2 == 0 /\ b2626^0-b2626^post2 == 0 /\ -__rho_99_^post2+__rho_99_^0 == 0 /\ -__rho_9_^post2+__rho_9_^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post2 == 0 /\ -__rho_1_^post2+__rho_1_^0 == 0 /\ k4^0-k4^post2 == 0 /\ -b2929^post2+b2929^0 == 0 /\ -k1^post2+k1^0 == 0 /\ Irp^0-Irp^post2 == 0 /\ i___02424^0-i___02424^post2 == 0 /\ ret_IoSetDeviceInterfaceState44^0-ret_IoSetDeviceInterfaceState44^post2 == 0 /\ -b3333^post2+b3333^0 == 0 /\ -b22^post2+b22^0 == 0 /\ -a3131^post2+a3131^0 == 0 /\ -__rho_7_^post2+__rho_7_^0 == 0 /\ -a1818^post2+a1818^0 == 0 /\ IsochDetachData^0-IsochDetachData^post2 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post2+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ keR^0-keR^post2 == 0 /\ -i___04646^post2+i___04646^0 == 0 /\ -i___04040^post2+i___04040^0 == 0 /\ b3535^0-b3535^post2 == 0 /\ a3232^0-a3232^post2 == 0 /\ a2828^0-a2828^post2 == 0 /\ k5^0-k5^post2 == 0 /\ -__rho_10_^post2+__rho_10_^0 == 0 /\ __rho_9_^0 <= 0 /\ k2^0-k2^post2 == 0 /\ i___02020^0-i___02020^post2 == 0 /\ __rho_2_^0-__rho_2_^post2 == 0 /\ -a2525^post2+a2525^0 == 0 /\ -pIrb^post2+pIrb^0 == 0 /\ -__rho_13_^post2+__rho_13_^0 == 0 /\ Irql^0-Irql^post2 == 0 /\ __rho_8_^0-__rho_8_^post2 == 0 /\ i___01717^0-i___01717^post2 == 0 /\ -__rho_56_^post2+__rho_56_^0 == 0 /\ -a77^post2+a77^0 == 0 /\ __rho_11_^0-__rho_11_^post2 == 0 /\ keA^0-keA^post2 == 0 /\ -__rho_3_^post2+__rho_3_^0 == 0 /\ ResourceIrp^0-ResourceIrp^post2 == 0 /\ IsochResourceData^0-IsochResourceData^post2 == 0 /\ AsyncAddressData^0-AsyncAddressData^post2 == 0 /\ -__rho_6_^post2+__rho_6_^0 == 0 /\ -i___099^post2+i___099^0 == 0 /\ __rho_12_^0-__rho_12_^post2 == 0 /\ CromData^0-CromData^post2 == 0 /\ -i^post2+i^0 == 0 /\ -a3838^post2+a3838^0 == 0 /\ __rho_5_^0-__rho_5_^post2 == 0 /\ -a4343^post2+a4343^0 == 0 /\ -ret_IoAllocateIrp2727^post2+ret_IoAllocateIrp2727^0 == 0 /\ -i___01313^post2+i___01313^0 == 0), cost: 1
   3: l2 -> l0 : i___01717^0'=i___01717^post3, IsochDetachData^0'=IsochDetachData^post3, ntStatus^0'=ntStatus^post3, __rho_6_^0'=__rho_6_^post3, k5^0'=k5^post3, __rho_2_^0'=__rho_2_^post3, a3838^0'=a3838^post3, a2828^0'=a2828^post3, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post3, b3535^0'=b3535^post3, CromData^0'=CromData^post3, b2626^0'=b2626^post3, __rho_4_^0'=__rho_4_^post3, k2^0'=k2^post3, __rho_12_^0'=__rho_12_^post3, i___02424^0'=i___02424^post3, a11^0'=a11^post3, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post3, __rho_8_^0'=__rho_8_^post3, keR^0'=keR^post3, a4444^0'=a4444^post3, a3232^0'=a3232^post3, ResourceIrp^0'=ResourceIrp^post3, i___01313^0'=i___01313^post3, Irql^0'=Irql^post3, b3333^0'=b3333^post3, __rho_5_^0'=__rho_5_^post3, k4^0'=k4^post3, __rho_1_^0'=__rho_1_^post3, i___04646^0'=i___04646^post3, a2525^0'=a2525^post3, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post3, __rho_9_^0'=__rho_9_^post3, AsyncAddressData^0'=AsyncAddressData^post3, b22^0'=b22^post3, a3737^0'=a3737^post3, k1^0'=k1^post3, __rho_11_^0'=__rho_11_^post3, i___02020^0'=i___02020^post3, IsochResourceData^0'=IsochResourceData^post3, pIrb^0'=pIrb^post3, __rho_7_^0'=__rho_7_^post3, keA^0'=keA^post3, __rho_3_^0'=__rho_3_^post3, a4343^0'=a4343^post3, a3131^0'=a3131^post3, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post3, i^0'=i^post3, Irp^0'=Irp^post3, b2929^0'=b2929^post3, __rho_56_^0'=__rho_56_^post3, k3^0'=k3^post3, __rho_13_^0'=__rho_13_^post3, i___04040^0'=i___04040^post3, a1818^0'=a1818^post3, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post3, __rho_99_^0'=__rho_99_^post3, a77^0'=a77^post3, a3434^0'=a3434^post3, i___099^0'=i___099^post3, __rho_10_^0'=__rho_10_^post3, (Irp^0-Irp^post3 == 0 /\ -i___04646^post3+i___04646^0 == 0 /\ -a3737^post3+a3737^0 == 0 /\ -i___04040^post3+i___04040^0 == 0 /\ -i___099^post3+i___099^0 == 0 /\ -a4343^post3+a4343^0 == 0 /\ -__rho_12_^post3+__rho_12_^0 == 0 /\ __rho_1_^0-__rho_1_^post3 == 0 /\ b22^0-b22^post3 == 0 /\ IsochDetachData^0-IsochDetachData^post3 == 0 /\ __rho_2_^0-__rho_2_^post3 == 0 /\ -__rho_99_^post3+__rho_99_^0 == 0 /\ b3535^0-b3535^post3 == 0 /\ -keA^post3+keA^0 == 0 /\ ret_t1394_SubmitIrpSynch3636^0-ret_t1394_SubmitIrpSynch3636^post3 == 0 /\ -__rho_13_^post3+__rho_13_^0 == 0 /\ -__rho_7_^post3+__rho_7_^0 == 0 /\ b2626^0-b2626^post3 == 0 /\ a3838^0-a3838^post3 == 0 /\ -i___01313^post3+i___01313^0 == 0 /\ __rho_9_^0-__rho_9_^post3 == 0 /\ a2525^0-a2525^post3 == 0 /\ i___01717^0-i___01717^post3 == 0 /\ -ret_ExAllocatePool3030^post3+ret_ExAllocatePool3030^0 == 0 /\ __rho_6_^0-__rho_6_^post3 == 0 /\ __rho_5_^0-__rho_5_^post3 == 0 /\ __rho_8_^0-__rho_8_^post3 == 0 /\ -a77^post3+a77^0 == 0 /\ -__rho_56_^post3+__rho_56_^0 == 0 /\ CromData^0-CromData^post3 == 0 /\ i___02424^0-i___02424^post3 == 0 /\ k5^0-k5^post3 == 0 /\ -__rho_11_^post3+__rho_11_^0 == 0 /\ ResourceIrp^0-ResourceIrp^post3 == 0 /\ -Irql^post3+Irql^0 == 0 /\ -k3^post3+k3^0 == 0 /\ b3333^0-b3333^post3 == 0 /\ -__rho_10_^post3+__rho_10_^0 == 0 /\ -a2828^post3+a2828^0 == 0 /\ -i___02020^post3+i___02020^0 == 0 /\ -__rho_4_^post3+__rho_4_^0 == 0 /\ a3232^0-a3232^post3 == 0 /\ keR^0-keR^post3 == 0 /\ IsochResourceData^0-IsochResourceData^post3 == 0 /\ -pIrb^post3+pIrb^0 == 0 /\ -a3434^post3+a3434^0 == 0 /\ __rho_3_^0-__rho_3_^post3 == 0 /\ ntStatus^0-ntStatus^post3 == 0 /\ k2^0-k2^post3 == 0 /\ ret_IoSetDeviceInterfaceState44^0-ret_IoSetDeviceInterfaceState44^post3 == 0 /\ -a1818^post3+a1818^0 == 0 /\ -AsyncAddressData^post3+AsyncAddressData^0 == 0 /\ -b2929^post3+b2929^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post3 == 0 /\ -i^post3+i^0 == 0 /\ a11^0-a11^post3 == 0 /\ -k1^post3+k1^0 == 0 /\ ret_IoAllocateIrp2727^0-ret_IoAllocateIrp2727^post3 == 0 /\ 1-__rho_9_^0 <= 0 /\ -a4444^post3+a4444^0 == 0 /\ -k4^post3+k4^0 == 0 /\ -a3131^post3+a3131^0 == 0), cost: 1
   4: l3 -> l2 : i___01717^0'=i___01717^post4, IsochDetachData^0'=IsochDetachData^post4, ntStatus^0'=ntStatus^post4, __rho_6_^0'=__rho_6_^post4, k5^0'=k5^post4, __rho_2_^0'=__rho_2_^post4, a3838^0'=a3838^post4, a2828^0'=a2828^post4, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post4, b3535^0'=b3535^post4, CromData^0'=CromData^post4, b2626^0'=b2626^post4, __rho_4_^0'=__rho_4_^post4, k2^0'=k2^post4, __rho_12_^0'=__rho_12_^post4, i___02424^0'=i___02424^post4, a11^0'=a11^post4, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post4, __rho_8_^0'=__rho_8_^post4, keR^0'=keR^post4, a4444^0'=a4444^post4, a3232^0'=a3232^post4, ResourceIrp^0'=ResourceIrp^post4, i___01313^0'=i___01313^post4, Irql^0'=Irql^post4, b3333^0'=b3333^post4, __rho_5_^0'=__rho_5_^post4, k4^0'=k4^post4, __rho_1_^0'=__rho_1_^post4, i___04646^0'=i___04646^post4, a2525^0'=a2525^post4, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post4, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post4, b22^0'=b22^post4, a3737^0'=a3737^post4, k1^0'=k1^post4, __rho_11_^0'=__rho_11_^post4, i___02020^0'=i___02020^post4, IsochResourceData^0'=IsochResourceData^post4, pIrb^0'=pIrb^post4, __rho_7_^0'=__rho_7_^post4, keA^0'=keA^post4, __rho_3_^0'=__rho_3_^post4, a4343^0'=a4343^post4, a3131^0'=a3131^post4, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post4, i^0'=i^post4, Irp^0'=Irp^post4, b2929^0'=b2929^post4, __rho_56_^0'=__rho_56_^post4, k3^0'=k3^post4, __rho_13_^0'=__rho_13_^post4, i___04040^0'=i___04040^post4, a1818^0'=a1818^post4, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post4, __rho_99_^0'=__rho_99_^post4, a77^0'=a77^post4, a3434^0'=a3434^post4, i___099^0'=i___099^post4, __rho_10_^0'=__rho_10_^post4, (0 == 0 /\ -i___02020^post4+i___02020^0 == 0 /\ __rho_8_^0-__rho_8_^post4 == 0 /\ -pIrb^post4+pIrb^0 == 0 /\ -AsyncAddressData^post4+AsyncAddressData^0 == 0 /\ -b2929^post4+b2929^0 == 0 /\ b3535^0-b3535^post4 == 0 /\ -Irql^post4+Irql^0 == 0 /\ -k1^post4+k1^0 == 0 /\ -i___01313^post4+i___01313^0 == 0 /\ -__rho_11_^post4+__rho_11_^0 == 0 /\ b3333^0-b3333^post4 == 0 /\ ret_t1394_SubmitIrpSynch3636^0-ret_t1394_SubmitIrpSynch3636^post4 == 0 /\ a3838^0-a3838^post4 == 0 /\ -i___04040^post4+i___04040^0 == 0 /\ -i___099^post4+i___099^0 == 0 /\ -a4343^post4+a4343^0 == 0 /\ __rho_2_^0-__rho_2_^post4 == 0 /\ i___01717^0-i___01717^post4 == 0 /\ b22^0-b22^post4 == 0 /\ -Irp^post4+Irp^0 == 0 /\ a2525^0-a2525^post4 == 0 /\ __rho_1_^0-__rho_1_^post4 == 0 /\ -a3434^post4+a3434^0 == 0 /\ -__rho_12_^post4+__rho_12_^0 == 0 /\ a4444^0-a4444^post4 == 0 /\ i^0-i^post4 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post4 == 0 /\ __rho_6_^0-__rho_6_^post4 == 0 /\ __rho_56_^0-__rho_56_^post4 == 0 /\ -__rho_13_^post4+__rho_13_^0 == 0 /\ IsochResourceData^0-IsochResourceData^post4 == 0 /\ ResourceIrp^0-ResourceIrp^post4 == 0 /\ b2626^0-b2626^post4 == 0 /\ __rho_3_^0-__rho_3_^post4 == 0 /\ keR^0-keR^post4 == 0 /\ -a3131^post4+a3131^0 == 0 /\ ret_IoSetDeviceInterfaceState44^0-ret_IoSetDeviceInterfaceState44^post4 == 0 /\ -k4^post4+k4^0 == 0 /\ k5^0-k5^post4 == 0 /\ -a77^post4+a77^0 == 0 /\ -a1818^post4+a1818^0 == 0 /\ -__rho_7_^post4+__rho_7_^0 == 0 /\ -a3737^post4+a3737^0 == 0 /\ i___02424^0-i___02424^post4 == 0 /\ -k3^post4+k3^0 == 0 /\ __rho_5_^0-__rho_5_^post4 == 0 /\ CromData^0-CromData^post4 == 0 /\ __rho_4_^0-__rho_4_^post4 == 0 /\ ntStatus^0-ntStatus^post4 == 0 /\ i___04646^0-i___04646^post4 == 0 /\ -__rho_10_^post4+__rho_10_^0 == 0 /\ -a2828^post4+a2828^0 == 0 /\ a3232^0-a3232^post4 == 0 /\ IsochDetachData^0-IsochDetachData^post4 == 0 /\ a11^0-a11^post4 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post4 == 0 /\ -keA^post4+keA^0 == 0 /\ -__rho_99_^post4+__rho_99_^0 == 0 /\ k2^0-k2^post4 == 0 /\ ret_IoAllocateIrp2727^0-ret_IoAllocateIrp2727^post4 == 0), cost: 1
   5: l4 -> l3 : i___01717^0'=i___01717^post5, IsochDetachData^0'=IsochDetachData^post5, ntStatus^0'=ntStatus^post5, __rho_6_^0'=__rho_6_^post5, k5^0'=k5^post5, __rho_2_^0'=__rho_2_^post5, a3838^0'=a3838^post5, a2828^0'=a2828^post5, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post5, b3535^0'=b3535^post5, CromData^0'=CromData^post5, b2626^0'=b2626^post5, __rho_4_^0'=__rho_4_^post5, k2^0'=k2^post5, __rho_12_^0'=__rho_12_^post5, i___02424^0'=i___02424^post5, a11^0'=a11^post5, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post5, __rho_8_^0'=__rho_8_^post5, keR^0'=keR^post5, a4444^0'=a4444^post5, a3232^0'=a3232^post5, ResourceIrp^0'=ResourceIrp^post5, i___01313^0'=i___01313^post5, Irql^0'=Irql^post5, b3333^0'=b3333^post5, __rho_5_^0'=__rho_5_^post5, k4^0'=k4^post5, __rho_1_^0'=__rho_1_^post5, i___04646^0'=i___04646^post5, a2525^0'=a2525^post5, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post5, __rho_9_^0'=__rho_9_^post5, AsyncAddressData^0'=AsyncAddressData^post5, b22^0'=b22^post5, a3737^0'=a3737^post5, k1^0'=k1^post5, __rho_11_^0'=__rho_11_^post5, i___02020^0'=i___02020^post5, IsochResourceData^0'=IsochResourceData^post5, pIrb^0'=pIrb^post5, __rho_7_^0'=__rho_7_^post5, keA^0'=keA^post5, __rho_3_^0'=__rho_3_^post5, a4343^0'=a4343^post5, a3131^0'=a3131^post5, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post5, i^0'=i^post5, Irp^0'=Irp^post5, b2929^0'=b2929^post5, __rho_56_^0'=__rho_56_^post5, k3^0'=k3^post5, __rho_13_^0'=__rho_13_^post5, i___04040^0'=i___04040^post5, a1818^0'=a1818^post5, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post5, __rho_99_^0'=__rho_99_^post5, a77^0'=a77^post5, a3434^0'=a3434^post5, i___099^0'=i___099^post5, __rho_10_^0'=__rho_10_^post5, (-CromData^post5+CromData^0 == 0 /\ -i___01313^post5+i___01313^0 == 0 /\ a2525^0-a2525^post5 == 0 /\ a3232^0-a3232^post5 == 0 /\ ret_t1394_SubmitIrpSynch3636^0-ret_t1394_SubmitIrpSynch3636^post5 == 0 /\ -IsochResourceData^post5+IsochResourceData^0 == 0 /\ -ret_IoSetDeviceInterfaceState44^post5+ret_IoSetDeviceInterfaceState44^0 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post5 == 0 /\ a2828^0-a2828^post5 == 0 /\ k5^0-k5^post5 == 0 /\ -ret_IoAllocateIrp2727^post5+ret_IoAllocateIrp2727^0 == 0 /\ -k2^post5+k2^0 == 0 /\ __rho_9_^0-__rho_9_^post5 == 0 /\ -a77^post5+a77^0 == 0 /\ -k1^post5+k1^0 == 0 /\ b3333^0-b3333^post5 == 0 /\ IsochDetachData^0-IsochDetachData^post5 == 0 /\ __rho_2_^0-__rho_2_^post5 == 0 /\ __rho_8_^0 <= 0 /\ -i___099^post5+i___099^0 == 0 /\ -a4343^post5+a4343^0 == 0 /\ __rho_13_^0-__rho_13_^post5 == 0 /\ -k3^post5+k3^0 == 0 /\ -a3434^post5+a3434^0 == 0 /\ b2929^0-b2929^post5 == 0 /\ ResourceIrp^0-ResourceIrp^post5 == 0 /\ a3838^0-a3838^post5 == 0 /\ i^0-i^post5 == 0 /\ -__rho_99_^post5+__rho_99_^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post5 == 0 /\ ntStatus^0-ntStatus^post5 == 0 /\ a4444^0-a4444^post5 == 0 /\ -a1818^post5+a1818^0 == 0 /\ -__rho_5_^post5+__rho_5_^0 == 0 /\ a11^0-a11^post5 == 0 /\ -__rho_8_^post5+__rho_8_^0 == 0 /\ __rho_3_^0-__rho_3_^post5 == 0 /\ -__rho_7_^post5+__rho_7_^0 == 0 /\ __rho_6_^0-__rho_6_^post5 == 0 /\ -AsyncAddressData^post5+AsyncAddressData^0 == 0 /\ -k4^post5+k4^0 == 0 /\ b3535^0-b3535^post5 == 0 /\ b2626^0-b2626^post5 == 0 /\ -__rho_56_^post5+__rho_56_^0 == 0 /\ b22^0-b22^post5 == 0 /\ i___02424^0-i___02424^post5 == 0 /\ -a3131^post5+a3131^0 == 0 /\ -__rho_11_^post5+__rho_11_^0 == 0 /\ keR^0-keR^post5 == 0 /\ -Irql^post5+Irql^0 == 0 /\ i___01717^0-i___01717^post5 == 0 /\ -__rho_10_^post5+__rho_10_^0 == 0 /\ -i___04040^post5+i___04040^0 == 0 /\ -Irp^post5+Irp^0 == 0 /\ -i___02020^post5+i___02020^0 == 0 /\ -__rho_12_^post5+__rho_12_^0 == 0 /\ i___04646^0-i___04646^post5 == 0 /\ -keA^post5+keA^0 == 0 /\ -a3737^post5+a3737^0 == 0 /\ __rho_4_^0-__rho_4_^post5 == 0 /\ -__rho_1_^post5+__rho_1_^0 == 0 /\ -pIrb^post5+pIrb^0 == 0), cost: 1
   6: l4 -> l3 : i___01717^0'=i___01717^post6, IsochDetachData^0'=IsochDetachData^post6, ntStatus^0'=ntStatus^post6, __rho_6_^0'=__rho_6_^post6, k5^0'=k5^post6, __rho_2_^0'=__rho_2_^post6, a3838^0'=a3838^post6, a2828^0'=a2828^post6, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post6, b3535^0'=b3535^post6, CromData^0'=CromData^post6, b2626^0'=b2626^post6, __rho_4_^0'=__rho_4_^post6, k2^0'=k2^post6, __rho_12_^0'=__rho_12_^post6, i___02424^0'=i___02424^post6, a11^0'=a11^post6, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post6, __rho_8_^0'=__rho_8_^post6, keR^0'=keR^post6, a4444^0'=a4444^post6, a3232^0'=a3232^post6, ResourceIrp^0'=ResourceIrp^post6, i___01313^0'=i___01313^post6, Irql^0'=Irql^post6, b3333^0'=b3333^post6, __rho_5_^0'=__rho_5_^post6, k4^0'=k4^post6, __rho_1_^0'=__rho_1_^post6, i___04646^0'=i___04646^post6, a2525^0'=a2525^post6, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post6, __rho_9_^0'=__rho_9_^post6, AsyncAddressData^0'=AsyncAddressData^post6, b22^0'=b22^post6, a3737^0'=a3737^post6, k1^0'=k1^post6, __rho_11_^0'=__rho_11_^post6, i___02020^0'=i___02020^post6, IsochResourceData^0'=IsochResourceData^post6, pIrb^0'=pIrb^post6, __rho_7_^0'=__rho_7_^post6, keA^0'=keA^post6, __rho_3_^0'=__rho_3_^post6, a4343^0'=a4343^post6, a3131^0'=a3131^post6, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post6, i^0'=i^post6, Irp^0'=Irp^post6, b2929^0'=b2929^post6, __rho_56_^0'=__rho_56_^post6, k3^0'=k3^post6, __rho_13_^0'=__rho_13_^post6, i___04040^0'=i___04040^post6, a1818^0'=a1818^post6, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post6, __rho_99_^0'=__rho_99_^post6, a77^0'=a77^post6, a3434^0'=a3434^post6, i___099^0'=i___099^post6, __rho_10_^0'=__rho_10_^post6, (i^0-i^post6 == 0 /\ __rho_4_^0-__rho_4_^post6 == 0 /\ -Irp^post6+Irp^0 == 0 /\ -keA^post6+keA^0 == 0 /\ -ret_IoAllocateIrp2727^post6+ret_IoAllocateIrp2727^0 == 0 /\ a3737^0-a3737^post6 == 0 /\ -__rho_1_^post6+__rho_1_^0 == 0 /\ a11^0-a11^post6 == 0 /\ -__rho_13_^post6+__rho_13_^0 == 0 /\ __rho_3_^0-__rho_3_^post6 == 0 /\ __rho_11_^0-__rho_11_^post6 == 0 /\ i___04040^0-i___04040^post6 == 0 /\ -ret_IoSetDeviceInterfaceState44^post6+ret_IoSetDeviceInterfaceState44^0 == 0 /\ -__rho_5_^post6+__rho_5_^0 == 0 /\ -Irql^post6+Irql^0 == 0 /\ b2626^0-b2626^post6 == 0 /\ -i___02424^post6+i___02424^0 == 0 /\ -a77^post6+a77^0 == 0 /\ -a2525^post6+a2525^0 == 0 /\ -i___02020^post6+i___02020^0 == 0 /\ -k3^post6+k3^0 == 0 /\ -__rho_99_^post6+__rho_99_^0 == 0 /\ i___01717^0-i___01717^post6 == 0 /\ -i___099^post6+i___099^0 == 0 /\ __rho_6_^0-__rho_6_^post6 == 0 /\ i___04646^0-i___04646^post6 == 0 /\ 1-__rho_8_^0 <= 0 /\ -__rho_8_^post6+__rho_8_^0 == 0 /\ -b3333^post6+b3333^0 == 0 /\ i___01313^0-i___01313^post6 == 0 /\ b2929^0-b2929^post6 == 0 /\ -IsochResourceData^post6+IsochResourceData^0 == 0 /\ keR^0-keR^post6 == 0 /\ -a3434^post6+a3434^0 == 0 /\ a4444^0-a4444^post6 == 0 /\ -b3535^post6+b3535^0 == 0 /\ pIrb^0-pIrb^post6 == 0 /\ a4343^0-a4343^post6 == 0 /\ -b22^post6+b22^0 == 0 /\ a2828^0-a2828^post6 == 0 /\ k4^0-k4^post6 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post6 == 0 /\ -__rho_56_^post6+__rho_56_^0 == 0 /\ -__rho_2_^post6+__rho_2_^0 == 0 /\ IsochDetachData^0-IsochDetachData^post6 == 0 /\ -AsyncAddressData^post6+AsyncAddressData^0 == 0 /\ -a3232^post6+a3232^0 == 0 /\ __rho_12_^0-__rho_12_^post6 == 0 /\ -k1^post6+k1^0 == 0 /\ -a3131^post6+a3131^0 == 0 /\ -__rho_10_^post6+__rho_10_^0 == 0 /\ k2^0-k2^post6 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post6+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post6 == 0 /\ a3838^0-a3838^post6 == 0 /\ ntStatus^0-ntStatus^post6 == 0 /\ ResourceIrp^0-ResourceIrp^post6 == 0 /\ k5^0-k5^post6 == 0 /\ -__rho_7_^post6+__rho_7_^0 == 0 /\ -__rho_9_^post6+__rho_9_^0 == 0 /\ CromData^0-CromData^post6 == 0 /\ a1818^0-a1818^post6 == 0), cost: 1
   7: l5 -> l4 : i___01717^0'=i___01717^post7, IsochDetachData^0'=IsochDetachData^post7, ntStatus^0'=ntStatus^post7, __rho_6_^0'=__rho_6_^post7, k5^0'=k5^post7, __rho_2_^0'=__rho_2_^post7, a3838^0'=a3838^post7, a2828^0'=a2828^post7, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post7, b3535^0'=b3535^post7, CromData^0'=CromData^post7, b2626^0'=b2626^post7, __rho_4_^0'=__rho_4_^post7, k2^0'=k2^post7, __rho_12_^0'=__rho_12_^post7, i___02424^0'=i___02424^post7, a11^0'=a11^post7, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post7, __rho_8_^0'=__rho_8_^post7, keR^0'=keR^post7, a4444^0'=a4444^post7, a3232^0'=a3232^post7, ResourceIrp^0'=ResourceIrp^post7, i___01313^0'=i___01313^post7, Irql^0'=Irql^post7, b3333^0'=b3333^post7, __rho_5_^0'=__rho_5_^post7, k4^0'=k4^post7, __rho_1_^0'=__rho_1_^post7, i___04646^0'=i___04646^post7, a2525^0'=a2525^post7, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post7, __rho_9_^0'=__rho_9_^post7, AsyncAddressData^0'=AsyncAddressData^post7, b22^0'=b22^post7, a3737^0'=a3737^post7, k1^0'=k1^post7, __rho_11_^0'=__rho_11_^post7, i___02020^0'=i___02020^post7, IsochResourceData^0'=IsochResourceData^post7, pIrb^0'=pIrb^post7, __rho_7_^0'=__rho_7_^post7, keA^0'=keA^post7, __rho_3_^0'=__rho_3_^post7, a4343^0'=a4343^post7, a3131^0'=a3131^post7, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post7, i^0'=i^post7, Irp^0'=Irp^post7, b2929^0'=b2929^post7, __rho_56_^0'=__rho_56_^post7, k3^0'=k3^post7, __rho_13_^0'=__rho_13_^post7, i___04040^0'=i___04040^post7, a1818^0'=a1818^post7, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post7, __rho_99_^0'=__rho_99_^post7, a77^0'=a77^post7, a3434^0'=a3434^post7, i___099^0'=i___099^post7, __rho_10_^0'=__rho_10_^post7, (0 == 0 /\ -Irp^post7+Irp^0 == 0 /\ -keA^post7+keA^0 == 0 /\ a4444^0-a4444^post7 == 0 /\ -__rho_1_^post7+__rho_1_^0 == 0 /\ -a2525^post7+a2525^0 == 0 /\ k5^0-k5^post7 == 0 /\ i___01313^0-i___01313^post7 == 0 /\ k4^0-k4^post7 == 0 /\ -b22^post7+b22^0 == 0 /\ -ResourceIrp^post7+ResourceIrp^0 == 0 /\ __rho_12_^0-__rho_12_^post7 == 0 /\ a2828^0-a2828^post7 == 0 /\ -__rho_13_^post7+__rho_13_^0 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post7 == 0 /\ -__rho_3_^post7+__rho_3_^0 == 0 /\ CromData^0-CromData^post7 == 0 /\ -i___04646^post7+i___04646^0 == 0 /\ __rho_4_^0-__rho_4_^post7 == 0 /\ __rho_2_^0-__rho_2_^post7 == 0 /\ ntStatus^0-ntStatus^post7 == 0 /\ -__rho_56_^post7+__rho_56_^0 == 0 /\ a3838^0-a3838^post7 == 0 /\ -a77^post7+a77^0 == 0 /\ -i___099^post7+i___099^0 == 0 /\ -k3^post7+k3^0 == 0 /\ -b3333^post7+b3333^0 == 0 /\ -__rho_10_^post7+__rho_10_^0 == 0 /\ -i___04040^post7+i___04040^0 == 0 /\ ret_IoSetDeviceInterfaceState44^0-ret_IoSetDeviceInterfaceState44^post7 == 0 /\ k1^0-k1^post7 == 0 /\ -i^post7+i^0 == 0 /\ -IsochResourceData^post7+IsochResourceData^0 == 0 /\ -a3434^post7+a3434^0 == 0 /\ __rho_5_^0-__rho_5_^post7 == 0 /\ -ret_IoAllocateIrp2727^post7+ret_IoAllocateIrp2727^0 == 0 /\ i___02424^0-i___02424^post7 == 0 /\ __rho_7_^0-__rho_7_^post7 == 0 /\ -b2626^post7+b2626^0 == 0 /\ __rho_6_^0-__rho_6_^post7 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post7 == 0 /\ b3535^0-b3535^post7 == 0 /\ IsochDetachData^0-IsochDetachData^post7 == 0 /\ Irql^0-Irql^post7 == 0 /\ -keR^post7+keR^0 == 0 /\ __rho_11_^0-__rho_11_^post7 == 0 /\ a4343^0-a4343^post7 == 0 /\ -__rho_9_^post7+__rho_9_^0 == 0 /\ -pIrb^post7+pIrb^0 == 0 /\ k2^0-k2^post7 == 0 /\ -AsyncAddressData^post7+AsyncAddressData^0 == 0 /\ -a11^post7+a11^0 == 0 /\ -__rho_99_^post7+__rho_99_^0 == 0 /\ -b2929^post7+b2929^0 == 0 /\ -a1818^post7+a1818^0 == 0 /\ i___02020^0-i___02020^post7 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post7+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ -a3131^post7+a3131^0 == 0 /\ -a3737^post7+a3737^0 == 0 /\ -a3232^post7+a3232^0 == 0 /\ i___01717^0-i___01717^post7 == 0), cost: 1
   8: l6 -> l5 : i___01717^0'=i___01717^post8, IsochDetachData^0'=IsochDetachData^post8, ntStatus^0'=ntStatus^post8, __rho_6_^0'=__rho_6_^post8, k5^0'=k5^post8, __rho_2_^0'=__rho_2_^post8, a3838^0'=a3838^post8, a2828^0'=a2828^post8, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post8, b3535^0'=b3535^post8, CromData^0'=CromData^post8, b2626^0'=b2626^post8, __rho_4_^0'=__rho_4_^post8, k2^0'=k2^post8, __rho_12_^0'=__rho_12_^post8, i___02424^0'=i___02424^post8, a11^0'=a11^post8, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post8, __rho_8_^0'=__rho_8_^post8, keR^0'=keR^post8, a4444^0'=a4444^post8, a3232^0'=a3232^post8, ResourceIrp^0'=ResourceIrp^post8, i___01313^0'=i___01313^post8, Irql^0'=Irql^post8, b3333^0'=b3333^post8, __rho_5_^0'=__rho_5_^post8, k4^0'=k4^post8, __rho_1_^0'=__rho_1_^post8, i___04646^0'=i___04646^post8, a2525^0'=a2525^post8, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post8, __rho_9_^0'=__rho_9_^post8, AsyncAddressData^0'=AsyncAddressData^post8, b22^0'=b22^post8, a3737^0'=a3737^post8, k1^0'=k1^post8, __rho_11_^0'=__rho_11_^post8, i___02020^0'=i___02020^post8, IsochResourceData^0'=IsochResourceData^post8, pIrb^0'=pIrb^post8, __rho_7_^0'=__rho_7_^post8, keA^0'=keA^post8, __rho_3_^0'=__rho_3_^post8, a4343^0'=a4343^post8, a3131^0'=a3131^post8, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post8, i^0'=i^post8, Irp^0'=Irp^post8, b2929^0'=b2929^post8, __rho_56_^0'=__rho_56_^post8, k3^0'=k3^post8, __rho_13_^0'=__rho_13_^post8, i___04040^0'=i___04040^post8, a1818^0'=a1818^post8, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post8, __rho_99_^0'=__rho_99_^post8, a77^0'=a77^post8, a3434^0'=a3434^post8, i___099^0'=i___099^post8, __rho_10_^0'=__rho_10_^post8, (AsyncAddressData^0-AsyncAddressData^post8 == 0 /\ -k3^post8+k3^0 == 0 /\ i___01313^0-i___01313^post8 == 0 /\ __rho_8_^0-__rho_8_^post8 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post8 == 0 /\ -i___099^post8+i___099^0 == 0 /\ k5^0-k5^post8 == 0 /\ -__rho_10_^post8+__rho_10_^0 == 0 /\ -a3232^post8+a3232^0 == 0 /\ __rho_12_^0-__rho_12_^post8 == 0 /\ -pIrb^post8+pIrb^0 == 0 /\ ret_IoSetDeviceInterfaceState44^0-ret_IoSetDeviceInterfaceState44^post8 == 0 /\ __rho_5_^0-__rho_5_^post8 == 0 /\ -a1818^post8+a1818^0 == 0 /\ ntStatus^0-ntStatus^post8 == 0 /\ a3838^0-a3838^post8 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post8+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ a2828^0-a2828^post8 == 0 /\ __rho_7_^0-__rho_7_^post8 == 0 /\ i___02020^0-i___02020^post8 == 0 /\ -ret_IoAllocateIrp2727^post8+ret_IoAllocateIrp2727^0 == 0 /\ CromData^0-CromData^post8 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post8 == 0 /\ -a2525^post8+a2525^0 == 0 /\ -a77^post8+a77^0 == 0 /\ a11^0-a11^post8 == 0 /\ -i^post8+i^0 == 0 /\ Irql^0-Irql^post8 == 0 /\ -a4444^post8+a4444^0 == 0 /\ k4^0-k4^post8 == 0 /\ -__rho_56_^post8+__rho_56_^0 == 0 /\ b3535^0-b3535^post8 == 0 /\ -__rho_99_^post8+__rho_99_^0 == 0 /\ a3131^0-a3131^post8 == 0 /\ i___02424^0-i___02424^post8 == 0 /\ -a3737^post8+a3737^0 == 0 /\ -i___04040^post8+i___04040^0 == 0 /\ __rho_1_^0-__rho_1_^post8 == 0 /\ __rho_4_^0-__rho_4_^post8 == 0 /\ IsochDetachData^0-IsochDetachData^post8 == 0 /\ __rho_2_^0-__rho_2_^post8 == 0 /\ -b2626^post8+b2626^0 == 0 /\ -__rho_9_^post8+__rho_9_^0 == 0 /\ -b2929^post8+b2929^0 == 0 /\ k1^0-k1^post8 == 0 /\ __rho_7_^0 <= 0 /\ -keA^post8+keA^0 == 0 /\ -a3434^post8+a3434^0 == 0 /\ a4343^0-a4343^post8 == 0 /\ -keR^post8+keR^0 == 0 /\ -b22^post8+b22^0 == 0 /\ b3333^0-b3333^post8 == 0 /\ -__rho_13_^post8+__rho_13_^0 == 0 /\ -__rho_3_^post8+__rho_3_^0 == 0 /\ -Irp^post8+Irp^0 == 0 /\ IsochResourceData^0-IsochResourceData^post8 == 0 /\ i___01717^0-i___01717^post8 == 0 /\ k2^0-k2^post8 == 0 /\ __rho_6_^0-__rho_6_^post8 == 0 /\ -i___04646^post8+i___04646^0 == 0 /\ -ResourceIrp^post8+ResourceIrp^0 == 0 /\ -__rho_11_^post8+__rho_11_^0 == 0), cost: 1
   9: l6 -> l5 : i___01717^0'=i___01717^post9, IsochDetachData^0'=IsochDetachData^post9, ntStatus^0'=ntStatus^post9, __rho_6_^0'=__rho_6_^post9, k5^0'=k5^post9, __rho_2_^0'=__rho_2_^post9, a3838^0'=a3838^post9, a2828^0'=a2828^post9, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post9, b3535^0'=b3535^post9, CromData^0'=CromData^post9, b2626^0'=b2626^post9, __rho_4_^0'=__rho_4_^post9, k2^0'=k2^post9, __rho_12_^0'=__rho_12_^post9, i___02424^0'=i___02424^post9, a11^0'=a11^post9, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post9, __rho_8_^0'=__rho_8_^post9, keR^0'=keR^post9, a4444^0'=a4444^post9, a3232^0'=a3232^post9, ResourceIrp^0'=ResourceIrp^post9, i___01313^0'=i___01313^post9, Irql^0'=Irql^post9, b3333^0'=b3333^post9, __rho_5_^0'=__rho_5_^post9, k4^0'=k4^post9, __rho_1_^0'=__rho_1_^post9, i___04646^0'=i___04646^post9, a2525^0'=a2525^post9, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post9, __rho_9_^0'=__rho_9_^post9, AsyncAddressData^0'=AsyncAddressData^post9, b22^0'=b22^post9, a3737^0'=a3737^post9, k1^0'=k1^post9, __rho_11_^0'=__rho_11_^post9, i___02020^0'=i___02020^post9, IsochResourceData^0'=IsochResourceData^post9, pIrb^0'=pIrb^post9, __rho_7_^0'=__rho_7_^post9, keA^0'=keA^post9, __rho_3_^0'=__rho_3_^post9, a4343^0'=a4343^post9, a3131^0'=a3131^post9, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post9, i^0'=i^post9, Irp^0'=Irp^post9, b2929^0'=b2929^post9, __rho_56_^0'=__rho_56_^post9, k3^0'=k3^post9, __rho_13_^0'=__rho_13_^post9, i___04040^0'=i___04040^post9, a1818^0'=a1818^post9, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post9, __rho_99_^0'=__rho_99_^post9, a77^0'=a77^post9, a3434^0'=a3434^post9, i___099^0'=i___099^post9, __rho_10_^0'=__rho_10_^post9, (-b3333^post9+b3333^0 == 0 /\ -i___02020^post9+i___02020^0 == 0 /\ -pIrb^post9+pIrb^0 == 0 /\ -__rho_13_^post9+__rho_13_^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post9 == 0 /\ a3232^0-a3232^post9 == 0 /\ AsyncAddressData^0-AsyncAddressData^post9 == 0 /\ IsochDetachData^0-IsochDetachData^post9 == 0 /\ -a1818^post9+a1818^0 == 0 /\ -__rho_3_^post9+__rho_3_^0 == 0 /\ ret_IoSetDeviceInterfaceState44^0-ret_IoSetDeviceInterfaceState44^post9 == 0 /\ -__rho_11_^post9+__rho_11_^0 == 0 /\ __rho_5_^0-__rho_5_^post9 == 0 /\ -k3^post9+k3^0 == 0 /\ k2^0-k2^post9 == 0 /\ a11^0-a11^post9 == 0 /\ __rho_6_^0-__rho_6_^post9 == 0 /\ -ret_IoAllocateIrp2727^post9+ret_IoAllocateIrp2727^0 == 0 /\ k4^0-k4^post9 == 0 /\ b3535^0-b3535^post9 == 0 /\ Irql^0-Irql^post9 == 0 /\ k5^0-k5^post9 == 0 /\ -ResourceIrp^post9+ResourceIrp^0 == 0 /\ -__rho_99_^post9+__rho_99_^0 == 0 /\ a4444^0-a4444^post9 == 0 /\ ntStatus^0-ntStatus^post9 == 0 /\ -keR^post9+keR^0 == 0 /\ -__rho_9_^post9+__rho_9_^0 == 0 /\ -__rho_56_^post9+__rho_56_^0 == 0 /\ -b2929^post9+b2929^0 == 0 /\ a2828^0-a2828^post9 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post9+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ i___01717^0-i___01717^post9 == 0 /\ __rho_12_^0-__rho_12_^post9 == 0 /\ -a77^post9+a77^0 == 0 /\ 1-__rho_7_^0 <= 0 /\ -i___099^post9+i___099^0 == 0 /\ -i___04646^post9+i___04646^0 == 0 /\ -k1^post9+k1^0 == 0 /\ -__rho_7_^post9+__rho_7_^0 == 0 /\ -a3737^post9+a3737^0 == 0 /\ -i^post9+i^0 == 0 /\ a3131^0-a3131^post9 == 0 /\ IsochResourceData^0-IsochResourceData^post9 == 0 /\ -ret_ExAllocatePool3030^post9+ret_ExAllocatePool3030^0 == 0 /\ -i___04040^post9+i___04040^0 == 0 /\ i___01313^0-i___01313^post9 == 0 /\ b2626^0-b2626^post9 == 0 /\ -a2525^post9+a2525^0 == 0 /\ -a3838^post9+a3838^0 == 0 /\ -__rho_10_^post9+__rho_10_^0 == 0 /\ CromData^0-CromData^post9 == 0 /\ __rho_1_^0-__rho_1_^post9 == 0 /\ -a3434^post9+a3434^0 == 0 /\ a4343^0-a4343^post9 == 0 /\ __rho_8_^0-__rho_8_^post9 == 0 /\ -Irp^post9+Irp^0 == 0 /\ -b22^post9+b22^0 == 0 /\ i___02424^0-i___02424^post9 == 0 /\ __rho_2_^0-__rho_2_^post9 == 0 /\ keA^0-keA^post9 == 0 /\ __rho_4_^0-__rho_4_^post9 == 0), cost: 1
  10: l7 -> l8 : i___01717^0'=i___01717^post10, IsochDetachData^0'=IsochDetachData^post10, ntStatus^0'=ntStatus^post10, __rho_6_^0'=__rho_6_^post10, k5^0'=k5^post10, __rho_2_^0'=__rho_2_^post10, a3838^0'=a3838^post10, a2828^0'=a2828^post10, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post10, b3535^0'=b3535^post10, CromData^0'=CromData^post10, b2626^0'=b2626^post10, __rho_4_^0'=__rho_4_^post10, k2^0'=k2^post10, __rho_12_^0'=__rho_12_^post10, i___02424^0'=i___02424^post10, a11^0'=a11^post10, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post10, __rho_8_^0'=__rho_8_^post10, keR^0'=keR^post10, a4444^0'=a4444^post10, a3232^0'=a3232^post10, ResourceIrp^0'=ResourceIrp^post10, i___01313^0'=i___01313^post10, Irql^0'=Irql^post10, b3333^0'=b3333^post10, __rho_5_^0'=__rho_5_^post10, k4^0'=k4^post10, __rho_1_^0'=__rho_1_^post10, i___04646^0'=i___04646^post10, a2525^0'=a2525^post10, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post10, __rho_9_^0'=__rho_9_^post10, AsyncAddressData^0'=AsyncAddressData^post10, b22^0'=b22^post10, a3737^0'=a3737^post10, k1^0'=k1^post10, __rho_11_^0'=__rho_11_^post10, i___02020^0'=i___02020^post10, IsochResourceData^0'=IsochResourceData^post10, pIrb^0'=pIrb^post10, __rho_7_^0'=__rho_7_^post10, keA^0'=keA^post10, __rho_3_^0'=__rho_3_^post10, a4343^0'=a4343^post10, a3131^0'=a3131^post10, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post10, i^0'=i^post10, Irp^0'=Irp^post10, b2929^0'=b2929^post10, __rho_56_^0'=__rho_56_^post10, k3^0'=k3^post10, __rho_13_^0'=__rho_13_^post10, i___04040^0'=i___04040^post10, a1818^0'=a1818^post10, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post10, __rho_99_^0'=__rho_99_^post10, a77^0'=a77^post10, a3434^0'=a3434^post10, i___099^0'=i___099^post10, __rho_10_^0'=__rho_10_^post10, (-__rho_7_^post10+__rho_7_^0 == 0 /\ Irql^0-Irql^post10 == 0 /\ k3^0-k3^post10 == 0 /\ a2828^0-a2828^post10 == 0 /\ keA^0-keA^post10 == 0 /\ ntStatus^0-ntStatus^post10 == 0 /\ -__rho_56_^post10+__rho_56_^0 == 0 /\ -i^post10+i^0 == 0 /\ -a3131^post10+a3131^0 == 0 /\ -a3737^post10+a3737^0 == 0 /\ -i___04646^post10+i___04646^0 == 0 /\ keR^0-keR^post10 == 0 /\ Irp^0-Irp^post10 == 0 /\ __rho_5_^0-__rho_5_^post10 == 0 /\ __rho_8_^0-__rho_8_^post10 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post10 == 0 /\ -i___04040^post10+i___04040^0 == 0 /\ -pIrb^post10+pIrb^0 == 0 /\ ret_t1394_SubmitIrpSynch3636^0-ret_t1394_SubmitIrpSynch3636^post10 == 0 /\ -__rho_10_^post10+__rho_10_^0 == 0 /\ -i___02020^post10+i___02020^0 == 0 /\ CromData^0-CromData^post10 == 0 /\ ResourceIrp^0-ResourceIrp^post10 == 0 /\ __rho_2_^0-__rho_2_^post10 == 0 /\ -b2929^post10+b2929^0 == 0 /\ a3838^0-a3838^post10 == 0 /\ b22^0-b22^post10 == 0 /\ -a1818^post10+a1818^0 == 0 /\ __rho_9_^0-__rho_9_^post10 == 0 /\ a3232^0-a3232^post10 == 0 /\ IsochResourceData^0-IsochResourceData^post10 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post10 == 0 /\ -ret_IoAllocateIrp2727^post10+ret_IoAllocateIrp2727^0 == 0 /\ -__rho_13_^post10+__rho_13_^0 == 0 /\ IsochDetachData^0-IsochDetachData^post10 == 0 /\ -i___01313^post10+i___01313^0 == 0 /\ -a77^post10+a77^0 == 0 /\ -k1^post10+k1^0 == 0 /\ k2^0-k2^post10 == 0 /\ -a4444^post10+a4444^0 == 0 /\ __rho_6_^0-__rho_6_^post10 == 0 /\ ret_IoSetDeviceInterfaceState44^0-ret_IoSetDeviceInterfaceState44^post10 == 0 /\ k4^0-k4^post10 == 0 /\ i___02424^0-i___02424^post10 == 0 /\ -i___099^post10+i___099^0 == 0 /\ a11^0-a11^post10 == 0 /\ b2626^0-b2626^post10 == 0 /\ -__rho_3_^post10+__rho_3_^0 == 0 /\ -__rho_11_^post10+__rho_11_^0 == 0 /\ -__rho_12_^post10+__rho_12_^0 == 0 /\ -__rho_99_^post10+__rho_99_^0 == 0 /\ -i___01717^post10+i___01717^0 == 0 /\ -a2525^post10+a2525^0 == 0 /\ -a4343^post10+a4343^0 == 0 /\ b3535^0-b3535^post10 == 0 /\ AsyncAddressData^0-AsyncAddressData^post10 == 0 /\ -__rho_4_^post10+__rho_4_^0 == 0 /\ b3333^0-b3333^post10 == 0 /\ -k5^post10+k5^0 == 0 /\ __rho_1_^0-__rho_1_^post10 == 0 /\ -a3434^post10+a3434^0 == 0), cost: 1
  24: l8 -> l18 : i___01717^0'=i___01717^post24, IsochDetachData^0'=IsochDetachData^post24, ntStatus^0'=ntStatus^post24, __rho_6_^0'=__rho_6_^post24, k5^0'=k5^post24, __rho_2_^0'=__rho_2_^post24, a3838^0'=a3838^post24, a2828^0'=a2828^post24, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post24, b3535^0'=b3535^post24, CromData^0'=CromData^post24, b2626^0'=b2626^post24, __rho_4_^0'=__rho_4_^post24, k2^0'=k2^post24, __rho_12_^0'=__rho_12_^post24, i___02424^0'=i___02424^post24, a11^0'=a11^post24, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post24, __rho_8_^0'=__rho_8_^post24, keR^0'=keR^post24, a4444^0'=a4444^post24, a3232^0'=a3232^post24, ResourceIrp^0'=ResourceIrp^post24, i___01313^0'=i___01313^post24, Irql^0'=Irql^post24, b3333^0'=b3333^post24, __rho_5_^0'=__rho_5_^post24, k4^0'=k4^post24, __rho_1_^0'=__rho_1_^post24, i___04646^0'=i___04646^post24, a2525^0'=a2525^post24, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post24, __rho_9_^0'=__rho_9_^post24, AsyncAddressData^0'=AsyncAddressData^post24, b22^0'=b22^post24, a3737^0'=a3737^post24, k1^0'=k1^post24, __rho_11_^0'=__rho_11_^post24, i___02020^0'=i___02020^post24, IsochResourceData^0'=IsochResourceData^post24, pIrb^0'=pIrb^post24, __rho_7_^0'=__rho_7_^post24, keA^0'=keA^post24, __rho_3_^0'=__rho_3_^post24, a4343^0'=a4343^post24, a3131^0'=a3131^post24, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post24, i^0'=i^post24, Irp^0'=Irp^post24, b2929^0'=b2929^post24, __rho_56_^0'=__rho_56_^post24, k3^0'=k3^post24, __rho_13_^0'=__rho_13_^post24, i___04040^0'=i___04040^post24, a1818^0'=a1818^post24, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post24, __rho_99_^0'=__rho_99_^post24, a77^0'=a77^post24, a3434^0'=a3434^post24, i___099^0'=i___099^post24, __rho_10_^0'=__rho_10_^post24, (0 == 0 /\ Irp^0-Irp^post24 == 0 /\ __rho_56_^0-__rho_56_^post24 == 0 /\ __rho_6_^0-__rho_6_^post24 == 0 /\ b22^0-b22^post24 == 0 /\ a3838^0-a3838^post24 == 0 /\ -a3434^post24+a3434^0 == 0 /\ b2626^0-b2626^post24 == 0 /\ -a3737^post24+a3737^0 == 0 /\ -__rho_3_^post24+CromData^post24 == 0 /\ IsochDetachData^0-IsochDetachData^post24 == 0 /\ -__rho_99_^post24+__rho_99_^0 == 0 /\ __rho_1_^0-__rho_1_^post24 == 0 /\ b3535^0-b3535^post24 == 0 /\ -__rho_4_^post24+__rho_4_^0 == 0 /\ i___01717^0-i___01717^post24 == 0 /\ -__rho_13_^post24+__rho_13_^0 == 0 /\ 1+k1^post24-k1^0 == 0 /\ b3333^0-b3333^post24 == 0 /\ i___02424^0-i___02424^post24 == 0 /\ -k4^post24+k4^0 == 0 /\ -a4444^post24+a4444^0 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post24+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ -k3^post24+k3^0 == 0 /\ -a3131^post24+a3131^0 == 0 /\ keR^0-keR^post24 == 0 /\ a3232^0-a3232^post24 == 0 /\ __rho_5_^0-__rho_5_^post24 == 0 /\ -ret_ExAllocatePool3030^post24+ret_ExAllocatePool3030^0 == 0 /\ -__rho_11_^post24+__rho_11_^0 == 0 /\ -i___099^post24+i___099^0 == 0 /\ -a4343^post24+a4343^0 == 0 /\ -__rho_7_^post24+__rho_7_^0 == 0 /\ -a2525^post24+a2525^0 == 0 /\ k2^0-k2^post24 == 0 /\ i___04646^0-i___04646^post24 == 0 /\ ntStatus^0-ntStatus^post24 == 0 /\ -pIrb^post24+pIrb^0 == 0 /\ IsochResourceData^0-IsochResourceData^post24 == 0 /\ k5^0-k5^post24 == 0 /\ -i___02020^post24+i___02020^0 == 0 /\ a2828^0-a2828^post24 == 0 /\ __rho_8_^0-__rho_8_^post24 == 0 /\ -AsyncAddressData^post24+AsyncAddressData^0 == 0 /\ 1-k1^0 <= 0 /\ -b2929^post24+b2929^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post24 == 0 /\ -__rho_9_^post24+__rho_9_^0 == 0 /\ ResourceIrp^0-ResourceIrp^post24 == 0 /\ -i___01313^post24+i___01313^0 == 0 /\ __rho_2_^0-__rho_2_^post24 == 0 /\ keA^0-keA^post24 == 0 /\ -a77^post24+a77^0 == 0 /\ -a1818^post24+a1818^0 == 0 /\ -i^post24+i^0 == 0 /\ ret_IoAllocateIrp2727^0-ret_IoAllocateIrp2727^post24 == 0 /\ a11^0-a11^post24 == 0 /\ Irql^0-Irql^post24 == 0 /\ ret_IoSetDeviceInterfaceState44^0-ret_IoSetDeviceInterfaceState44^post24 == 0 /\ -__rho_10_^post24+__rho_10_^0 == 0 /\ -i___04040^post24+i___04040^0 == 0 /\ __rho_12_^0-__rho_12_^post24 == 0), cost: 1
  25: l8 -> l1 : i___01717^0'=i___01717^post25, IsochDetachData^0'=IsochDetachData^post25, ntStatus^0'=ntStatus^post25, __rho_6_^0'=__rho_6_^post25, k5^0'=k5^post25, __rho_2_^0'=__rho_2_^post25, a3838^0'=a3838^post25, a2828^0'=a2828^post25, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post25, b3535^0'=b3535^post25, CromData^0'=CromData^post25, b2626^0'=b2626^post25, __rho_4_^0'=__rho_4_^post25, k2^0'=k2^post25, __rho_12_^0'=__rho_12_^post25, i___02424^0'=i___02424^post25, a11^0'=a11^post25, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post25, __rho_8_^0'=__rho_8_^post25, keR^0'=keR^post25, a4444^0'=a4444^post25, a3232^0'=a3232^post25, ResourceIrp^0'=ResourceIrp^post25, i___01313^0'=i___01313^post25, Irql^0'=Irql^post25, b3333^0'=b3333^post25, __rho_5_^0'=__rho_5_^post25, k4^0'=k4^post25, __rho_1_^0'=__rho_1_^post25, i___04646^0'=i___04646^post25, a2525^0'=a2525^post25, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post25, __rho_9_^0'=__rho_9_^post25, AsyncAddressData^0'=AsyncAddressData^post25, b22^0'=b22^post25, a3737^0'=a3737^post25, k1^0'=k1^post25, __rho_11_^0'=__rho_11_^post25, i___02020^0'=i___02020^post25, IsochResourceData^0'=IsochResourceData^post25, pIrb^0'=pIrb^post25, __rho_7_^0'=__rho_7_^post25, keA^0'=keA^post25, __rho_3_^0'=__rho_3_^post25, a4343^0'=a4343^post25, a3131^0'=a3131^post25, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post25, i^0'=i^post25, Irp^0'=Irp^post25, b2929^0'=b2929^post25, __rho_56_^0'=__rho_56_^post25, k3^0'=k3^post25, __rho_13_^0'=__rho_13_^post25, i___04040^0'=i___04040^post25, a1818^0'=a1818^post25, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post25, __rho_99_^0'=__rho_99_^post25, a77^0'=a77^post25, a3434^0'=a3434^post25, i___099^0'=i___099^post25, __rho_10_^0'=__rho_10_^post25, (0 == 0 /\ __rho_9_^0-__rho_9_^post25 == 0 /\ a11^0-a11^post25 == 0 /\ -b2929^post25+b2929^0 == 0 /\ keR^210 == 0 /\ -__rho_11_^post25+__rho_11_^0 == 0 /\ a3838^0-a3838^post25 == 0 /\ k5^0-k5^post25 == 0 /\ -a77^post25+a77^0 == 0 /\ -k4^post25+k4^0 == 0 /\ -i___04040^post25+i___04040^0 == 0 /\ -__rho_10_^post25+__rho_10_^0 == 0 /\ -Irp^post25+Irp^0 == 0 /\ i___01717^0-i___01717^post25 == 0 /\ IsochResourceData^0-IsochResourceData^post25 == 0 /\ __rho_1_^0-__rho_1_^post25 == 0 /\ -1+keA^12 == 0 /\ -k1^post25+k1^0 == 0 /\ k2^post25-__rho_6_^post25 == 0 /\ -a1818^post25+a1818^0 == 0 /\ -__rho_12_^post25+__rho_12_^0 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post25+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ __rho_8_^0-__rho_8_^post25 == 0 /\ -a3131^post25+a3131^0 == 0 /\ -1+keR^110 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post25 == 0 /\ i^0-i^post25 == 0 /\ i___02424^0-i___02424^post25 == 0 /\ -a3434^post25+a3434^0 == 0 /\ -__rho_13_^post25+__rho_13_^0 == 0 /\ b2626^0-b2626^post25 == 0 /\ a3232^0-a3232^post25 == 0 /\ -i___01313^post25+i___01313^0 == 0 /\ -1+keR^310 == 0 /\ keA^post25 == 0 /\ __rho_3_^0-__rho_3_^post25 == 0 /\ k1^0 <= 0 /\ -__rho_5_^post25+__rho_5_^0 == 0 /\ a4343^0-a4343^post25 == 0 /\ __rho_2_^0-__rho_2_^post25 == 0 /\ a2828^0-a2828^post25 == 0 /\ CromData^0-CromData^post25 == 0 /\ -k3^post25+k3^0 == 0 /\ i___04646^0-i___04646^post25 == 0 /\ b22^0-b22^post25 == 0 /\ -__rho_56_^post25+__rho_56_^0 == 0 /\ ResourceIrp^0-ResourceIrp^post25 == 0 /\ -__rho_7_^post25+__rho_7_^0 == 0 /\ -ret_IoAllocateIrp2727^post25+ret_IoAllocateIrp2727^0 == 0 /\ b3535^0-b3535^post25 == 0 /\ keR^post25 == 0 /\ a4444^0-a4444^post25 == 0 /\ -ret_IoSetDeviceInterfaceState44^post25+ret_IoSetDeviceInterfaceState44^0 == 0 /\ -a2525^post25+a2525^0 == 0 /\ -IsochDetachData^post25+IsochDetachData^0 == 0 /\ -a3737^post25+a3737^0 == 0 /\ -Irql^0+i___099^post25 == 0 /\ -1+keA^320 == 0 /\ -__rho_99_^post25+__rho_99_^0 == 0 /\ -pIrb^post25+pIrb^0 == 0 /\ -b3333^post25+b3333^0 == 0 /\ AsyncAddressData^0-AsyncAddressData^post25 == 0 /\ -i___02020^post25+i___02020^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post25 == 0 /\ keA^220 == 0 /\ ntStatus^0-ntStatus^post25 == 0 /\ Irql^0-Irql^post25 == 0 /\ -__rho_4_^post25+__rho_4_^0 == 0), cost: 1
  11: l9 -> l6 : i___01717^0'=i___01717^post11, IsochDetachData^0'=IsochDetachData^post11, ntStatus^0'=ntStatus^post11, __rho_6_^0'=__rho_6_^post11, k5^0'=k5^post11, __rho_2_^0'=__rho_2_^post11, a3838^0'=a3838^post11, a2828^0'=a2828^post11, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post11, b3535^0'=b3535^post11, CromData^0'=CromData^post11, b2626^0'=b2626^post11, __rho_4_^0'=__rho_4_^post11, k2^0'=k2^post11, __rho_12_^0'=__rho_12_^post11, i___02424^0'=i___02424^post11, a11^0'=a11^post11, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post11, __rho_8_^0'=__rho_8_^post11, keR^0'=keR^post11, a4444^0'=a4444^post11, a3232^0'=a3232^post11, ResourceIrp^0'=ResourceIrp^post11, i___01313^0'=i___01313^post11, Irql^0'=Irql^post11, b3333^0'=b3333^post11, __rho_5_^0'=__rho_5_^post11, k4^0'=k4^post11, __rho_1_^0'=__rho_1_^post11, i___04646^0'=i___04646^post11, a2525^0'=a2525^post11, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post11, __rho_9_^0'=__rho_9_^post11, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=b22^post11, a3737^0'=a3737^post11, k1^0'=k1^post11, __rho_11_^0'=__rho_11_^post11, i___02020^0'=i___02020^post11, IsochResourceData^0'=IsochResourceData^post11, pIrb^0'=pIrb^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=keA^post11, __rho_3_^0'=__rho_3_^post11, a4343^0'=a4343^post11, a3131^0'=a3131^post11, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post11, i^0'=i^post11, Irp^0'=Irp^post11, b2929^0'=b2929^post11, __rho_56_^0'=__rho_56_^post11, k3^0'=k3^post11, __rho_13_^0'=__rho_13_^post11, i___04040^0'=i___04040^post11, a1818^0'=a1818^post11, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post11, __rho_99_^0'=__rho_99_^post11, a77^0'=a77^post11, a3434^0'=a3434^post11, i___099^0'=i___099^post11, __rho_10_^0'=__rho_10_^post11, (0 == 0 /\ ResourceIrp^0-ResourceIrp^post11 == 0 /\ a2525^0-a2525^post11 == 0 /\ -a77^post11+a77^0 == 0 /\ IsochDetachData^0-IsochDetachData^post11 == 0 /\ a3232^0-a3232^post11 == 0 /\ -IsochResourceData^post11+IsochResourceData^0 == 0 /\ -a1818^post11+a1818^0 == 0 /\ __rho_13_^0-__rho_13_^post11 == 0 /\ -__rho_3_^post11+__rho_3_^0 == 0 /\ -__rho_10_^post11+__rho_10_^0 == 0 /\ a11^0-a11^post11 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post11+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ __rho_6_^0-__rho_6_^post11 == 0 /\ -b22^post11+b22^0 == 0 /\ -k3^post11+k3^0 == 0 /\ -a3434^post11+a3434^0 == 0 /\ b3535^0-b3535^post11 == 0 /\ 1+k2^post11-k2^0 == 0 /\ k5^0-k5^post11 == 0 /\ -ret_IoAllocateIrp2727^post11+ret_IoAllocateIrp2727^0 == 0 /\ b2929^0-b2929^post11 == 0 /\ __rho_11_^0-__rho_11_^post11 == 0 /\ ret_IoSetDeviceInterfaceState44^0-ret_IoSetDeviceInterfaceState44^post11 == 0 /\ -i___02424^post11+i___02424^0 == 0 /\ ntStatus^0-ntStatus^post11 == 0 /\ -a3131^post11+a3131^0 == 0 /\ k1^0-k1^post11 == 0 /\ a2828^0-a2828^post11 == 0 /\ 1-k2^0 <= 0 /\ -__rho_56_^post11+__rho_56_^0 == 0 /\ -__rho_99_^post11+__rho_99_^0 == 0 /\ -i___099^post11+i___099^0 == 0 /\ -i^post11+i^0 == 0 /\ -__rho_1_^post11+__rho_1_^0 == 0 /\ __rho_5_^0-__rho_5_^post11 == 0 /\ -ret_t1394Diag_PnpStopDevice33^post11+ret_t1394Diag_PnpStopDevice33^0 == 0 /\ i___02020^0-i___02020^post11 == 0 /\ __rho_12_^0-__rho_12_^post11 == 0 /\ -__rho_8_^post11+__rho_8_^0 == 0 /\ -i___04040^post11+i___04040^0 == 0 /\ -a4343^post11+a4343^0 == 0 /\ a4444^0-a4444^post11 == 0 /\ a3838^0-a3838^post11 == 0 /\ b2626^0-b2626^post11 == 0 /\ i___01313^0-i___01313^post11 == 0 /\ keR^0-keR^post11 == 0 /\ -i___04646^post11+i___04646^0 == 0 /\ i___01717^0-i___01717^post11 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post11 == 0 /\ CromData^0-CromData^post11 == 0 /\ k4^0-k4^post11 == 0 /\ __rho_4_^0-__rho_4_^post11 == 0 /\ -keA^post11+keA^0 == 0 /\ -b3333^post11+b3333^0 == 0 /\ __rho_2_^0-__rho_2_^post11 == 0 /\ -pIrb^post11+pIrb^0 == 0 /\ -Irp^post11+Irp^0 == 0 /\ -a3737^post11+a3737^0 == 0 /\ -__rho_9_^post11+__rho_9_^0 == 0 /\ Irql^0-Irql^post11 == 0), cost: 1
  12: l9 -> l10 : i___01717^0'=i___01717^post12, IsochDetachData^0'=IsochDetachData^post12, ntStatus^0'=ntStatus^post12, __rho_6_^0'=__rho_6_^post12, k5^0'=k5^post12, __rho_2_^0'=__rho_2_^post12, a3838^0'=a3838^post12, a2828^0'=a2828^post12, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post12, b3535^0'=b3535^post12, CromData^0'=CromData^post12, b2626^0'=b2626^post12, __rho_4_^0'=__rho_4_^post12, k2^0'=k2^post12, __rho_12_^0'=__rho_12_^post12, i___02424^0'=i___02424^post12, a11^0'=a11^post12, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post12, __rho_8_^0'=__rho_8_^post12, keR^0'=keR^post12, a4444^0'=a4444^post12, a3232^0'=a3232^post12, ResourceIrp^0'=ResourceIrp^post12, i___01313^0'=i___01313^post12, Irql^0'=Irql^post12, b3333^0'=b3333^post12, __rho_5_^0'=__rho_5_^post12, k4^0'=k4^post12, __rho_1_^0'=__rho_1_^post12, i___04646^0'=i___04646^post12, a2525^0'=a2525^post12, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post12, __rho_9_^0'=__rho_9_^post12, AsyncAddressData^0'=AsyncAddressData^post12, b22^0'=b22^post12, a3737^0'=a3737^post12, k1^0'=k1^post12, __rho_11_^0'=__rho_11_^post12, i___02020^0'=i___02020^post12, IsochResourceData^0'=IsochResourceData^post12, pIrb^0'=pIrb^post12, __rho_7_^0'=__rho_7_^post12, keA^0'=keA^post12, __rho_3_^0'=__rho_3_^post12, a4343^0'=a4343^post12, a3131^0'=a3131^post12, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post12, i^0'=i^post12, Irp^0'=Irp^post12, b2929^0'=b2929^post12, __rho_56_^0'=__rho_56_^post12, k3^0'=k3^post12, __rho_13_^0'=__rho_13_^post12, i___04040^0'=i___04040^post12, a1818^0'=a1818^post12, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post12, __rho_99_^0'=__rho_99_^post12, a77^0'=a77^post12, a3434^0'=a3434^post12, i___099^0'=i___099^post12, __rho_10_^0'=__rho_10_^post12, (-i___02424^post12+i___02424^0 == 0 /\ __rho_11_^0-__rho_11_^post12 == 0 /\ a3131^0-a3131^post12 == 0 /\ i^0-i^post12 == 0 /\ -a3232^post12+a3232^0 == 0 /\ k3^0-k3^post12 == 0 /\ -b3333^post12+b3333^0 == 0 /\ -1+keR^10 == 0 /\ -i___02020^post12+i___02020^0 == 0 /\ __rho_4_^0-__rho_4_^post12 == 0 /\ -a77^post12+a77^0 == 0 /\ -__rho_8_^post12+__rho_8_^0 == 0 /\ -keA^post12+keA^0 == 0 /\ k2^0 <= 0 /\ -IsochResourceData^post12+IsochResourceData^0 == 0 /\ Irp^0-Irp^post12 == 0 /\ -i___04040^post12+i___04040^0 == 0 /\ b3535^0-b3535^post12 == 0 /\ a3737^0-a3737^post12 == 0 /\ keR^post12 == 0 /\ -1+keR^30 == 0 /\ k5^0-k5^post12 == 0 /\ -__rho_10_^post12+__rho_10_^0 == 0 /\ ntStatus^0-ntStatus^post12 == 0 /\ -a1818^post12+a1818^0 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post12+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ -__rho_1_^post12+__rho_1_^0 == 0 /\ -a3434^post12+a3434^0 == 0 /\ IsochDetachData^0-IsochDetachData^post12 == 0 /\ -b2929^post12+b2929^0 == 0 /\ __rho_2_^0-__rho_2_^post12 == 0 /\ -k1^post12+k1^0 == 0 /\ -a11^post12+a11^0 == 0 /\ -k2^post12+k2^0 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post12 == 0 /\ __rho_9_^0-__rho_9_^post12 == 0 /\ -ret_IoAllocateIrp2727^post12+ret_IoAllocateIrp2727^0 == 0 /\ -__rho_56_^post12+__rho_56_^0 == 0 /\ -__rho_13_^post12+__rho_13_^0 == 0 /\ keR^20 == 0 /\ -i___04646^post12+i___04646^0 == 0 /\ Irql^0-Irql^post12 == 0 /\ a3838^0-a3838^post12 == 0 /\ a4444^0-a4444^post12 == 0 /\ b2626^0-b2626^post12 == 0 /\ -b22^post12+b22^0 == 0 /\ a2525^0-a2525^post12 == 0 /\ -a4343^post12+a4343^0 == 0 /\ a2828^0-a2828^post12 == 0 /\ -__rho_5_^post12+__rho_5_^0 == 0 /\ -__rho_7_^post12+__rho_7_^0 == 0 /\ i___01717^0-i___01717^post12 == 0 /\ -__rho_6_^post12+__rho_6_^0 == 0 /\ __rho_12_^0-__rho_12_^post12 == 0 /\ -i___099^post12+i___099^0 == 0 /\ CromData^0-CromData^post12 == 0 /\ k4^0-k4^post12 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post12 == 0 /\ -__rho_99_^post12+__rho_99_^0 == 0 /\ AsyncAddressData^0-AsyncAddressData^post12 == 0 /\ -ret_IoSetDeviceInterfaceState44^post12+ret_IoSetDeviceInterfaceState44^0 == 0 /\ __rho_3_^0-__rho_3_^post12 == 0 /\ pIrb^0-pIrb^post12 == 0 /\ -Irql^0+i___01313^post12 == 0 /\ ResourceIrp^0-ResourceIrp^post12 == 0), cost: 1
  14: l10 -> l11 : i___01717^0'=i___01717^post14, IsochDetachData^0'=IsochDetachData^post14, ntStatus^0'=ntStatus^post14, __rho_6_^0'=__rho_6_^post14, k5^0'=k5^post14, __rho_2_^0'=__rho_2_^post14, a3838^0'=a3838^post14, a2828^0'=a2828^post14, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post14, b3535^0'=b3535^post14, CromData^0'=CromData^post14, b2626^0'=b2626^post14, __rho_4_^0'=__rho_4_^post14, k2^0'=k2^post14, __rho_12_^0'=__rho_12_^post14, i___02424^0'=i___02424^post14, a11^0'=a11^post14, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post14, __rho_8_^0'=__rho_8_^post14, keR^0'=keR^post14, a4444^0'=a4444^post14, a3232^0'=a3232^post14, ResourceIrp^0'=ResourceIrp^post14, i___01313^0'=i___01313^post14, Irql^0'=Irql^post14, b3333^0'=b3333^post14, __rho_5_^0'=__rho_5_^post14, k4^0'=k4^post14, __rho_1_^0'=__rho_1_^post14, i___04646^0'=i___04646^post14, a2525^0'=a2525^post14, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post14, __rho_9_^0'=__rho_9_^post14, AsyncAddressData^0'=AsyncAddressData^post14, b22^0'=b22^post14, a3737^0'=a3737^post14, k1^0'=k1^post14, __rho_11_^0'=__rho_11_^post14, i___02020^0'=i___02020^post14, IsochResourceData^0'=IsochResourceData^post14, pIrb^0'=pIrb^post14, __rho_7_^0'=__rho_7_^post14, keA^0'=keA^post14, __rho_3_^0'=__rho_3_^post14, a4343^0'=a4343^post14, a3131^0'=a3131^post14, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post14, i^0'=i^post14, Irp^0'=Irp^post14, b2929^0'=b2929^post14, __rho_56_^0'=__rho_56_^post14, k3^0'=k3^post14, __rho_13_^0'=__rho_13_^post14, i___04040^0'=i___04040^post14, a1818^0'=a1818^post14, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post14, __rho_99_^0'=__rho_99_^post14, a77^0'=a77^post14, a3434^0'=a3434^post14, i___099^0'=i___099^post14, __rho_10_^0'=__rho_10_^post14, (0 == 0 /\ -pIrb^post14+pIrb^0 == 0 /\ -1+keA^10 == 0 /\ __rho_12_^0-__rho_12_^post14 == 0 /\ -a1818^post14+a1818^0 == 0 /\ __rho_6_^0-__rho_6_^post14 == 0 /\ -a3131^post14+a3131^0 == 0 /\ -__rho_56_^post14+__rho_56_^0 == 0 /\ ntStatus^0-ntStatus^post14 == 0 /\ IsochDetachData^0-IsochDetachData^post14 == 0 /\ -i^post14+i^0 == 0 /\ keA^post14 == 0 /\ __rho_13_^0-__rho_13_^post14 == 0 /\ Irql^0-Irql^post14 == 0 /\ __rho_8_^0-__rho_8_^post14 == 0 /\ -IsochResourceData^post14+IsochResourceData^0 == 0 /\ -__rho_1_^post14+__rho_1_^0 == 0 /\ keR^0-keR^post14 == 0 /\ -i___099^post14+i___099^0 == 0 /\ k1^0-k1^post14 == 0 /\ -1+keA^30 == 0 /\ a11^0-a11^post14 == 0 /\ i___02424^0-i___02424^post14 == 0 /\ i___01717^0-i___01717^post14 == 0 /\ -i___04040^post14+i___04040^0 == 0 /\ a3232^0-a3232^post14 == 0 /\ -__rho_3_^post14+__rho_3_^0 == 0 /\ b3333^0-b3333^post14 == 0 /\ -__rho_9_^post14+__rho_9_^0 == 0 /\ -AsyncAddressData^post14+AsyncAddressData^0 == 0 /\ -i___04646^post14+i___04646^0 == 0 /\ -b2929^post14+b2929^0 == 0 /\ -CromData^post14+CromData^0 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post14+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ -ret_IoAllocateIrp2727^post14+ret_IoAllocateIrp2727^0 == 0 /\ __rho_11_^0-__rho_11_^post14 == 0 /\ -a3737^post14+a3737^0 == 0 /\ -a4343^post14+a4343^0 == 0 /\ a3838^0-a3838^post14 == 0 /\ __rho_5_^0-__rho_5_^post14 == 0 /\ -a77^post14+a77^0 == 0 /\ a2828^0-a2828^post14 == 0 /\ k5^0-k5^post14 == 0 /\ k2^0-k2^post14 == 0 /\ -i___01313^post14+i___01313^0 == 0 /\ ResourceIrp^0-ResourceIrp^post14 == 0 /\ __rho_99_^0-__rho_99_^post14 == 0 /\ -Irp^post14+Irp^0 == 0 /\ -__rho_2_^post14+__rho_2_^0 == 0 /\ i___02020^0-i___02020^post14 == 0 /\ k4^0-k4^post14 == 0 /\ -__rho_4_^post14+__rho_4_^0 == 0 /\ -ret_IoSetDeviceInterfaceState44^post14+ret_IoSetDeviceInterfaceState44^0 == 0 /\ -__rho_10_^post14+k3^post14 == 0 /\ -a4444^post14+a4444^0 == 0 /\ -a2525^post14+a2525^0 == 0 /\ b2626^0-b2626^post14 == 0 /\ -b22^post14+b22^0 == 0 /\ __rho_7_^0-__rho_7_^post14 == 0 /\ keA^20 == 0 /\ -a3434^post14+a3434^0 == 0 /\ -b3535^post14+b3535^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post14 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post14 == 0), cost: 1
  48: l11 -> l15 : i___01717^0'=i___01717^post48, IsochDetachData^0'=IsochDetachData^post48, ntStatus^0'=ntStatus^post48, __rho_6_^0'=__rho_6_^post48, k5^0'=k5^post48, __rho_2_^0'=__rho_2_^post48, a3838^0'=a3838^post48, a2828^0'=a2828^post48, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post48, b3535^0'=b3535^post48, CromData^0'=CromData^post48, b2626^0'=b2626^post48, __rho_4_^0'=__rho_4_^post48, k2^0'=k2^post48, __rho_12_^0'=__rho_12_^post48, i___02424^0'=i___02424^post48, a11^0'=a11^post48, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post48, __rho_8_^0'=__rho_8_^post48, keR^0'=keR^post48, a4444^0'=a4444^post48, a3232^0'=a3232^post48, ResourceIrp^0'=ResourceIrp^post48, i___01313^0'=i___01313^post48, Irql^0'=Irql^post48, b3333^0'=b3333^post48, __rho_5_^0'=__rho_5_^post48, k4^0'=k4^post48, __rho_1_^0'=__rho_1_^post48, i___04646^0'=i___04646^post48, a2525^0'=a2525^post48, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post48, __rho_9_^0'=__rho_9_^post48, AsyncAddressData^0'=AsyncAddressData^post48, b22^0'=b22^post48, a3737^0'=a3737^post48, k1^0'=k1^post48, __rho_11_^0'=__rho_11_^post48, i___02020^0'=i___02020^post48, IsochResourceData^0'=IsochResourceData^post48, pIrb^0'=pIrb^post48, __rho_7_^0'=__rho_7_^post48, keA^0'=keA^post48, __rho_3_^0'=__rho_3_^post48, a4343^0'=a4343^post48, a3131^0'=a3131^post48, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post48, i^0'=i^post48, Irp^0'=Irp^post48, b2929^0'=b2929^post48, __rho_56_^0'=__rho_56_^post48, k3^0'=k3^post48, __rho_13_^0'=__rho_13_^post48, i___04040^0'=i___04040^post48, a1818^0'=a1818^post48, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post48, __rho_99_^0'=__rho_99_^post48, a77^0'=a77^post48, a3434^0'=a3434^post48, i___099^0'=i___099^post48, __rho_10_^0'=__rho_10_^post48, (0 == 0 /\ a3838^0-a3838^post48 == 0 /\ i^0-i^post48 == 0 /\ keR^250 == 0 /\ __rho_56_^0-__rho_56_^post48 == 0 /\ i___04646^0-i___04646^post48 == 0 /\ -a77^post48+a77^0 == 0 /\ -keA^post48+keA^0 == 0 /\ a3737^0-a3737^post48 == 0 /\ -__rho_99_^post48+__rho_99_^0 == 0 /\ -i___04040^post48+i___04040^0 == 0 /\ -__rho_11_^post48+k4^post48 == 0 /\ -1+keR^122 == 0 /\ -b2626^post48+b2626^0 == 0 /\ __rho_3_^0-__rho_3_^post48 == 0 /\ -__rho_5_^post48+__rho_5_^0 == 0 /\ a2828^0-a2828^post48 == 0 /\ k5^0-k5^post48 == 0 /\ -a11^post48+a11^0 == 0 /\ -a3131^post48+a3131^0 == 0 /\ -a3434^post48+a3434^0 == 0 /\ __rho_8_^0-__rho_8_^post48 == 0 /\ keR^post48 == 0 /\ i___01313^0-i___01313^post48 == 0 /\ __rho_2_^0-__rho_2_^post48 == 0 /\ -Irql^post48+Irql^0 == 0 /\ -1+keR^350 == 0 /\ -b3333^post48+b3333^0 == 0 /\ -i___099^post48+i___099^0 == 0 /\ __rho_4_^0-__rho_4_^post48 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post48 == 0 /\ -AsyncAddressData^post48+AsyncAddressData^0 == 0 /\ -b2929^post48+b2929^0 == 0 /\ -a1818^post48+a1818^0 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post48+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ -ResourceIrp^post48+ResourceIrp^0 == 0 /\ a4444^0-a4444^post48 == 0 /\ -i___02424^post48+i___02424^0 == 0 /\ __rho_6_^0-__rho_6_^post48 == 0 /\ -IsochResourceData^post48+IsochResourceData^0 == 0 /\ ntStatus^0-ntStatus^post48 == 0 /\ -ret_IoSetDeviceInterfaceState44^post48+ret_IoSetDeviceInterfaceState44^0 == 0 /\ i___02020^post48-Irql^0 == 0 /\ -__rho_1_^post48+__rho_1_^0 == 0 /\ a2525^0-a2525^post48 == 0 /\ -a3232^post48+a3232^0 == 0 /\ -__rho_13_^post48+__rho_13_^0 == 0 /\ b3535^0-b3535^post48 == 0 /\ -__rho_10_^post48+__rho_10_^0 == 0 /\ k2^0-k2^post48 == 0 /\ IsochDetachData^0-IsochDetachData^post48 == 0 /\ -Irp^post48+Irp^0 == 0 /\ -k1^post48+k1^0 == 0 /\ pIrb^0-pIrb^post48 == 0 /\ -k3^post48+k3^0 == 0 /\ -a4343^post48+a4343^0 == 0 /\ k3^0 <= 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post48 == 0 /\ -__rho_7_^post48+__rho_7_^0 == 0 /\ b22^0-b22^post48 == 0 /\ __rho_12_^0-__rho_12_^post48 == 0 /\ __rho_9_^0-__rho_9_^post48 == 0 /\ CromData^0-CromData^post48 == 0 /\ ret_IoAllocateIrp2727^0-ret_IoAllocateIrp2727^post48 == 0 /\ i___01717^0-i___01717^post48 == 0), cost: 1
  49: l11 -> l10 : i___01717^0'=i___01717^post49, IsochDetachData^0'=IsochDetachData^post49, ntStatus^0'=ntStatus^post49, __rho_6_^0'=__rho_6_^post49, k5^0'=k5^post49, __rho_2_^0'=__rho_2_^post49, a3838^0'=a3838^post49, a2828^0'=a2828^post49, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post49, b3535^0'=b3535^post49, CromData^0'=CromData^post49, b2626^0'=b2626^post49, __rho_4_^0'=__rho_4_^post49, k2^0'=k2^post49, __rho_12_^0'=__rho_12_^post49, i___02424^0'=i___02424^post49, a11^0'=a11^post49, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post49, __rho_8_^0'=__rho_8_^post49, keR^0'=keR^post49, a4444^0'=a4444^post49, a3232^0'=a3232^post49, ResourceIrp^0'=ResourceIrp^post49, i___01313^0'=i___01313^post49, Irql^0'=Irql^post49, b3333^0'=b3333^post49, __rho_5_^0'=__rho_5_^post49, k4^0'=k4^post49, __rho_1_^0'=__rho_1_^post49, i___04646^0'=i___04646^post49, a2525^0'=a2525^post49, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post49, __rho_9_^0'=__rho_9_^post49, AsyncAddressData^0'=AsyncAddressData^post49, b22^0'=b22^post49, a3737^0'=a3737^post49, k1^0'=k1^post49, __rho_11_^0'=__rho_11_^post49, i___02020^0'=i___02020^post49, IsochResourceData^0'=IsochResourceData^post49, pIrb^0'=pIrb^post49, __rho_7_^0'=__rho_7_^post49, keA^0'=keA^post49, __rho_3_^0'=__rho_3_^post49, a4343^0'=a4343^post49, a3131^0'=a3131^post49, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post49, i^0'=i^post49, Irp^0'=Irp^post49, b2929^0'=b2929^post49, __rho_56_^0'=__rho_56_^post49, k3^0'=k3^post49, __rho_13_^0'=__rho_13_^post49, i___04040^0'=i___04040^post49, a1818^0'=a1818^post49, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post49, __rho_99_^0'=__rho_99_^post49, a77^0'=a77^post49, a3434^0'=a3434^post49, i___099^0'=i___099^post49, __rho_10_^0'=__rho_10_^post49, (0 == 0 /\ a1818^post49-IsochDetachData^post49 == 0 /\ -a77^post49+a77^0 == 0 /\ -__rho_12_^post49+__rho_12_^0 == 0 /\ keR^post49 == 0 /\ -IsochResourceData^post49+IsochResourceData^0 == 0 /\ __rho_1_^0-__rho_1_^post49 == 0 /\ k5^0-k5^post49 == 0 /\ -i___04646^post49+i___04646^0 == 0 /\ -a4444^post49+a4444^0 == 0 /\ k2^0-k2^post49 == 0 /\ -ret_IoAllocateIrp2727^post49+ret_IoAllocateIrp2727^0 == 0 /\ -Irql^0+i___01717^post49 == 0 /\ -i___099^post49+i___099^0 == 0 /\ -b22^post49+b22^0 == 0 /\ a11^0-a11^post49 == 0 /\ -a3232^post49+a3232^0 == 0 /\ -b2929^post49+b2929^0 == 0 /\ __rho_7_^0-__rho_7_^post49 == 0 /\ -a2525^post49+a2525^0 == 0 /\ 1-k3^0 <= 0 /\ -a3434^post49+a3434^0 == 0 /\ __rho_9_^0-__rho_9_^post49 == 0 /\ a2828^0-a2828^post49 == 0 /\ a3838^0-a3838^post49 == 0 /\ __rho_5_^0-__rho_5_^post49 == 0 /\ -1+keR^130 == 0 /\ -__rho_99_^post49+__rho_99_^0 == 0 /\ b2626^0-b2626^post49 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post49+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ AsyncAddressData^0-AsyncAddressData^post49 == 0 /\ -i___04040^post49+i___04040^0 == 0 /\ ntStatus^0-ntStatus^post49 == 0 /\ -ResourceIrp^post49+ResourceIrp^0 == 0 /\ -__rho_56_^post49+__rho_56_^0 == 0 /\ i___02424^0-i___02424^post49 == 0 /\ a3131^0-a3131^post49 == 0 /\ -pIrb^post49+pIrb^0 == 0 /\ -ret_t1394Diag_PnpStopDevice33^post49+ret_t1394Diag_PnpStopDevice33^0 == 0 /\ b3535^0-b3535^post49 == 0 /\ -__rho_11_^post49+__rho_11_^0 == 0 /\ -k4^post49+k4^0 == 0 /\ -keA^post49+keA^0 == 0 /\ -1+keR^360 == 0 /\ i___02020^0-i___02020^post49 == 0 /\ -__rho_13_^post49+__rho_13_^0 == 0 /\ 1+k3^post49-k3^0 == 0 /\ b3333^0-b3333^post49 == 0 /\ -Irp^post49+Irp^0 == 0 /\ k1^0-k1^post49 == 0 /\ __rho_2_^0-__rho_2_^post49 == 0 /\ -__rho_10_^post49+__rho_10_^0 == 0 /\ i___01313^0-i___01313^post49 == 0 /\ __rho_8_^0-__rho_8_^post49 == 0 /\ ret_IoSetDeviceInterfaceState44^0-ret_IoSetDeviceInterfaceState44^post49 == 0 /\ CromData^0-CromData^post49 == 0 /\ -__rho_3_^post49+__rho_3_^0 == 0 /\ Irql^0-Irql^post49 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post49 == 0 /\ keR^260 == 0 /\ __rho_6_^0-__rho_6_^post49 == 0 /\ __rho_4_^0-__rho_4_^post49 == 0 /\ a4343^0-a4343^post49 == 0 /\ -a3737^post49+a3737^0 == 0), cost: 1
  15: l12 -> l7 : i___01717^0'=i___01717^post15, IsochDetachData^0'=IsochDetachData^post15, ntStatus^0'=ntStatus^post15, __rho_6_^0'=__rho_6_^post15, k5^0'=k5^post15, __rho_2_^0'=__rho_2_^post15, a3838^0'=a3838^post15, a2828^0'=a2828^post15, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post15, b3535^0'=b3535^post15, CromData^0'=CromData^post15, b2626^0'=b2626^post15, __rho_4_^0'=__rho_4_^post15, k2^0'=k2^post15, __rho_12_^0'=__rho_12_^post15, i___02424^0'=i___02424^post15, a11^0'=a11^post15, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post15, __rho_8_^0'=__rho_8_^post15, keR^0'=keR^post15, a4444^0'=a4444^post15, a3232^0'=a3232^post15, ResourceIrp^0'=ResourceIrp^post15, i___01313^0'=i___01313^post15, Irql^0'=Irql^post15, b3333^0'=b3333^post15, __rho_5_^0'=__rho_5_^post15, k4^0'=k4^post15, __rho_1_^0'=__rho_1_^post15, i___04646^0'=i___04646^post15, a2525^0'=a2525^post15, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post15, __rho_9_^0'=__rho_9_^post15, AsyncAddressData^0'=AsyncAddressData^post15, b22^0'=b22^post15, a3737^0'=a3737^post15, k1^0'=k1^post15, __rho_11_^0'=__rho_11_^post15, i___02020^0'=i___02020^post15, IsochResourceData^0'=IsochResourceData^post15, pIrb^0'=pIrb^post15, __rho_7_^0'=__rho_7_^post15, keA^0'=keA^post15, __rho_3_^0'=__rho_3_^post15, a4343^0'=a4343^post15, a3131^0'=a3131^post15, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post15, i^0'=i^post15, Irp^0'=Irp^post15, b2929^0'=b2929^post15, __rho_56_^0'=__rho_56_^post15, k3^0'=k3^post15, __rho_13_^0'=__rho_13_^post15, i___04040^0'=i___04040^post15, a1818^0'=a1818^post15, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post15, __rho_99_^0'=__rho_99_^post15, a77^0'=a77^post15, a3434^0'=a3434^post15, i___099^0'=i___099^post15, __rho_10_^0'=__rho_10_^post15, (-ret_t1394Diag_PnpStopDevice33^post15+ret_t1394Diag_PnpStopDevice33^0 == 0 /\ a3737^0-a3737^post15 == 0 /\ __rho_8_^0-__rho_8_^post15 == 0 /\ __rho_13_^0-__rho_13_^post15 == 0 /\ -i___01313^post15+i___01313^0 == 0 /\ k5^0-k5^post15 == 0 /\ -AsyncAddressData^post15+AsyncAddressData^0 == 0 /\ ret_t1394_SubmitIrpSynch3636^0-ret_t1394_SubmitIrpSynch3636^post15 == 0 /\ b3333^0-b3333^post15 == 0 /\ -k1^post15+k1^0 == 0 /\ i^0-i^post15 == 0 /\ -CromData^post15+CromData^0 == 0 /\ -i___099^post15+i___099^0 == 0 /\ -ret_IoSetDeviceInterfaceState44^post15+ret_IoSetDeviceInterfaceState44^0 == 0 /\ a2525^0-a2525^post15 == 0 /\ IsochDetachData^0-IsochDetachData^post15 == 0 /\ -i___04040^post15+i___04040^0 == 0 /\ -a3434^post15+a3434^0 == 0 /\ -Irp^post15+Irp^0 == 0 /\ -__rho_10_^post15+__rho_10_^0 == 0 /\ a2828^0-a2828^post15 == 0 /\ -__rho_5_^post15+__rho_5_^0 == 0 /\ -__rho_99_^post15+__rho_99_^0 == 0 /\ -b2929^post15+b2929^0 == 0 /\ ResourceIrp^0-ResourceIrp^post15 == 0 /\ a3838^0-a3838^post15 == 0 /\ -i___02020^post15+i___02020^0 == 0 /\ a4444^0-a4444^post15 == 0 /\ a11^0-a11^post15 == 0 /\ ntStatus^0-ntStatus^post15 == 0 /\ -__rho_56_^post15+__rho_56_^0 == 0 /\ keR^0-keR^post15 == 0 /\ -__rho_7_^post15+__rho_7_^0 == 0 /\ -a1818^post15+a1818^0 == 0 /\ -pIrb^post15+pIrb^0 == 0 /\ b3535^0-b3535^post15 == 0 /\ __rho_3_^0-__rho_3_^post15 == 0 /\ -__rho_11_^post15+__rho_11_^0 == 0 /\ -a3131^post15+a3131^0 == 0 /\ b2626^0-b2626^post15 == 0 /\ -k4^post15+k4^0 == 0 /\ i___02424^0-i___02424^post15 == 0 /\ __rho_4_^0-__rho_4_^post15 == 0 /\ __rho_2_^0-__rho_2_^post15 == 0 /\ -IsochResourceData^post15+IsochResourceData^0 == 0 /\ __rho_9_^0-__rho_9_^post15 == 0 /\ a3232^0-a3232^post15 == 0 /\ ret_IoAllocateIrp2727^0-ret_IoAllocateIrp2727^post15 == 0 /\ -a4343^post15+a4343^0 == 0 /\ -__rho_12_^post15+__rho_12_^0 == 0 /\ -k3^post15+k3^0 == 0 /\ i___01717^0-i___01717^post15 == 0 /\ i___04646^0-i___04646^post15 == 0 /\ -__rho_1_^post15+__rho_1_^0 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post15 == 0 /\ k2^0-k2^post15 == 0 /\ __rho_6_^0-__rho_6_^post15 == 0 /\ b22^0-b22^post15 == 0 /\ -Irql^post15+Irql^0 == 0 /\ a77^post15-CromData^0 == 0 /\ -keA^post15+keA^0 == 0), cost: 1
  16: l13 -> l12 : i___01717^0'=i___01717^post16, IsochDetachData^0'=IsochDetachData^post16, ntStatus^0'=ntStatus^post16, __rho_6_^0'=__rho_6_^post16, k5^0'=k5^post16, __rho_2_^0'=__rho_2_^post16, a3838^0'=a3838^post16, a2828^0'=a2828^post16, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post16, b3535^0'=b3535^post16, CromData^0'=CromData^post16, b2626^0'=b2626^post16, __rho_4_^0'=__rho_4_^post16, k2^0'=k2^post16, __rho_12_^0'=__rho_12_^post16, i___02424^0'=i___02424^post16, a11^0'=a11^post16, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post16, __rho_8_^0'=__rho_8_^post16, keR^0'=keR^post16, a4444^0'=a4444^post16, a3232^0'=a3232^post16, ResourceIrp^0'=ResourceIrp^post16, i___01313^0'=i___01313^post16, Irql^0'=Irql^post16, b3333^0'=b3333^post16, __rho_5_^0'=__rho_5_^post16, k4^0'=k4^post16, __rho_1_^0'=__rho_1_^post16, i___04646^0'=i___04646^post16, a2525^0'=a2525^post16, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post16, __rho_9_^0'=__rho_9_^post16, AsyncAddressData^0'=AsyncAddressData^post16, b22^0'=b22^post16, a3737^0'=a3737^post16, k1^0'=k1^post16, __rho_11_^0'=__rho_11_^post16, i___02020^0'=i___02020^post16, IsochResourceData^0'=IsochResourceData^post16, pIrb^0'=pIrb^post16, __rho_7_^0'=__rho_7_^post16, keA^0'=keA^post16, __rho_3_^0'=__rho_3_^post16, a4343^0'=a4343^post16, a3131^0'=a3131^post16, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post16, i^0'=i^post16, Irp^0'=Irp^post16, b2929^0'=b2929^post16, __rho_56_^0'=__rho_56_^post16, k3^0'=k3^post16, __rho_13_^0'=__rho_13_^post16, i___04040^0'=i___04040^post16, a1818^0'=a1818^post16, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post16, __rho_99_^0'=__rho_99_^post16, a77^0'=a77^post16, a3434^0'=a3434^post16, i___099^0'=i___099^post16, __rho_10_^0'=__rho_10_^post16, (-b22^post16+b22^0 == 0 /\ -ret_IoAllocateIrp2727^post16+ret_IoAllocateIrp2727^0 == 0 /\ -__rho_1_^post16+__rho_1_^0 == 0 /\ -a3434^post16+a3434^0 == 0 /\ -IsochResourceData^post16+IsochResourceData^0 == 0 /\ -__rho_3_^post16+__rho_3_^0 == 0 /\ __rho_11_^0-__rho_11_^post16 == 0 /\ a2525^0-a2525^post16 == 0 /\ -__rho_13_^post16+__rho_13_^0 == 0 /\ -k4^post16+k4^0 == 0 /\ -Irp^post16+Irp^0 == 0 /\ -ret_IoSetDeviceInterfaceState44^post16+ret_IoSetDeviceInterfaceState44^0 == 0 /\ a4444^0-a4444^post16 == 0 /\ -a4343^post16+a4343^0 == 0 /\ a3737^0-a3737^post16 == 0 /\ ResourceIrp^0-ResourceIrp^post16 == 0 /\ i___04646^0-i___04646^post16 == 0 /\ -__rho_99_^post16+__rho_99_^0 == 0 /\ a11^0-a11^post16 == 0 /\ k5^0-k5^post16 == 0 /\ -k2^post16+k2^0 == 0 /\ b3535^0-b3535^post16 == 0 /\ b2929^0-b2929^post16 == 0 /\ ntStatus^0-ntStatus^post16 == 0 /\ __rho_5_^0 <= 0 /\ a2828^0-a2828^post16 == 0 /\ -k3^post16+k3^0 == 0 /\ -__rho_8_^post16+__rho_8_^0 == 0 /\ IsochDetachData^0-IsochDetachData^post16 == 0 /\ -__rho_12_^post16+__rho_12_^0 == 0 /\ -__rho_7_^post16+__rho_7_^0 == 0 /\ -__rho_5_^post16+__rho_5_^0 == 0 /\ __rho_4_^0-__rho_4_^post16 == 0 /\ __rho_2_^0-__rho_2_^post16 == 0 /\ -CromData^post16+CromData^0 == 0 /\ pIrb^0-pIrb^post16 == 0 /\ -i^post16+i^0 == 0 /\ a3838^0-a3838^post16 == 0 /\ -__rho_56_^post16+__rho_56_^0 == 0 /\ -Irql^post16+Irql^0 == 0 /\ a77^0-a77^post16 == 0 /\ i___01717^0-i___01717^post16 == 0 /\ __rho_9_^0-__rho_9_^post16 == 0 /\ i___02424^0-i___02424^post16 == 0 /\ -k1^post16+k1^0 == 0 /\ -a3131^post16+a3131^0 == 0 /\ b3333^0-b3333^post16 == 0 /\ __rho_6_^0-__rho_6_^post16 == 0 /\ -i___02020^post16+i___02020^0 == 0 /\ -ret_t1394Diag_PnpStopDevice33^post16+ret_t1394Diag_PnpStopDevice33^0 == 0 /\ -i___099^post16+i___099^0 == 0 /\ b2626^0-b2626^post16 == 0 /\ i___01313^0-i___01313^post16 == 0 /\ a3232^0-a3232^post16 == 0 /\ -i___04040^post16+i___04040^0 == 0 /\ -__rho_10_^post16+__rho_10_^0 == 0 /\ -keA^post16+keA^0 == 0 /\ -AsyncAddressData^post16+AsyncAddressData^0 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post16 == 0 /\ keR^0-keR^post16 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post16+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ a1818^0-a1818^post16 == 0), cost: 1
  17: l13 -> l12 : i___01717^0'=i___01717^post17, IsochDetachData^0'=IsochDetachData^post17, ntStatus^0'=ntStatus^post17, __rho_6_^0'=__rho_6_^post17, k5^0'=k5^post17, __rho_2_^0'=__rho_2_^post17, a3838^0'=a3838^post17, a2828^0'=a2828^post17, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post17, b3535^0'=b3535^post17, CromData^0'=CromData^post17, b2626^0'=b2626^post17, __rho_4_^0'=__rho_4_^post17, k2^0'=k2^post17, __rho_12_^0'=__rho_12_^post17, i___02424^0'=i___02424^post17, a11^0'=a11^post17, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post17, __rho_8_^0'=__rho_8_^post17, keR^0'=keR^post17, a4444^0'=a4444^post17, a3232^0'=a3232^post17, ResourceIrp^0'=ResourceIrp^post17, i___01313^0'=i___01313^post17, Irql^0'=Irql^post17, b3333^0'=b3333^post17, __rho_5_^0'=__rho_5_^post17, k4^0'=k4^post17, __rho_1_^0'=__rho_1_^post17, i___04646^0'=i___04646^post17, a2525^0'=a2525^post17, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post17, __rho_9_^0'=__rho_9_^post17, AsyncAddressData^0'=AsyncAddressData^post17, b22^0'=b22^post17, a3737^0'=a3737^post17, k1^0'=k1^post17, __rho_11_^0'=__rho_11_^post17, i___02020^0'=i___02020^post17, IsochResourceData^0'=IsochResourceData^post17, pIrb^0'=pIrb^post17, __rho_7_^0'=__rho_7_^post17, keA^0'=keA^post17, __rho_3_^0'=__rho_3_^post17, a4343^0'=a4343^post17, a3131^0'=a3131^post17, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post17, i^0'=i^post17, Irp^0'=Irp^post17, b2929^0'=b2929^post17, __rho_56_^0'=__rho_56_^post17, k3^0'=k3^post17, __rho_13_^0'=__rho_13_^post17, i___04040^0'=i___04040^post17, a1818^0'=a1818^post17, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post17, __rho_99_^0'=__rho_99_^post17, a77^0'=a77^post17, a3434^0'=a3434^post17, i___099^0'=i___099^post17, __rho_10_^0'=__rho_10_^post17, (b2929^0-b2929^post17 == 0 /\ -ret_IoSetDeviceInterfaceState44^post17+ret_IoSetDeviceInterfaceState44^0 == 0 /\ ntStatus^0-ntStatus^post17 == 0 /\ i___04646^0-i___04646^post17 == 0 /\ __rho_6_^0-__rho_6_^post17 == 0 /\ -i___04040^post17+i___04040^0 == 0 /\ a3838^0-a3838^post17 == 0 /\ -b2626^post17+b2626^0 == 0 /\ 1-__rho_5_^0 <= 0 /\ -a4343^post17+a4343^0 == 0 /\ keR^0-keR^post17 == 0 /\ -a3434^post17+a3434^0 == 0 /\ k1^0-k1^post17 == 0 /\ IsochDetachData^0-IsochDetachData^post17 == 0 /\ a3232^0-a3232^post17 == 0 /\ -__rho_99_^post17+__rho_99_^0 == 0 /\ __rho_11_^0-__rho_11_^post17 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post17+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ -__rho_13_^post17+__rho_13_^0 == 0 /\ a4444^0-a4444^post17 == 0 /\ -b22^post17+b22^0 == 0 /\ -__rho_5_^post17+__rho_5_^0 == 0 /\ -a3131^post17+a3131^0 == 0 /\ -k4^post17+k4^0 == 0 /\ -Irp^post17+Irp^0 == 0 /\ -i___099^post17+i___099^0 == 0 /\ pIrb^0-pIrb^post17 == 0 /\ -Irql^post17+Irql^0 == 0 /\ -keA^post17+keA^0 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post17 == 0 /\ CromData^0-CromData^post17 == 0 /\ -__rho_10_^post17+__rho_10_^0 == 0 /\ -k3^post17+k3^0 == 0 /\ a3737^0-a3737^post17 == 0 /\ i___01717^0-i___01717^post17 == 0 /\ -a11^post17+a11^0 == 0 /\ -__rho_1_^post17+__rho_1_^0 == 0 /\ k5^0-k5^post17 == 0 /\ -i___02020^post17+i___02020^0 == 0 /\ a2828^0-a2828^post17 == 0 /\ i___01313^0-i___01313^post17 == 0 /\ a77^0-a77^post17 == 0 /\ -__rho_3_^post17+__rho_3_^0 == 0 /\ __rho_7_^0-__rho_7_^post17 == 0 /\ -__rho_8_^post17+__rho_8_^0 == 0 /\ -__rho_9_^post17+__rho_9_^0 == 0 /\ ResourceIrp^0-ResourceIrp^post17 == 0 /\ b3333^0-b3333^post17 == 0 /\ __rho_4_^0-__rho_4_^post17 == 0 /\ a2525^0-a2525^post17 == 0 /\ -AsyncAddressData^post17+AsyncAddressData^0 == 0 /\ -i___02424^post17+i___02424^0 == 0 /\ -b3535^post17+b3535^0 == 0 /\ -i^post17+i^0 == 0 /\ -__rho_2_^post17+__rho_2_^0 == 0 /\ -IsochResourceData^post17+IsochResourceData^0 == 0 /\ a1818^0-a1818^post17 == 0 /\ -ret_IoAllocateIrp2727^post17+ret_IoAllocateIrp2727^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post17 == 0 /\ -k2^post17+k2^0 == 0 /\ -__rho_56_^post17+__rho_56_^0 == 0 /\ __rho_12_^0-__rho_12_^post17 == 0), cost: 1
  18: l14 -> l13 : i___01717^0'=i___01717^post18, IsochDetachData^0'=IsochDetachData^post18, ntStatus^0'=ntStatus^post18, __rho_6_^0'=__rho_6_^post18, k5^0'=k5^post18, __rho_2_^0'=__rho_2_^post18, a3838^0'=a3838^post18, a2828^0'=a2828^post18, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post18, b3535^0'=b3535^post18, CromData^0'=CromData^post18, b2626^0'=b2626^post18, __rho_4_^0'=__rho_4_^post18, k2^0'=k2^post18, __rho_12_^0'=__rho_12_^post18, i___02424^0'=i___02424^post18, a11^0'=a11^post18, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post18, __rho_8_^0'=__rho_8_^post18, keR^0'=keR^post18, a4444^0'=a4444^post18, a3232^0'=a3232^post18, ResourceIrp^0'=ResourceIrp^post18, i___01313^0'=i___01313^post18, Irql^0'=Irql^post18, b3333^0'=b3333^post18, __rho_5_^0'=__rho_5_^post18, k4^0'=k4^post18, __rho_1_^0'=__rho_1_^post18, i___04646^0'=i___04646^post18, a2525^0'=a2525^post18, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post18, __rho_9_^0'=__rho_9_^post18, AsyncAddressData^0'=AsyncAddressData^post18, b22^0'=b22^post18, a3737^0'=a3737^post18, k1^0'=k1^post18, __rho_11_^0'=__rho_11_^post18, i___02020^0'=i___02020^post18, IsochResourceData^0'=IsochResourceData^post18, pIrb^0'=pIrb^post18, __rho_7_^0'=__rho_7_^post18, keA^0'=keA^post18, __rho_3_^0'=__rho_3_^post18, a4343^0'=a4343^post18, a3131^0'=a3131^post18, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post18, i^0'=i^post18, Irp^0'=Irp^post18, b2929^0'=b2929^post18, __rho_56_^0'=__rho_56_^post18, k3^0'=k3^post18, __rho_13_^0'=__rho_13_^post18, i___04040^0'=i___04040^post18, a1818^0'=a1818^post18, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post18, __rho_99_^0'=__rho_99_^post18, a77^0'=a77^post18, a3434^0'=a3434^post18, i___099^0'=i___099^post18, __rho_10_^0'=__rho_10_^post18, (0 == 0 /\ -i___099^post18+i___099^0 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post18 == 0 /\ CromData^0-CromData^post18 == 0 /\ -__rho_9_^post18+__rho_9_^0 == 0 /\ -a3232^post18+a3232^0 == 0 /\ -a77^post18+a77^0 == 0 /\ i___04040^0-i___04040^post18 == 0 /\ -b3333^post18+b3333^0 == 0 /\ -keA^post18+keA^0 == 0 /\ -k3^post18+k3^0 == 0 /\ -__rho_10_^post18+__rho_10_^0 == 0 /\ -keR^post18+keR^0 == 0 /\ k5^0-k5^post18 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post18+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ __rho_8_^0-__rho_8_^post18 == 0 /\ AsyncAddressData^0-AsyncAddressData^post18 == 0 /\ __rho_11_^0-__rho_11_^post18 == 0 /\ -ret_IoAllocateIrp2727^post18+ret_IoAllocateIrp2727^0 == 0 /\ a2828^0-a2828^post18 == 0 /\ -a3434^post18+a3434^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post18 == 0 /\ i___01717^0-i___01717^post18 == 0 /\ -i^post18+i^0 == 0 /\ __rho_2_^0-__rho_2_^post18 == 0 /\ -IsochResourceData^post18+IsochResourceData^0 == 0 /\ -Irp^post18+Irp^0 == 0 /\ k1^0-k1^post18 == 0 /\ -__rho_3_^post18+__rho_3_^0 == 0 /\ -__rho_56_^post18+__rho_56_^0 == 0 /\ -ret_IoSetDeviceInterfaceState44^post18+ret_IoSetDeviceInterfaceState44^0 == 0 /\ a11^0-a11^post18 == 0 /\ pIrb^0-pIrb^post18 == 0 /\ -a2525^post18+a2525^0 == 0 /\ __rho_6_^0-__rho_6_^post18 == 0 /\ __rho_12_^0-__rho_12_^post18 == 0 /\ i___04646^0-i___04646^post18 == 0 /\ k4^0-k4^post18 == 0 /\ a3838^0-a3838^post18 == 0 /\ b2626^0-b2626^post18 == 0 /\ -__rho_99_^post18+__rho_99_^0 == 0 /\ -ResourceIrp^post18+ResourceIrp^0 == 0 /\ __rho_7_^0-__rho_7_^post18 == 0 /\ __rho_4_^0-__rho_4_^post18 == 0 /\ -b3535^post18+b3535^0 == 0 /\ -a4343^post18+a4343^0 == 0 /\ -a3737^post18+a3737^0 == 0 /\ -a1818^post18+a1818^0 == 0 /\ -b2929^post18+b2929^0 == 0 /\ -b22^post18+b22^0 == 0 /\ ntStatus^0-ntStatus^post18 == 0 /\ i___02020^0-i___02020^post18 == 0 /\ i___02424^0-i___02424^post18 == 0 /\ IsochDetachData^0-IsochDetachData^post18 == 0 /\ -__rho_1_^post18+__rho_1_^0 == 0 /\ Irql^0-Irql^post18 == 0 /\ -__rho_13_^post18+__rho_13_^0 == 0 /\ a4444^0-a4444^post18 == 0 /\ i___01313^0-i___01313^post18 == 0 /\ k2^0-k2^post18 == 0 /\ -a3131^post18+a3131^0 == 0), cost: 1
  19: l15 -> l16 : i___01717^0'=i___01717^post19, IsochDetachData^0'=IsochDetachData^post19, ntStatus^0'=ntStatus^post19, __rho_6_^0'=__rho_6_^post19, k5^0'=k5^post19, __rho_2_^0'=__rho_2_^post19, a3838^0'=a3838^post19, a2828^0'=a2828^post19, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post19, b3535^0'=b3535^post19, CromData^0'=CromData^post19, b2626^0'=b2626^post19, __rho_4_^0'=__rho_4_^post19, k2^0'=k2^post19, __rho_12_^0'=__rho_12_^post19, i___02424^0'=i___02424^post19, a11^0'=a11^post19, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post19, __rho_8_^0'=__rho_8_^post19, keR^0'=keR^post19, a4444^0'=a4444^post19, a3232^0'=a3232^post19, ResourceIrp^0'=ResourceIrp^post19, i___01313^0'=i___01313^post19, Irql^0'=Irql^post19, b3333^0'=b3333^post19, __rho_5_^0'=__rho_5_^post19, k4^0'=k4^post19, __rho_1_^0'=__rho_1_^post19, i___04646^0'=i___04646^post19, a2525^0'=a2525^post19, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post19, __rho_9_^0'=__rho_9_^post19, AsyncAddressData^0'=AsyncAddressData^post19, b22^0'=b22^post19, a3737^0'=a3737^post19, k1^0'=k1^post19, __rho_11_^0'=__rho_11_^post19, i___02020^0'=i___02020^post19, IsochResourceData^0'=IsochResourceData^post19, pIrb^0'=pIrb^post19, __rho_7_^0'=__rho_7_^post19, keA^0'=keA^post19, __rho_3_^0'=__rho_3_^post19, a4343^0'=a4343^post19, a3131^0'=a3131^post19, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post19, i^0'=i^post19, Irp^0'=Irp^post19, b2929^0'=b2929^post19, __rho_56_^0'=__rho_56_^post19, k3^0'=k3^post19, __rho_13_^0'=__rho_13_^post19, i___04040^0'=i___04040^post19, a1818^0'=a1818^post19, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post19, __rho_99_^0'=__rho_99_^post19, a77^0'=a77^post19, a3434^0'=a3434^post19, i___099^0'=i___099^post19, __rho_10_^0'=__rho_10_^post19, (-pIrb^post19+pIrb^0 == 0 /\ -__rho_13_^post19+__rho_13_^0 == 0 /\ -a77^post19+a77^0 == 0 /\ a2828^0-a2828^post19 == 0 /\ keA^210 == 0 /\ keA^post19 == 0 /\ -__rho_3_^post19+__rho_3_^0 == 0 /\ ResourceIrp^0-ResourceIrp^post19 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post19+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ a2525^0-a2525^post19 == 0 /\ -k3^post19+k3^0 == 0 /\ a4444^0-a4444^post19 == 0 /\ i___04040^0-i___04040^post19 == 0 /\ -IsochResourceData^post19+IsochResourceData^0 == 0 /\ -ret_IoAllocateIrp2727^post19+ret_IoAllocateIrp2727^0 == 0 /\ i___01717^0-i___01717^post19 == 0 /\ -__rho_8_^post19+__rho_8_^0 == 0 /\ -ret_IoSetDeviceInterfaceState44^post19+ret_IoSetDeviceInterfaceState44^0 == 0 /\ -i___02424^post19+i___02424^0 == 0 /\ a11^0-a11^post19 == 0 /\ -a3434^post19+a3434^0 == 0 /\ AsyncAddressData^0-AsyncAddressData^post19 == 0 /\ __rho_11_^0-__rho_11_^post19 == 0 /\ i___04646^0-i___04646^post19 == 0 /\ -__rho_99_^post19+__rho_99_^0 == 0 /\ b3333^0-b3333^post19 == 0 /\ -k2^post19+k2^0 == 0 /\ __rho_2_^0-__rho_2_^post19 == 0 /\ -1+keA^310 == 0 /\ -Irql^post19+Irql^0 == 0 /\ -__rho_9_^post19+__rho_9_^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post19 == 0 /\ -__rho_56_^post19+__rho_56_^0 == 0 /\ -b2929^post19+b2929^0 == 0 /\ __rho_4_^0-__rho_4_^post19 == 0 /\ -a3131^post19+a3131^0 == 0 /\ -CromData^post19+CromData^0 == 0 /\ -b3535^post19+b3535^0 == 0 /\ k4^0-k4^post19 == 0 /\ k1^0-k1^post19 == 0 /\ __rho_7_^0-__rho_7_^post19 == 0 /\ i___01313^0-i___01313^post19 == 0 /\ -a1818^post19+a1818^0 == 0 /\ __rho_5_^0-__rho_5_^post19 == 0 /\ -i___099^post19+i___099^0 == 0 /\ -a3737^post19+a3737^0 == 0 /\ -a4343^post19+a4343^0 == 0 /\ __rho_12_^0-__rho_12_^post19 == 0 /\ -i^post19+i^0 == 0 /\ __rho_6_^0-__rho_6_^post19 == 0 /\ -__rho_10_^post19+__rho_10_^0 == 0 /\ i___02020^0-i___02020^post19 == 0 /\ IsochDetachData^0-IsochDetachData^post19 == 0 /\ -1+keA^11 == 0 /\ b2626^0-b2626^post19 == 0 /\ k5^0-k5^post19 == 0 /\ -Irp^post19+Irp^0 == 0 /\ a3838^0-a3838^post19 == 0 /\ -__rho_1_^post19+__rho_1_^0 == 0 /\ -b22^post19+b22^0 == 0 /\ a3232^0-a3232^post19 == 0 /\ keR^0-keR^post19 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post19 == 0 /\ ntStatus^0-ntStatus^post19 == 0), cost: 1
  44: l16 -> l19 : i___01717^0'=i___01717^post44, IsochDetachData^0'=IsochDetachData^post44, ntStatus^0'=ntStatus^post44, __rho_6_^0'=__rho_6_^post44, k5^0'=k5^post44, __rho_2_^0'=__rho_2_^post44, a3838^0'=a3838^post44, a2828^0'=a2828^post44, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post44, b3535^0'=b3535^post44, CromData^0'=CromData^post44, b2626^0'=b2626^post44, __rho_4_^0'=__rho_4_^post44, k2^0'=k2^post44, __rho_12_^0'=__rho_12_^post44, i___02424^0'=i___02424^post44, a11^0'=a11^post44, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post44, __rho_8_^0'=__rho_8_^post44, keR^0'=keR^post44, a4444^0'=a4444^post44, a3232^0'=a3232^post44, ResourceIrp^0'=ResourceIrp^post44, i___01313^0'=i___01313^post44, Irql^0'=Irql^post44, b3333^0'=b3333^post44, __rho_5_^0'=__rho_5_^post44, k4^0'=k4^post44, __rho_1_^0'=__rho_1_^post44, i___04646^0'=i___04646^post44, a2525^0'=a2525^post44, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post44, __rho_9_^0'=__rho_9_^post44, AsyncAddressData^0'=AsyncAddressData^post44, b22^0'=b22^post44, a3737^0'=a3737^post44, k1^0'=k1^post44, __rho_11_^0'=__rho_11_^post44, i___02020^0'=i___02020^post44, IsochResourceData^0'=IsochResourceData^post44, pIrb^0'=pIrb^post44, __rho_7_^0'=__rho_7_^post44, keA^0'=keA^post44, __rho_3_^0'=__rho_3_^post44, a4343^0'=a4343^post44, a3131^0'=a3131^post44, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post44, i^0'=i^post44, Irp^0'=Irp^post44, b2929^0'=b2929^post44, __rho_56_^0'=__rho_56_^post44, k3^0'=k3^post44, __rho_13_^0'=__rho_13_^post44, i___04040^0'=i___04040^post44, a1818^0'=a1818^post44, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post44, __rho_99_^0'=__rho_99_^post44, a77^0'=a77^post44, a3434^0'=a3434^post44, i___099^0'=i___099^post44, __rho_10_^0'=__rho_10_^post44, (0 == 0 /\ -1+keA^340 == 0 /\ -a11^post44+a11^0 == 0 /\ __rho_4_^0-__rho_4_^post44 == 0 /\ -1+keR^120 == 0 /\ keR^230 == 0 /\ a2828^0-a2828^post44 == 0 /\ -1+keR^330 == 0 /\ i___01717^0-i___01717^post44 == 0 /\ -1+keA^14 == 0 /\ Irp^0-Irp^post44 == 0 /\ -ret_IoAllocateIrp2727^post44+ret_IoAllocateIrp2727^0 == 0 /\ Irql^0-Irql^post44 == 0 /\ -__rho_5_^post44+__rho_5_^0 == 0 /\ -__rho_99_^post44+__rho_99_^0 == 0 /\ pIrb^0-pIrb^post44 == 0 /\ -a4343^post44+a4343^0 == 0 /\ -k3^post44+k3^0 == 0 /\ -__rho_56_^post44+__rho_56_^0 == 0 /\ CromData^0-CromData^post44 == 0 /\ -a77^post44+a77^0 == 0 /\ a2525^0-a2525^post44 == 0 /\ -a3232^post44+a3232^0 == 0 /\ ret_t1394_SubmitIrpSynch3636^0-ret_t1394_SubmitIrpSynch3636^post44 == 0 /\ -__rho_7_^post44+__rho_7_^0 == 0 /\ keR^post44 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post44 == 0 /\ i^0-i^post44 == 0 /\ __rho_11_^0-__rho_11_^post44 == 0 /\ __rho_12_^0-__rho_12_^post44 == 0 /\ __rho_2_^0-__rho_2_^post44 == 0 /\ k4^0 <= 0 /\ -__rho_9_^post44+__rho_9_^0 == 0 /\ -a3434^post44+a3434^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post44 == 0 /\ a3838^0-a3838^post44 == 0 /\ -ResourceIrp^post44+ResourceIrp^0 == 0 /\ -i___02020^post44+i___02020^0 == 0 /\ b2626^0-b2626^post44 == 0 /\ IsochDetachData^0-IsochDetachData^post44 == 0 /\ a3737^0-a3737^post44 == 0 /\ b3333^0-b3333^post44 == 0 /\ k2^0-k2^post44 == 0 /\ keA^240 == 0 /\ -__rho_1_^post44+__rho_1_^0 == 0 /\ -i___099^post44+i___099^0 == 0 /\ -ret_IoSetDeviceInterfaceState44^post44+ret_IoSetDeviceInterfaceState44^0 == 0 /\ -__rho_3_^post44+__rho_3_^0 == 0 /\ -k1^post44+k1^0 == 0 /\ -__rho_13_^post44+k5^post44 == 0 /\ __rho_6_^0-__rho_6_^post44 == 0 /\ -b22^post44+b22^0 == 0 /\ -IsochResourceData^post44+IsochResourceData^0 == 0 /\ -a3131^post44+a3131^0 == 0 /\ i___04040^post44-Irql^0 == 0 /\ keA^post44 == 0 /\ b3535^0-b3535^post44 == 0 /\ __rho_8_^0-__rho_8_^post44 == 0 /\ k4^0-k4^post44 == 0 /\ i___02424^0-i___02424^post44 == 0 /\ -i___04646^post44+i___04646^0 == 0 /\ -a4444^post44+a4444^0 == 0 /\ -__rho_10_^post44+__rho_10_^0 == 0 /\ -AsyncAddressData^post44+AsyncAddressData^0 == 0 /\ ntStatus^0-ntStatus^post44 == 0 /\ -b2929^post44+b2929^0 == 0 /\ i___01313^0-i___01313^post44 == 0 /\ -a1818^post44+a1818^0 == 0), cost: 1
  45: l16 -> l31 : i___01717^0'=i___01717^post45, IsochDetachData^0'=IsochDetachData^post45, ntStatus^0'=ntStatus^post45, __rho_6_^0'=__rho_6_^post45, k5^0'=k5^post45, __rho_2_^0'=__rho_2_^post45, a3838^0'=a3838^post45, a2828^0'=a2828^post45, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post45, b3535^0'=b3535^post45, CromData^0'=CromData^post45, b2626^0'=b2626^post45, __rho_4_^0'=__rho_4_^post45, k2^0'=k2^post45, __rho_12_^0'=__rho_12_^post45, i___02424^0'=i___02424^post45, a11^0'=a11^post45, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post45, __rho_8_^0'=__rho_8_^post45, keR^0'=keR^post45, a4444^0'=a4444^post45, a3232^0'=a3232^post45, ResourceIrp^0'=ResourceIrp^post45, i___01313^0'=i___01313^post45, Irql^0'=Irql^post45, b3333^0'=b3333^post45, __rho_5_^0'=__rho_5_^post45, k4^0'=k4^post45, __rho_1_^0'=__rho_1_^post45, i___04646^0'=i___04646^post45, a2525^0'=a2525^post45, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post45, __rho_9_^0'=__rho_9_^post45, AsyncAddressData^0'=AsyncAddressData^post45, b22^0'=b22^post45, a3737^0'=a3737^post45, k1^0'=k1^post45, __rho_11_^0'=__rho_11_^post45, i___02020^0'=i___02020^post45, IsochResourceData^0'=IsochResourceData^post45, pIrb^0'=pIrb^post45, __rho_7_^0'=__rho_7_^post45, keA^0'=keA^post45, __rho_3_^0'=__rho_3_^post45, a4343^0'=a4343^post45, a3131^0'=a3131^post45, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post45, i^0'=i^post45, Irp^0'=Irp^post45, b2929^0'=b2929^post45, __rho_56_^0'=__rho_56_^post45, k3^0'=k3^post45, __rho_13_^0'=__rho_13_^post45, i___04040^0'=i___04040^post45, a1818^0'=a1818^post45, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post45, __rho_99_^0'=__rho_99_^post45, a77^0'=a77^post45, a3434^0'=a3434^post45, i___099^0'=i___099^post45, __rho_10_^0'=__rho_10_^post45, (0 == 0 /\ -__rho_5_^post45+__rho_5_^0 == 0 /\ a3838^0-a3838^post45 == 0 /\ 1-k4^0 <= 0 /\ -b3333^post45+b3333^0 == 0 /\ -a4343^post45+a4343^0 == 0 /\ i___02424^post45-Irql^0 == 0 /\ -i___04040^post45+i___04040^0 == 0 /\ IsochDetachData^0-IsochDetachData^post45 == 0 /\ -AsyncAddressData^post45+AsyncAddressData^0 == 0 /\ -b2929^post45+b2929^0 == 0 /\ -__rho_56_^post45+__rho_56_^0 == 0 /\ -keA^post45+keA^0 == 0 /\ Irp^0-Irp^post45 == 0 /\ -b2626^post45+b2626^0 == 0 /\ __rho_6_^0-__rho_6_^post45 == 0 /\ k5^0-k5^post45 == 0 /\ ret_t1394_SubmitIrpSynch3636^0-ret_t1394_SubmitIrpSynch3636^post45 == 0 /\ b3535^0-b3535^post45 == 0 /\ keR^post45 == 0 /\ -a77^post45+a77^0 == 0 /\ IsochResourceData^post45-__rho_12_^post45 == 0 /\ pIrb^0-pIrb^post45 == 0 /\ -ret_IoAllocateIrp2727^post45+ret_IoAllocateIrp2727^0 == 0 /\ -__rho_13_^post45+__rho_13_^0 == 0 /\ -i^post45+i^0 == 0 /\ -__rho_8_^post45+__rho_8_^0 == 0 /\ __rho_4_^0-__rho_4_^post45 == 0 /\ __rho_11_^0-__rho_11_^post45 == 0 /\ i___01313^0-i___01313^post45 == 0 /\ -__rho_9_^post45+__rho_9_^0 == 0 /\ -a3232^post45+a3232^0 == 0 /\ -1+keR^121 == 0 /\ -b22^post45+b22^0 == 0 /\ -k3^post45+k3^0 == 0 /\ -__rho_1_^post45+__rho_1_^0 == 0 /\ a3737^0-a3737^post45 == 0 /\ -a3434^post45+a3434^0 == 0 /\ a2525^0-a2525^post45 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post45 == 0 /\ a2828^0-a2828^post45 == 0 /\ i___04646^0-i___04646^post45 == 0 /\ i___01717^0-i___01717^post45 == 0 /\ -__rho_10_^post45+__rho_10_^0 == 0 /\ -i___02020^post45+i___02020^0 == 0 /\ CromData^0-CromData^post45 == 0 /\ -__rho_99_^post45+__rho_99_^0 == 0 /\ -i___099^post45+i___099^0 == 0 /\ -a11^post45+a11^0 == 0 /\ __rho_3_^0-__rho_3_^post45 == 0 /\ k2^0-k2^post45 == 0 /\ -ret_IoSetDeviceInterfaceState44^post45+ret_IoSetDeviceInterfaceState44^0 == 0 /\ -a1818^post45+a1818^0 == 0 /\ ResourceIrp^0-ResourceIrp^post45 == 0 /\ 1-k4^0+k4^post45 == 0 /\ Irql^0-Irql^post45 == 0 /\ -__rho_7_^post45+__rho_7_^0 == 0 /\ ntStatus^0-ntStatus^post45 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post45 == 0 /\ __rho_2_^0-__rho_2_^post45 == 0 /\ keR^240 == 0 /\ -k1^post45+k1^0 == 0 /\ -a3131^post45+a3131^0 == 0 /\ -1+keR^340 == 0 /\ a4444^0-a4444^post45 == 0), cost: 1
  20: l17 -> l14 : i___01717^0'=i___01717^post20, IsochDetachData^0'=IsochDetachData^post20, ntStatus^0'=ntStatus^post20, __rho_6_^0'=__rho_6_^post20, k5^0'=k5^post20, __rho_2_^0'=__rho_2_^post20, a3838^0'=a3838^post20, a2828^0'=a2828^post20, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post20, b3535^0'=b3535^post20, CromData^0'=CromData^post20, b2626^0'=b2626^post20, __rho_4_^0'=__rho_4_^post20, k2^0'=k2^post20, __rho_12_^0'=__rho_12_^post20, i___02424^0'=i___02424^post20, a11^0'=a11^post20, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post20, __rho_8_^0'=__rho_8_^post20, keR^0'=keR^post20, a4444^0'=a4444^post20, a3232^0'=a3232^post20, ResourceIrp^0'=ResourceIrp^post20, i___01313^0'=i___01313^post20, Irql^0'=Irql^post20, b3333^0'=b3333^post20, __rho_5_^0'=__rho_5_^post20, k4^0'=k4^post20, __rho_1_^0'=__rho_1_^post20, i___04646^0'=i___04646^post20, a2525^0'=a2525^post20, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post20, __rho_9_^0'=__rho_9_^post20, AsyncAddressData^0'=AsyncAddressData^post20, b22^0'=b22^post20, a3737^0'=a3737^post20, k1^0'=k1^post20, __rho_11_^0'=__rho_11_^post20, i___02020^0'=i___02020^post20, IsochResourceData^0'=IsochResourceData^post20, pIrb^0'=pIrb^post20, __rho_7_^0'=__rho_7_^post20, keA^0'=keA^post20, __rho_3_^0'=__rho_3_^post20, a4343^0'=a4343^post20, a3131^0'=a3131^post20, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post20, i^0'=i^post20, Irp^0'=Irp^post20, b2929^0'=b2929^post20, __rho_56_^0'=__rho_56_^post20, k3^0'=k3^post20, __rho_13_^0'=__rho_13_^post20, i___04040^0'=i___04040^post20, a1818^0'=a1818^post20, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post20, __rho_99_^0'=__rho_99_^post20, a77^0'=a77^post20, a3434^0'=a3434^post20, i___099^0'=i___099^post20, __rho_10_^0'=__rho_10_^post20, (ntStatus^0-ntStatus^post20 == 0 /\ -__rho_99_^post20+__rho_99_^0 == 0 /\ -a4343^post20+a4343^0 == 0 /\ ResourceIrp^0-ResourceIrp^post20 == 0 /\ a2525^0-a2525^post20 == 0 /\ __rho_11_^0-__rho_11_^post20 == 0 /\ -k2^post20+k2^0 == 0 /\ -k4^post20+k4^0 == 0 /\ a3232^0-a3232^post20 == 0 /\ keR^0-keR^post20 == 0 /\ IsochDetachData^0-IsochDetachData^post20 == 0 /\ -i___04040^post20+i___04040^0 == 0 /\ -__rho_8_^post20+__rho_8_^0 == 0 /\ k1^0-k1^post20 == 0 /\ __rho_4_^0-__rho_4_^post20 == 0 /\ -a3434^post20+a3434^0 == 0 /\ i___04646^0-i___04646^post20 == 0 /\ __rho_4_^0 <= 0 /\ a11^0-a11^post20 == 0 /\ __rho_6_^0-__rho_6_^post20 == 0 /\ -__rho_1_^post20+__rho_1_^0 == 0 /\ -a1818^post20+a1818^0 == 0 /\ b3535^0-b3535^post20 == 0 /\ -b22^post20+b22^0 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post20+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ k5^0-k5^post20 == 0 /\ -__rho_5_^post20+__rho_5_^0 == 0 /\ -__rho_13_^post20+__rho_13_^0 == 0 /\ -AsyncAddressData^post20+AsyncAddressData^0 == 0 /\ -a3131^post20+a3131^0 == 0 /\ -i___02424^post20+i___02424^0 == 0 /\ a2828^0-a2828^post20 == 0 /\ -k3^post20+k3^0 == 0 /\ -Irql^post20+Irql^0 == 0 /\ __rho_9_^0-__rho_9_^post20 == 0 /\ -i___099^post20+i___099^0 == 0 /\ -__rho_10_^post20+__rho_10_^0 == 0 /\ -i___02020^post20+i___02020^0 == 0 /\ -ret_t1394Diag_PnpStopDevice33^post20+ret_t1394Diag_PnpStopDevice33^0 == 0 /\ a4444^0-a4444^post20 == 0 /\ -b2929^post20+b2929^0 == 0 /\ __rho_12_^0-__rho_12_^post20 == 0 /\ i___01717^0-i___01717^post20 == 0 /\ a3737^0-a3737^post20 == 0 /\ i___01313^0-i___01313^post20 == 0 /\ -keA^post20+keA^0 == 0 /\ a3838^0-a3838^post20 == 0 /\ b2626^0-b2626^post20 == 0 /\ b3333^0-b3333^post20 == 0 /\ __rho_7_^0-__rho_7_^post20 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post20 == 0 /\ -i^post20+i^0 == 0 /\ CromData^0-CromData^post20 == 0 /\ -ret_IoAllocateIrp2727^post20+ret_IoAllocateIrp2727^0 == 0 /\ -ret_IoSetDeviceInterfaceState44^post20+ret_IoSetDeviceInterfaceState44^0 == 0 /\ -__rho_56_^post20+__rho_56_^0 == 0 /\ -a77^post20+a77^0 == 0 /\ -IsochResourceData^post20+IsochResourceData^0 == 0 /\ __rho_2_^0-__rho_2_^post20 == 0 /\ -Irp^post20+Irp^0 == 0 /\ pIrb^0-pIrb^post20 == 0 /\ -__rho_3_^post20+__rho_3_^0 == 0), cost: 1
  21: l17 -> l14 : i___01717^0'=i___01717^post21, IsochDetachData^0'=IsochDetachData^post21, ntStatus^0'=ntStatus^post21, __rho_6_^0'=__rho_6_^post21, k5^0'=k5^post21, __rho_2_^0'=__rho_2_^post21, a3838^0'=a3838^post21, a2828^0'=a2828^post21, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post21, b3535^0'=b3535^post21, CromData^0'=CromData^post21, b2626^0'=b2626^post21, __rho_4_^0'=__rho_4_^post21, k2^0'=k2^post21, __rho_12_^0'=__rho_12_^post21, i___02424^0'=i___02424^post21, a11^0'=a11^post21, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post21, __rho_8_^0'=__rho_8_^post21, keR^0'=keR^post21, a4444^0'=a4444^post21, a3232^0'=a3232^post21, ResourceIrp^0'=ResourceIrp^post21, i___01313^0'=i___01313^post21, Irql^0'=Irql^post21, b3333^0'=b3333^post21, __rho_5_^0'=__rho_5_^post21, k4^0'=k4^post21, __rho_1_^0'=__rho_1_^post21, i___04646^0'=i___04646^post21, a2525^0'=a2525^post21, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post21, __rho_9_^0'=__rho_9_^post21, AsyncAddressData^0'=AsyncAddressData^post21, b22^0'=b22^post21, a3737^0'=a3737^post21, k1^0'=k1^post21, __rho_11_^0'=__rho_11_^post21, i___02020^0'=i___02020^post21, IsochResourceData^0'=IsochResourceData^post21, pIrb^0'=pIrb^post21, __rho_7_^0'=__rho_7_^post21, keA^0'=keA^post21, __rho_3_^0'=__rho_3_^post21, a4343^0'=a4343^post21, a3131^0'=a3131^post21, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post21, i^0'=i^post21, Irp^0'=Irp^post21, b2929^0'=b2929^post21, __rho_56_^0'=__rho_56_^post21, k3^0'=k3^post21, __rho_13_^0'=__rho_13_^post21, i___04040^0'=i___04040^post21, a1818^0'=a1818^post21, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post21, __rho_99_^0'=__rho_99_^post21, a77^0'=a77^post21, a3434^0'=a3434^post21, i___099^0'=i___099^post21, __rho_10_^0'=__rho_10_^post21, (IsochDetachData^0-IsochDetachData^post21 == 0 /\ -__rho_56_^post21+__rho_56_^0 == 0 /\ __rho_12_^0-__rho_12_^post21 == 0 /\ __rho_11_^0-__rho_11_^post21 == 0 /\ -b22^post21+b22^0 == 0 /\ -a1818^post21+a1818^0 == 0 /\ -b3535^post21+b3535^0 == 0 /\ -a3131^post21+a3131^0 == 0 /\ __rho_6_^0-__rho_6_^post21 == 0 /\ -k3^post21+k3^0 == 0 /\ i___04646^0-i___04646^post21 == 0 /\ a3838^0-a3838^post21 == 0 /\ -i^post21+i^0 == 0 /\ ntStatus^0-ntStatus^post21 == 0 /\ -k4^post21+k4^0 == 0 /\ i___01313^0-i___01313^post21 == 0 /\ __rho_8_^0-__rho_8_^post21 == 0 /\ a3737^0-a3737^post21 == 0 /\ -keR^post21+keR^0 == 0 /\ -__rho_10_^post21+__rho_10_^0 == 0 /\ -Irql^post21+Irql^0 == 0 /\ -keA^post21+keA^0 == 0 /\ -i___04040^post21+i___04040^0 == 0 /\ k5^0-k5^post21 == 0 /\ k1^0-k1^post21 == 0 /\ -ResourceIrp^post21+ResourceIrp^0 == 0 /\ __rho_4_^0-__rho_4_^post21 == 0 /\ -__rho_1_^post21+__rho_1_^0 == 0 /\ -__rho_3_^post21+__rho_3_^0 == 0 /\ i___01717^0-i___01717^post21 == 0 /\ -b3333^post21+b3333^0 == 0 /\ -a11^post21+a11^0 == 0 /\ -b2929^post21+b2929^0 == 0 /\ -AsyncAddressData^post21+AsyncAddressData^0 == 0 /\ a2525^0-a2525^post21 == 0 /\ 1-__rho_4_^0 <= 0 /\ -i___02424^post21+i___02424^0 == 0 /\ -__rho_5_^post21+__rho_5_^0 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post21 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post21+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ pIrb^0-pIrb^post21 == 0 /\ -ret_IoAllocateIrp2727^post21+ret_IoAllocateIrp2727^0 == 0 /\ -a3232^post21+a3232^0 == 0 /\ -a4343^post21+a4343^0 == 0 /\ a2828^0-a2828^post21 == 0 /\ -__rho_2_^post21+__rho_2_^0 == 0 /\ CromData^0-CromData^post21 == 0 /\ k2^0-k2^post21 == 0 /\ -a77^post21+a77^0 == 0 /\ a4444^0-a4444^post21 == 0 /\ __rho_9_^0-__rho_9_^post21 == 0 /\ -i___099^post21+i___099^0 == 0 /\ -IsochResourceData^post21+IsochResourceData^0 == 0 /\ -Irp^post21+Irp^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post21 == 0 /\ -ret_IoSetDeviceInterfaceState44^post21+ret_IoSetDeviceInterfaceState44^0 == 0 /\ __rho_99_^0-__rho_99_^post21 == 0 /\ -b2626^post21+b2626^0 == 0 /\ __rho_7_^0-__rho_7_^post21 == 0 /\ -a3434^post21+a3434^0 == 0 /\ -__rho_13_^post21+__rho_13_^0 == 0 /\ i___02020^0-i___02020^post21 == 0), cost: 1
  22: l18 -> l7 : i___01717^0'=i___01717^post22, IsochDetachData^0'=IsochDetachData^post22, ntStatus^0'=ntStatus^post22, __rho_6_^0'=__rho_6_^post22, k5^0'=k5^post22, __rho_2_^0'=__rho_2_^post22, a3838^0'=a3838^post22, a2828^0'=a2828^post22, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post22, b3535^0'=b3535^post22, CromData^0'=CromData^post22, b2626^0'=b2626^post22, __rho_4_^0'=__rho_4_^post22, k2^0'=k2^post22, __rho_12_^0'=__rho_12_^post22, i___02424^0'=i___02424^post22, a11^0'=a11^post22, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post22, __rho_8_^0'=__rho_8_^post22, keR^0'=keR^post22, a4444^0'=a4444^post22, a3232^0'=a3232^post22, ResourceIrp^0'=ResourceIrp^post22, i___01313^0'=i___01313^post22, Irql^0'=Irql^post22, b3333^0'=b3333^post22, __rho_5_^0'=__rho_5_^post22, k4^0'=k4^post22, __rho_1_^0'=__rho_1_^post22, i___04646^0'=i___04646^post22, a2525^0'=a2525^post22, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post22, __rho_9_^0'=__rho_9_^post22, AsyncAddressData^0'=AsyncAddressData^post22, b22^0'=b22^post22, a3737^0'=a3737^post22, k1^0'=k1^post22, __rho_11_^0'=__rho_11_^post22, i___02020^0'=i___02020^post22, IsochResourceData^0'=IsochResourceData^post22, pIrb^0'=pIrb^post22, __rho_7_^0'=__rho_7_^post22, keA^0'=keA^post22, __rho_3_^0'=__rho_3_^post22, a4343^0'=a4343^post22, a3131^0'=a3131^post22, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post22, i^0'=i^post22, Irp^0'=Irp^post22, b2929^0'=b2929^post22, __rho_56_^0'=__rho_56_^post22, k3^0'=k3^post22, __rho_13_^0'=__rho_13_^post22, i___04040^0'=i___04040^post22, a1818^0'=a1818^post22, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post22, __rho_99_^0'=__rho_99_^post22, a77^0'=a77^post22, a3434^0'=a3434^post22, i___099^0'=i___099^post22, __rho_10_^0'=__rho_10_^post22, (-ret_t1394_SubmitIrpSynch3636^post22+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ -i^post22+i^0 == 0 /\ __rho_2_^0-__rho_2_^post22 == 0 /\ a3232^0-a3232^post22 == 0 /\ -__rho_3_^post22+__rho_3_^0 == 0 /\ -a77^post22+a77^0 == 0 /\ k2^0-k2^post22 == 0 /\ CromData^0-CromData^post22 == 0 /\ CromData^0 <= 0 /\ i___01717^0-i___01717^post22 == 0 /\ -__rho_5_^post22+__rho_5_^0 == 0 /\ pIrb^0-pIrb^post22 == 0 /\ -i___04040^post22+i___04040^0 == 0 /\ -__rho_99_^post22+__rho_99_^0 == 0 /\ __rho_6_^0-__rho_6_^post22 == 0 /\ -__rho_10_^post22+__rho_10_^0 == 0 /\ AsyncAddressData^0-AsyncAddressData^post22 == 0 /\ -ResourceIrp^post22+ResourceIrp^0 == 0 /\ __rho_11_^0-__rho_11_^post22 == 0 /\ -b2929^post22+b2929^0 == 0 /\ -__rho_9_^post22+__rho_9_^0 == 0 /\ -a3434^post22+a3434^0 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post22 == 0 /\ -keR^post22+keR^0 == 0 /\ -a1818^post22+a1818^0 == 0 /\ -IsochResourceData^post22+IsochResourceData^0 == 0 /\ -__rho_1_^post22+__rho_1_^0 == 0 /\ k1^0-k1^post22 == 0 /\ a3737^0-a3737^post22 == 0 /\ -__rho_13_^post22+__rho_13_^0 == 0 /\ i___04646^0-i___04646^post22 == 0 /\ __rho_12_^0-__rho_12_^post22 == 0 /\ -__rho_56_^post22+__rho_56_^0 == 0 /\ -ret_IoSetDeviceInterfaceState44^post22+ret_IoSetDeviceInterfaceState44^0 == 0 /\ -ret_IoAllocateIrp2727^post22+ret_IoAllocateIrp2727^0 == 0 /\ -Irp^post22+Irp^0 == 0 /\ __rho_7_^0-__rho_7_^post22 == 0 /\ a3838^0-a3838^post22 == 0 /\ -a3131^post22+a3131^0 == 0 /\ -b22^post22+b22^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post22 == 0 /\ a4444^0-a4444^post22 == 0 /\ Irql^0-Irql^post22 == 0 /\ -k3^post22+k3^0 == 0 /\ i___01313^0-i___01313^post22 == 0 /\ -a2525^post22+a2525^0 == 0 /\ -a11^post22+a11^0 == 0 /\ -i___099^post22+i___099^0 == 0 /\ __rho_8_^0-__rho_8_^post22 == 0 /\ b3535^0-b3535^post22 == 0 /\ -b3333^post22+b3333^0 == 0 /\ a4343^0-a4343^post22 == 0 /\ k5^0-k5^post22 == 0 /\ k4^0-k4^post22 == 0 /\ a2828^0-a2828^post22 == 0 /\ i___02424^0-i___02424^post22 == 0 /\ i___02020^0-i___02020^post22 == 0 /\ ntStatus^0-ntStatus^post22 == 0 /\ -keA^post22+keA^0 == 0 /\ __rho_4_^0-__rho_4_^post22 == 0 /\ IsochDetachData^0-IsochDetachData^post22 == 0 /\ b2626^0-b2626^post22 == 0), cost: 1
  23: l18 -> l17 : i___01717^0'=i___01717^post23, IsochDetachData^0'=IsochDetachData^post23, ntStatus^0'=ntStatus^post23, __rho_6_^0'=__rho_6_^post23, k5^0'=k5^post23, __rho_2_^0'=__rho_2_^post23, a3838^0'=a3838^post23, a2828^0'=a2828^post23, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post23, b3535^0'=b3535^post23, CromData^0'=CromData^post23, b2626^0'=b2626^post23, __rho_4_^0'=__rho_4_^post23, k2^0'=k2^post23, __rho_12_^0'=__rho_12_^post23, i___02424^0'=i___02424^post23, a11^0'=a11^post23, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post23, __rho_8_^0'=__rho_8_^post23, keR^0'=keR^post23, a4444^0'=a4444^post23, a3232^0'=a3232^post23, ResourceIrp^0'=ResourceIrp^post23, i___01313^0'=i___01313^post23, Irql^0'=Irql^post23, b3333^0'=b3333^post23, __rho_5_^0'=__rho_5_^post23, k4^0'=k4^post23, __rho_1_^0'=__rho_1_^post23, i___04646^0'=i___04646^post23, a2525^0'=a2525^post23, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post23, __rho_9_^0'=__rho_9_^post23, AsyncAddressData^0'=AsyncAddressData^post23, b22^0'=b22^post23, a3737^0'=a3737^post23, k1^0'=k1^post23, __rho_11_^0'=__rho_11_^post23, i___02020^0'=i___02020^post23, IsochResourceData^0'=IsochResourceData^post23, pIrb^0'=pIrb^post23, __rho_7_^0'=__rho_7_^post23, keA^0'=keA^post23, __rho_3_^0'=__rho_3_^post23, a4343^0'=a4343^post23, a3131^0'=a3131^post23, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post23, i^0'=i^post23, Irp^0'=Irp^post23, b2929^0'=b2929^post23, __rho_56_^0'=__rho_56_^post23, k3^0'=k3^post23, __rho_13_^0'=__rho_13_^post23, i___04040^0'=i___04040^post23, a1818^0'=a1818^post23, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post23, __rho_99_^0'=__rho_99_^post23, a77^0'=a77^post23, a3434^0'=a3434^post23, i___099^0'=i___099^post23, __rho_10_^0'=__rho_10_^post23, (0 == 0 /\ Irql^0-Irql^post23 == 0 /\ k3^0-k3^post23 == 0 /\ -i___01313^post23+i___01313^0 == 0 /\ -i^post23+i^0 == 0 /\ a3131^0-a3131^post23 == 0 /\ -a3434^post23+a3434^0 == 0 /\ -__rho_7_^post23+__rho_7_^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post23 == 0 /\ -__rho_56_^post23+__rho_56_^0 == 0 /\ ntStatus^0-ntStatus^post23 == 0 /\ ret_IoSetDeviceInterfaceState44^0-ret_IoSetDeviceInterfaceState44^post23 == 0 /\ -k1^post23+k1^0 == 0 /\ CromData^0-CromData^post23 == 0 /\ i___02424^0-i___02424^post23 == 0 /\ -__rho_9_^post23+__rho_9_^0 == 0 /\ -pIrb^post23+pIrb^0 == 0 /\ Irp^0-Irp^post23 == 0 /\ -__rho_3_^post23+__rho_3_^0 == 0 /\ a11^0-a11^post23 == 0 /\ -i___04040^post23+i___04040^0 == 0 /\ i___02020^0-i___02020^post23 == 0 /\ k4^0-k4^post23 == 0 /\ -a3737^post23+a3737^0 == 0 /\ -__rho_10_^post23+__rho_10_^0 == 0 /\ k5^0-k5^post23 == 0 /\ b3535^0-b3535^post23 == 0 /\ a3232^0-a3232^post23 == 0 /\ -b2929^post23+b2929^0 == 0 /\ a2828^0-a2828^post23 == 0 /\ -a1818^post23+a1818^0 == 0 /\ keR^0-keR^post23 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post23+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ IsochDetachData^0-IsochDetachData^post23 == 0 /\ __rho_2_^0-__rho_2_^post23 == 0 /\ -IsochResourceData^post23+IsochResourceData^0 == 0 /\ -ret_IoAllocateIrp2727^post23+ret_IoAllocateIrp2727^0 == 0 /\ __rho_8_^0-__rho_8_^post23 == 0 /\ keA^0-keA^post23 == 0 /\ -__rho_13_^post23+__rho_13_^0 == 0 /\ -ret_ExAllocatePool3030^post23+ret_ExAllocatePool3030^0 == 0 /\ k2^0-k2^post23 == 0 /\ a3838^0-a3838^post23 == 0 /\ 1-CromData^0 <= 0 /\ __rho_1_^0-__rho_1_^post23 == 0 /\ -b22^post23+b22^0 == 0 /\ -a2525^post23+a2525^0 == 0 /\ i___01717^0-i___01717^post23 == 0 /\ -a4343^post23+a4343^0 == 0 /\ __rho_12_^0-__rho_12_^post23 == 0 /\ __rho_5_^0-__rho_5_^post23 == 0 /\ -__rho_99_^post23+__rho_99_^0 == 0 /\ -__rho_6_^post23+__rho_6_^0 == 0 /\ -a77^post23+a77^0 == 0 /\ -i___04646^post23+i___04646^0 == 0 /\ -a4444^post23+a4444^0 == 0 /\ -__rho_11_^post23+__rho_11_^0 == 0 /\ -i___099^post23+i___099^0 == 0 /\ ResourceIrp^0-ResourceIrp^post23 == 0 /\ AsyncAddressData^0-AsyncAddressData^post23 == 0 /\ b2626^0-b2626^post23 == 0 /\ b3333^0-b3333^post23 == 0), cost: 1
  26: l19 -> l20 : i___01717^0'=i___01717^post26, IsochDetachData^0'=IsochDetachData^post26, ntStatus^0'=ntStatus^post26, __rho_6_^0'=__rho_6_^post26, k5^0'=k5^post26, __rho_2_^0'=__rho_2_^post26, a3838^0'=a3838^post26, a2828^0'=a2828^post26, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post26, b3535^0'=b3535^post26, CromData^0'=CromData^post26, b2626^0'=b2626^post26, __rho_4_^0'=__rho_4_^post26, k2^0'=k2^post26, __rho_12_^0'=__rho_12_^post26, i___02424^0'=i___02424^post26, a11^0'=a11^post26, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post26, __rho_8_^0'=__rho_8_^post26, keR^0'=keR^post26, a4444^0'=a4444^post26, a3232^0'=a3232^post26, ResourceIrp^0'=ResourceIrp^post26, i___01313^0'=i___01313^post26, Irql^0'=Irql^post26, b3333^0'=b3333^post26, __rho_5_^0'=__rho_5_^post26, k4^0'=k4^post26, __rho_1_^0'=__rho_1_^post26, i___04646^0'=i___04646^post26, a2525^0'=a2525^post26, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post26, __rho_9_^0'=__rho_9_^post26, AsyncAddressData^0'=AsyncAddressData^post26, b22^0'=b22^post26, a3737^0'=a3737^post26, k1^0'=k1^post26, __rho_11_^0'=__rho_11_^post26, i___02020^0'=i___02020^post26, IsochResourceData^0'=IsochResourceData^post26, pIrb^0'=pIrb^post26, __rho_7_^0'=__rho_7_^post26, keA^0'=keA^post26, __rho_3_^0'=__rho_3_^post26, a4343^0'=a4343^post26, a3131^0'=a3131^post26, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post26, i^0'=i^post26, Irp^0'=Irp^post26, b2929^0'=b2929^post26, __rho_56_^0'=__rho_56_^post26, k3^0'=k3^post26, __rho_13_^0'=__rho_13_^post26, i___04040^0'=i___04040^post26, a1818^0'=a1818^post26, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post26, __rho_99_^0'=__rho_99_^post26, a77^0'=a77^post26, a3434^0'=a3434^post26, i___099^0'=i___099^post26, __rho_10_^0'=__rho_10_^post26, (-__rho_9_^post26+__rho_9_^0 == 0 /\ -__rho_99_^post26+__rho_99_^0 == 0 /\ k5^0-k5^post26 == 0 /\ k4^0-k4^post26 == 0 /\ -k1^post26+k1^0 == 0 /\ -a4343^post26+a4343^0 == 0 /\ -i___04646^post26+i___04646^0 == 0 /\ a3838^0-a3838^post26 == 0 /\ b2626^0-b2626^post26 == 0 /\ CromData^0-CromData^post26 == 0 /\ -a77^post26+a77^0 == 0 /\ -__rho_7_^post26+__rho_7_^0 == 0 /\ -a3737^post26+a3737^0 == 0 /\ -i___04040^post26+i___04040^0 == 0 /\ -i___099^post26+i___099^0 == 0 /\ k3^0-k3^post26 == 0 /\ -b3333^post26+b3333^0 == 0 /\ -__rho_4_^post26+__rho_4_^0 == 0 /\ -b2929^post26+b2929^0 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post26+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ -i^post26+i^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post26 == 0 /\ -a3434^post26+a3434^0 == 0 /\ -ret_ExAllocatePool3030^post26+ret_ExAllocatePool3030^0 == 0 /\ IsochDetachData^0-IsochDetachData^post26 == 0 /\ a2828^0-a2828^post26 == 0 /\ i___02424^0-i___02424^post26 == 0 /\ ret_IoSetDeviceInterfaceState44^0-ret_IoSetDeviceInterfaceState44^post26 == 0 /\ Irql^0-Irql^post26 == 0 /\ keR^0-keR^post26 == 0 /\ -__rho_13_^post26+__rho_13_^0 == 0 /\ a4444^0-a4444^post26 == 0 /\ a3232^0-a3232^post26 == 0 /\ -__rho_3_^post26+__rho_3_^0 == 0 /\ -b22^post26+b22^0 == 0 /\ ntStatus^0-ntStatus^post26 == 0 /\ a11^0-a11^post26 == 0 /\ -Irp^post26+Irp^0 == 0 /\ k2^0-k2^post26 == 0 /\ -pIrb^post26+pIrb^0 == 0 /\ i___02020^0-i___02020^post26 == 0 /\ b3535^0-b3535^post26 == 0 /\ keA^0-keA^post26 == 0 /\ -__rho_56_^post26+__rho_56_^0 == 0 /\ __rho_1_^0-__rho_1_^post26 == 0 /\ -__rho_11_^post26+__rho_11_^0 == 0 /\ -__rho_10_^post26+__rho_10_^0 == 0 /\ -a1818^post26+a1818^0 == 0 /\ __rho_2_^0-__rho_2_^post26 == 0 /\ __rho_8_^0-__rho_8_^post26 == 0 /\ AsyncAddressData^0-AsyncAddressData^post26 == 0 /\ -IsochResourceData^post26+IsochResourceData^0 == 0 /\ ResourceIrp^0-ResourceIrp^post26 == 0 /\ i___01717^0-i___01717^post26 == 0 /\ -ret_IoAllocateIrp2727^post26+ret_IoAllocateIrp2727^0 == 0 /\ -i___01313^post26+i___01313^0 == 0 /\ __rho_12_^0-__rho_12_^post26 == 0 /\ __rho_5_^0-__rho_5_^post26 == 0 /\ a3131^0-a3131^post26 == 0 /\ __rho_6_^0-__rho_6_^post26 == 0 /\ -a2525^post26+a2525^0 == 0), cost: 1
  31: l20 -> l24 : i___01717^0'=i___01717^post31, IsochDetachData^0'=IsochDetachData^post31, ntStatus^0'=ntStatus^post31, __rho_6_^0'=__rho_6_^post31, k5^0'=k5^post31, __rho_2_^0'=__rho_2_^post31, a3838^0'=a3838^post31, a2828^0'=a2828^post31, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post31, b3535^0'=b3535^post31, CromData^0'=CromData^post31, b2626^0'=b2626^post31, __rho_4_^0'=__rho_4_^post31, k2^0'=k2^post31, __rho_12_^0'=__rho_12_^post31, i___02424^0'=i___02424^post31, a11^0'=a11^post31, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post31, __rho_8_^0'=__rho_8_^post31, keR^0'=keR^post31, a4444^0'=a4444^post31, a3232^0'=a3232^post31, ResourceIrp^0'=ResourceIrp^post31, i___01313^0'=i___01313^post31, Irql^0'=Irql^post31, b3333^0'=b3333^post31, __rho_5_^0'=__rho_5_^post31, k4^0'=k4^post31, __rho_1_^0'=__rho_1_^post31, i___04646^0'=i___04646^post31, a2525^0'=a2525^post31, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post31, __rho_9_^0'=__rho_9_^post31, AsyncAddressData^0'=AsyncAddressData^post31, b22^0'=b22^post31, a3737^0'=a3737^post31, k1^0'=k1^post31, __rho_11_^0'=__rho_11_^post31, i___02020^0'=i___02020^post31, IsochResourceData^0'=IsochResourceData^post31, pIrb^0'=pIrb^post31, __rho_7_^0'=__rho_7_^post31, keA^0'=keA^post31, __rho_3_^0'=__rho_3_^post31, a4343^0'=a4343^post31, a3131^0'=a3131^post31, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post31, i^0'=i^post31, Irp^0'=Irp^post31, b2929^0'=b2929^post31, __rho_56_^0'=__rho_56_^post31, k3^0'=k3^post31, __rho_13_^0'=__rho_13_^post31, i___04040^0'=i___04040^post31, a1818^0'=a1818^post31, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post31, __rho_99_^0'=__rho_99_^post31, a77^0'=a77^post31, a3434^0'=a3434^post31, i___099^0'=i___099^post31, __rho_10_^0'=__rho_10_^post31, (0 == 0 /\ i___04040^0-i___04040^post31 == 0 /\ -k3^post31+k3^0 == 0 /\ a2828^0-a2828^post31 == 0 /\ a3838^0-a3838^post31 == 0 /\ -__rho_10_^post31+__rho_10_^0 == 0 /\ __rho_4_^0-__rho_4_^post31 == 0 /\ __rho_2_^0-__rho_2_^post31 == 0 /\ i___01717^0-i___01717^post31 == 0 /\ -a3434^post31+a3434^0 == 0 /\ k1^0-k1^post31 == 0 /\ -b2626^post31+b2626^0 == 0 /\ -__rho_99_^post31+__rho_99_^0 == 0 /\ -a11^post31+a11^0 == 0 /\ -a1818^post31+a1818^0 == 0 /\ __rho_6_^0-__rho_6_^post31 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post31 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post31+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ -ret_IoAllocateIrp2727^post31+ret_IoAllocateIrp2727^0 == 0 /\ -__rho_8_^post31+__rho_8_^0 == 0 /\ -IsochResourceData^post31+IsochResourceData^0 == 0 /\ keR^0-keR^post31 == 0 /\ -i^post31+i^0 == 0 /\ __rho_11_^0-__rho_11_^post31 == 0 /\ i___01313^0-i___01313^post31 == 0 /\ -a3131^post31+a3131^0 == 0 /\ pIrb^0-pIrb^post31 == 0 /\ CromData^0-CromData^post31 == 0 /\ -a3232^post31+a3232^0 == 0 /\ -ret_IoSetDeviceInterfaceState44^post31+ret_IoSetDeviceInterfaceState44^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post31 == 0 /\ -a4343^post31+a4343^0 == 0 /\ ntStatus^0-ntStatus^post31 == 0 /\ a2525^0-a2525^post31 == 0 /\ -AsyncAddressData^post31+AsyncAddressData^0 == 0 /\ -__rho_9_^post31+__rho_9_^0 == 0 /\ -b2929^post31+b2929^0 == 0 /\ -keA^post31+keA^0 == 0 /\ __rho_5_^0-__rho_5_^post31 == 0 /\ -__rho_1_^post31+__rho_1_^0 == 0 /\ k2^0-k2^post31 == 0 /\ -b3333^post31+b3333^0 == 0 /\ ResourceIrp^0-ResourceIrp^post31 == 0 /\ i___02020^0-i___02020^post31 == 0 /\ __rho_7_^0-__rho_7_^post31 == 0 /\ -b22^post31+b22^0 == 0 /\ a4444^0-a4444^post31 == 0 /\ 1-k5^0 <= 0 /\ -__rho_13_^post31+__rho_13_^0 == 0 /\ -__rho_3_^post31+__rho_3_^0 == 0 /\ a3737^0-a3737^post31 == 0 /\ __rho_12_^0-__rho_12_^post31 == 0 /\ -Irp^post31+Irp^0 == 0 /\ Irql^0-Irql^post31 == 0 /\ IsochDetachData^0-IsochDetachData^post31 == 0 /\ -i___02424^post31+i___02424^0 == 0 /\ k5^0-k5^post31 == 0 /\ -a77^post31+a77^0 == 0 /\ b3535^0-b3535^post31 == 0 /\ -i___04646^post31+i___04646^0 == 0 /\ k4^0-k4^post31 == 0 /\ -i___099^post31+i___099^0 == 0), cost: 1
  32: l20 -> l25 : i___01717^0'=i___01717^post32, IsochDetachData^0'=IsochDetachData^post32, ntStatus^0'=ntStatus^post32, __rho_6_^0'=__rho_6_^post32, k5^0'=k5^post32, __rho_2_^0'=__rho_2_^post32, a3838^0'=a3838^post32, a2828^0'=a2828^post32, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post32, b3535^0'=b3535^post32, CromData^0'=CromData^post32, b2626^0'=b2626^post32, __rho_4_^0'=__rho_4_^post32, k2^0'=k2^post32, __rho_12_^0'=__rho_12_^post32, i___02424^0'=i___02424^post32, a11^0'=a11^post32, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post32, __rho_8_^0'=__rho_8_^post32, keR^0'=keR^post32, a4444^0'=a4444^post32, a3232^0'=a3232^post32, ResourceIrp^0'=ResourceIrp^post32, i___01313^0'=i___01313^post32, Irql^0'=Irql^post32, b3333^0'=b3333^post32, __rho_5_^0'=__rho_5_^post32, k4^0'=k4^post32, __rho_1_^0'=__rho_1_^post32, i___04646^0'=i___04646^post32, a2525^0'=a2525^post32, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post32, __rho_9_^0'=__rho_9_^post32, AsyncAddressData^0'=AsyncAddressData^post32, b22^0'=b22^post32, a3737^0'=a3737^post32, k1^0'=k1^post32, __rho_11_^0'=__rho_11_^post32, i___02020^0'=i___02020^post32, IsochResourceData^0'=IsochResourceData^post32, pIrb^0'=pIrb^post32, __rho_7_^0'=__rho_7_^post32, keA^0'=keA^post32, __rho_3_^0'=__rho_3_^post32, a4343^0'=a4343^post32, a3131^0'=a3131^post32, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post32, i^0'=i^post32, Irp^0'=Irp^post32, b2929^0'=b2929^post32, __rho_56_^0'=__rho_56_^post32, k3^0'=k3^post32, __rho_13_^0'=__rho_13_^post32, i___04040^0'=i___04040^post32, a1818^0'=a1818^post32, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post32, __rho_99_^0'=__rho_99_^post32, a77^0'=a77^post32, a3434^0'=a3434^post32, i___099^0'=i___099^post32, __rho_10_^0'=__rho_10_^post32, (-a3434^post32+a3434^0 == 0 /\ -__rho_10_^post32+__rho_10_^0 == 0 /\ -i^post32+i^0 == 0 /\ __rho_9_^0-__rho_9_^post32 == 0 /\ -pIrb^post32+pIrb^0 == 0 /\ CromData^0-CromData^post32 == 0 /\ k5^0 <= 0 /\ -1+keR^111 == 0 /\ -__rho_11_^post32+__rho_11_^0 == 0 /\ -k4^post32+k4^0 == 0 /\ -a3232^post32+a3232^0 == 0 /\ a4444^0-a4444^post32 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post32 == 0 /\ __rho_4_^0-__rho_4_^post32 == 0 /\ -__rho_8_^post32+__rho_8_^0 == 0 /\ __rho_7_^0-__rho_7_^post32 == 0 /\ b22^0-b22^post32 == 0 /\ -b2929^post32+b2929^0 == 0 /\ __rho_1_^0-__rho_1_^post32 == 0 /\ -__rho_99_^post32+__rho_99_^0 == 0 /\ -a1818^post32+a1818^0 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post32+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ a11^0-a11^post32 == 0 /\ i___02020^0-i___02020^post32 == 0 /\ k5^0-k5^post32 == 0 /\ keR^post32 == 0 /\ -a3737^post32+a3737^0 == 0 /\ ntStatus^0-ntStatus^post32 == 0 /\ b3333^0-b3333^post32 == 0 /\ b3535^0-b3535^post32 == 0 /\ IsochDetachData^0-IsochDetachData^post32 == 0 /\ -ret_IoAllocateIrp2727^post32+ret_IoAllocateIrp2727^0 == 0 /\ AsyncAddressData^0-AsyncAddressData^post32 == 0 /\ __rho_12_^0-__rho_12_^post32 == 0 /\ a2828^0-a2828^post32 == 0 /\ keR^220 == 0 /\ -i___04040^post32+i___04040^0 == 0 /\ a3131^0-a3131^post32 == 0 /\ ret_IoSetDeviceInterfaceState44^0-ret_IoSetDeviceInterfaceState44^post32 == 0 /\ -ret_ExAllocatePool3030^post32+ret_ExAllocatePool3030^0 == 0 /\ i___01313^0-i___01313^post32 == 0 /\ -Irp^post32+Irp^0 == 0 /\ -keA^post32+keA^0 == 0 /\ __rho_2_^0-__rho_2_^post32 == 0 /\ -IsochResourceData^post32+IsochResourceData^0 == 0 /\ a3838^0-a3838^post32 == 0 /\ b2626^0-b2626^post32 == 0 /\ -k2^post32+k2^0 == 0 /\ __rho_5_^0-__rho_5_^post32 == 0 /\ -ResourceIrp^post32+ResourceIrp^0 == 0 /\ -__rho_13_^post32+__rho_13_^0 == 0 /\ -Irql^0+i___04646^post32 == 0 /\ i___01717^0-i___01717^post32 == 0 /\ k1^0-k1^post32 == 0 /\ i___02424^0-i___02424^post32 == 0 /\ -__rho_3_^post32+__rho_3_^0 == 0 /\ -__rho_6_^post32+__rho_6_^0 == 0 /\ a2525^0-a2525^post32 == 0 /\ -__rho_56_^post32+__rho_56_^0 == 0 /\ Irql^0-Irql^post32 == 0 /\ -a77^post32+a77^0 == 0 /\ -1+keR^320 == 0 /\ -i___099^post32+i___099^0 == 0 /\ -k3^post32+k3^0 == 0 /\ a4343^0-a4343^post32 == 0), cost: 1
  28: l23 -> l19 : i___01717^0'=i___01717^post28, IsochDetachData^0'=IsochDetachData^post28, ntStatus^0'=ntStatus^post28, __rho_6_^0'=__rho_6_^post28, k5^0'=k5^post28, __rho_2_^0'=__rho_2_^post28, a3838^0'=a3838^post28, a2828^0'=a2828^post28, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post28, b3535^0'=b3535^post28, CromData^0'=CromData^post28, b2626^0'=b2626^post28, __rho_4_^0'=__rho_4_^post28, k2^0'=k2^post28, __rho_12_^0'=__rho_12_^post28, i___02424^0'=i___02424^post28, a11^0'=a11^post28, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post28, __rho_8_^0'=__rho_8_^post28, keR^0'=keR^post28, a4444^0'=a4444^post28, a3232^0'=a3232^post28, ResourceIrp^0'=ResourceIrp^post28, i___01313^0'=i___01313^post28, Irql^0'=Irql^post28, b3333^0'=b3333^post28, __rho_5_^0'=__rho_5_^post28, k4^0'=k4^post28, __rho_1_^0'=__rho_1_^post28, i___04646^0'=i___04646^post28, a2525^0'=a2525^post28, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post28, __rho_9_^0'=__rho_9_^post28, AsyncAddressData^0'=AsyncAddressData^post28, b22^0'=b22^post28, a3737^0'=a3737^post28, k1^0'=k1^post28, __rho_11_^0'=__rho_11_^post28, i___02020^0'=i___02020^post28, IsochResourceData^0'=IsochResourceData^post28, pIrb^0'=pIrb^post28, __rho_7_^0'=__rho_7_^post28, keA^0'=keA^post28, __rho_3_^0'=__rho_3_^post28, a4343^0'=a4343^post28, a3131^0'=a3131^post28, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post28, i^0'=i^post28, Irp^0'=Irp^post28, b2929^0'=b2929^post28, __rho_56_^0'=__rho_56_^post28, k3^0'=k3^post28, __rho_13_^0'=__rho_13_^post28, i___04040^0'=i___04040^post28, a1818^0'=a1818^post28, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post28, __rho_99_^0'=__rho_99_^post28, a77^0'=a77^post28, a3434^0'=a3434^post28, i___099^0'=i___099^post28, __rho_10_^0'=__rho_10_^post28, (-a77^post28+a77^0 == 0 /\ -i___01313^post28+i___01313^0 == 0 /\ a2828^0-a2828^post28 == 0 /\ ret_t1394_SubmitIrpSynch3636^0-ret_t1394_SubmitIrpSynch3636^post28 == 0 /\ k5^0-k5^post28 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post28 == 0 /\ -ret_IoSetDeviceInterfaceState44^post28+ret_IoSetDeviceInterfaceState44^0 == 0 /\ __rho_9_^0-__rho_9_^post28 == 0 /\ -ret_IoAllocateIrp2727^post28+ret_IoAllocateIrp2727^0 == 0 /\ -CromData^post28+CromData^0 == 0 /\ -k1^post28+k1^0 == 0 /\ b3333^0-b3333^post28 == 0 /\ keR^0-keR^post28 == 0 /\ __rho_2_^0-__rho_2_^post28 == 0 /\ -i___099^post28+i___099^0 == 0 /\ IsochDetachData^0-IsochDetachData^post28 == 0 /\ IsochResourceData^0-IsochResourceData^post28 == 0 /\ -1+a4444^post28 == 0 /\ -k3^post28+k3^0 == 0 /\ __rho_8_^0-__rho_8_^post28 == 0 /\ b2929^0-b2929^post28 == 0 /\ __rho_13_^0-__rho_13_^post28 == 0 /\ -a3434^post28+a3434^0 == 0 /\ ResourceIrp^0-ResourceIrp^post28 == 0 /\ a3838^0-a3838^post28 == 0 /\ i^0-i^post28 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post28 == 0 /\ ntStatus^0-ntStatus^post28 == 0 /\ -__rho_99_^post28+__rho_99_^0 == 0 /\ a11^0-a11^post28 == 0 /\ -a1818^post28+a1818^0 == 0 /\ -__rho_7_^post28+__rho_7_^0 == 0 /\ a3232^0-a3232^post28 == 0 /\ -__rho_56_^post28+__rho_56_^0 == 0 /\ -2+a4343^post28 == 0 /\ -__rho_5_^post28+__rho_5_^0 == 0 /\ -AsyncAddressData^post28+AsyncAddressData^0 == 0 /\ __rho_3_^0-__rho_3_^post28 == 0 /\ __rho_6_^0-__rho_6_^post28 == 0 /\ k2^0-k2^post28 == 0 /\ i___02424^0-i___02424^post28 == 0 /\ -a3131^post28+a3131^0 == 0 /\ -__rho_11_^post28+__rho_11_^0 == 0 /\ b2626^0-b2626^post28 == 0 /\ -k4^post28+k4^0 == 0 /\ b22^0-b22^post28 == 0 /\ i___01717^0-i___01717^post28 == 0 /\ -a2525^post28+a2525^0 == 0 /\ -i___04040^post28+i___04040^0 == 0 /\ -a3737^post28+a3737^0 == 0 /\ -__rho_10_^post28+__rho_10_^0 == 0 /\ b3535^0-b3535^post28 == 0 /\ -Irp^post28+Irp^0 == 0 /\ -__rho_4_^post28+__rho_4_^0 == 0 /\ -__rho_1_^post28+__rho_1_^0 == 0 /\ -pIrb^post28+pIrb^0 == 0 /\ -i___02020^post28+i___02020^0 == 0 /\ i___04646^0-i___04646^post28 == 0 /\ -__rho_12_^post28+__rho_12_^0 == 0 /\ -keA^post28+keA^0 == 0 /\ -Irql^post28+Irql^0 == 0), cost: 1
  29: l24 -> l23 : i___01717^0'=i___01717^post29, IsochDetachData^0'=IsochDetachData^post29, ntStatus^0'=ntStatus^post29, __rho_6_^0'=__rho_6_^post29, k5^0'=k5^post29, __rho_2_^0'=__rho_2_^post29, a3838^0'=a3838^post29, a2828^0'=a2828^post29, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post29, b3535^0'=b3535^post29, CromData^0'=CromData^post29, b2626^0'=b2626^post29, __rho_4_^0'=__rho_4_^post29, k2^0'=k2^post29, __rho_12_^0'=__rho_12_^post29, i___02424^0'=i___02424^post29, a11^0'=a11^post29, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post29, __rho_8_^0'=__rho_8_^post29, keR^0'=keR^post29, a4444^0'=a4444^post29, a3232^0'=a3232^post29, ResourceIrp^0'=ResourceIrp^post29, i___01313^0'=i___01313^post29, Irql^0'=Irql^post29, b3333^0'=b3333^post29, __rho_5_^0'=__rho_5_^post29, k4^0'=k4^post29, __rho_1_^0'=__rho_1_^post29, i___04646^0'=i___04646^post29, a2525^0'=a2525^post29, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post29, __rho_9_^0'=__rho_9_^post29, AsyncAddressData^0'=AsyncAddressData^post29, b22^0'=b22^post29, a3737^0'=a3737^post29, k1^0'=k1^post29, __rho_11_^0'=__rho_11_^post29, i___02020^0'=i___02020^post29, IsochResourceData^0'=IsochResourceData^post29, pIrb^0'=pIrb^post29, __rho_7_^0'=__rho_7_^post29, keA^0'=keA^post29, __rho_3_^0'=__rho_3_^post29, a4343^0'=a4343^post29, a3131^0'=a3131^post29, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post29, i^0'=i^post29, Irp^0'=Irp^post29, b2929^0'=b2929^post29, __rho_56_^0'=__rho_56_^post29, k3^0'=k3^post29, __rho_13_^0'=__rho_13_^post29, i___04040^0'=i___04040^post29, a1818^0'=a1818^post29, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post29, __rho_99_^0'=__rho_99_^post29, a77^0'=a77^post29, a3434^0'=a3434^post29, i___099^0'=i___099^post29, __rho_10_^0'=__rho_10_^post29, (a4444^0-a4444^post29 == 0 /\ Irp^0-Irp^post29 == 0 /\ -__rho_12_^post29+__rho_12_^0 == 0 /\ b3333^0-b3333^post29 == 0 /\ __rho_13_^0-__rho_13_^post29 == 0 /\ __rho_2_^0-__rho_2_^post29 == 0 /\ -keA^post29+keA^0 == 0 /\ k2^0-k2^post29 == 0 /\ k5^0-k5^post29 == 0 /\ -__rho_56_^post29+__rho_56_^0 == 0 /\ -ret_IoSetDeviceInterfaceState44^post29+ret_IoSetDeviceInterfaceState44^0 == 0 /\ -Irql^post29+Irql^0 == 0 /\ __rho_9_^0-__rho_9_^post29 == 0 /\ a2525^0-a2525^post29 == 0 /\ -i___02020^post29+i___02020^0 == 0 /\ __rho_5_^0-__rho_5_^post29 == 0 /\ ret_t1394_SubmitIrpSynch3636^0-ret_t1394_SubmitIrpSynch3636^post29 == 0 /\ -__rho_11_^post29+__rho_11_^0 == 0 /\ a3838^0-a3838^post29 == 0 /\ -i___01313^post29+i___01313^0 == 0 /\ IsochResourceData^0-IsochResourceData^post29 == 0 /\ __rho_8_^0-__rho_8_^post29 == 0 /\ b2626^0-b2626^post29 == 0 /\ -__rho_10_^post29+__rho_10_^0 == 0 /\ -i___04040^post29+i___04040^0 == 0 /\ b22^0-b22^post29 == 0 /\ -a3737^post29+a3737^0 == 0 /\ -i^post29+i^0 == 0 /\ __rho_1_^0-__rho_1_^post29 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post29 == 0 /\ i___02424^0-i___02424^post29 == 0 /\ -ret_IoAllocateIrp2727^post29+ret_IoAllocateIrp2727^0 == 0 /\ -a3434^post29+a3434^0 == 0 /\ -__rho_4_^post29+__rho_4_^0 == 0 /\ __rho_6_^0-__rho_6_^post29 == 0 /\ ResourceIrp^0-ResourceIrp^post29 == 0 /\ __rho_3_^0-__rho_3_^post29 == 0 /\ b3535^0-b3535^post29 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post29 == 0 /\ -a77^post29+a77^0 == 0 /\ ntStatus^0-ntStatus^post29 == 0 /\ keR^0-keR^post29 == 0 /\ CromData^0-CromData^post29 == 0 /\ IsochDetachData^0-IsochDetachData^post29 == 0 /\ -AsyncAddressData^post29+AsyncAddressData^0 == 0 /\ -a4343^post29+a4343^0 == 0 /\ -pIrb^post29+pIrb^0 == 0 /\ -b2929^post29+b2929^0 == 0 /\ a11^0-a11^post29 == 0 /\ __rho_56_^0 <= 0 /\ -a3131^post29+a3131^0 == 0 /\ -__rho_99_^post29+__rho_99_^0 == 0 /\ -k4^post29+k4^0 == 0 /\ -k1^post29+k1^0 == 0 /\ i___04646^0-i___04646^post29 == 0 /\ -a1818^post29+a1818^0 == 0 /\ -i___099^post29+i___099^0 == 0 /\ -a2828^post29+a2828^0 == 0 /\ -__rho_7_^post29+__rho_7_^0 == 0 /\ i___01717^0-i___01717^post29 == 0 /\ -k3^post29+k3^0 == 0 /\ a3232^0-a3232^post29 == 0), cost: 1
  30: l24 -> l23 : i___01717^0'=i___01717^post30, IsochDetachData^0'=IsochDetachData^post30, ntStatus^0'=ntStatus^post30, __rho_6_^0'=__rho_6_^post30, k5^0'=k5^post30, __rho_2_^0'=__rho_2_^post30, a3838^0'=a3838^post30, a2828^0'=a2828^post30, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post30, b3535^0'=b3535^post30, CromData^0'=CromData^post30, b2626^0'=b2626^post30, __rho_4_^0'=__rho_4_^post30, k2^0'=k2^post30, __rho_12_^0'=__rho_12_^post30, i___02424^0'=i___02424^post30, a11^0'=a11^post30, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post30, __rho_8_^0'=__rho_8_^post30, keR^0'=keR^post30, a4444^0'=a4444^post30, a3232^0'=a3232^post30, ResourceIrp^0'=ResourceIrp^post30, i___01313^0'=i___01313^post30, Irql^0'=Irql^post30, b3333^0'=b3333^post30, __rho_5_^0'=__rho_5_^post30, k4^0'=k4^post30, __rho_1_^0'=__rho_1_^post30, i___04646^0'=i___04646^post30, a2525^0'=a2525^post30, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post30, __rho_9_^0'=__rho_9_^post30, AsyncAddressData^0'=AsyncAddressData^post30, b22^0'=b22^post30, a3737^0'=a3737^post30, k1^0'=k1^post30, __rho_11_^0'=__rho_11_^post30, i___02020^0'=i___02020^post30, IsochResourceData^0'=IsochResourceData^post30, pIrb^0'=pIrb^post30, __rho_7_^0'=__rho_7_^post30, keA^0'=keA^post30, __rho_3_^0'=__rho_3_^post30, a4343^0'=a4343^post30, a3131^0'=a3131^post30, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post30, i^0'=i^post30, Irp^0'=Irp^post30, b2929^0'=b2929^post30, __rho_56_^0'=__rho_56_^post30, k3^0'=k3^post30, __rho_13_^0'=__rho_13_^post30, i___04040^0'=i___04040^post30, a1818^0'=a1818^post30, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post30, __rho_99_^0'=__rho_99_^post30, a77^0'=a77^post30, a3434^0'=a3434^post30, i___099^0'=i___099^post30, __rho_10_^0'=__rho_10_^post30, (i___04646^0-i___04646^post30 == 0 /\ -i___04040^post30+i___04040^0 == 0 /\ ret_t1394_SubmitIrpSynch3636^0-ret_t1394_SubmitIrpSynch3636^post30 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post30 == 0 /\ -a3434^post30+a3434^0 == 0 /\ -k3^post30+k3^0 == 0 /\ ntStatus^0-ntStatus^post30 == 0 /\ -__rho_99_^post30+__rho_99_^0 == 0 /\ -__rho_5_^post30+__rho_5_^0 == 0 /\ a2525^0-a2525^post30 == 0 /\ 1-k5^0+k5^post30 == 0 /\ __rho_13_^0-__rho_13_^post30 == 0 /\ b2929^0-b2929^post30 == 0 /\ -a1818^post30+a1818^0 == 0 /\ -__rho_7_^post30+__rho_7_^0 == 0 /\ ResourceIrp^0-ResourceIrp^post30 == 0 /\ -__rho_8_^post30+__rho_8_^0 == 0 /\ i^0-i^post30 == 0 /\ a4444^0-a4444^post30 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post30 == 0 /\ 1-__rho_56_^0 <= 0 /\ -AsyncAddressData^post30+AsyncAddressData^0 == 0 /\ -k1^post30+k1^0 == 0 /\ a3737^0-a3737^post30 == 0 /\ IsochDetachData^0-IsochDetachData^post30 == 0 /\ a11^0-a11^post30 == 0 /\ -k2^post30+k2^0 == 0 /\ -a3131^post30+a3131^0 == 0 /\ -k4^post30+k4^0 == 0 /\ b3535^0-b3535^post30 == 0 /\ a2828^0-a2828^post30 == 0 /\ -__rho_10_^post30+__rho_10_^0 == 0 /\ -ret_IoSetDeviceInterfaceState44^post30+ret_IoSetDeviceInterfaceState44^0 == 0 /\ a3838^0-a3838^post30 == 0 /\ -a4343^post30+a4343^0 == 0 /\ -__rho_12_^post30+__rho_12_^0 == 0 /\ -Irp^post30+Irp^0 == 0 /\ b2626^0-b2626^post30 == 0 /\ __rho_4_^0-__rho_4_^post30 == 0 /\ __rho_2_^0-__rho_2_^post30 == 0 /\ -__rho_1_^post30+__rho_1_^0 == 0 /\ a77^0-a77^post30 == 0 /\ -i___02020^post30+i___02020^0 == 0 /\ -Irql^post30+Irql^0 == 0 /\ -keA^post30+keA^0 == 0 /\ i___01717^0-i___01717^post30 == 0 /\ b3333^0-b3333^post30 == 0 /\ pIrb^0-pIrb^post30 == 0 /\ -__rho_56_^post30+__rho_56_^0 == 0 /\ __rho_6_^0-__rho_6_^post30 == 0 /\ i___02424^0-i___02424^post30 == 0 /\ -b22^post30+b22^0 == 0 /\ keR^0-keR^post30 == 0 /\ __rho_9_^0-__rho_9_^post30 == 0 /\ a3232^0-a3232^post30 == 0 /\ -IsochResourceData^post30+IsochResourceData^0 == 0 /\ -__rho_11_^post30+__rho_11_^0 == 0 /\ -i___099^post30+i___099^0 == 0 /\ -CromData^post30+CromData^0 == 0 /\ -ret_IoAllocateIrp2727^post30+ret_IoAllocateIrp2727^0 == 0 /\ __rho_3_^0-__rho_3_^post30 == 0 /\ i___01313^0-i___01313^post30 == 0), cost: 1
  33: l25 -> l26 : i___01717^0'=i___01717^post33, IsochDetachData^0'=IsochDetachData^post33, ntStatus^0'=ntStatus^post33, __rho_6_^0'=__rho_6_^post33, k5^0'=k5^post33, __rho_2_^0'=__rho_2_^post33, a3838^0'=a3838^post33, a2828^0'=a2828^post33, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post33, b3535^0'=b3535^post33, CromData^0'=CromData^post33, b2626^0'=b2626^post33, __rho_4_^0'=__rho_4_^post33, k2^0'=k2^post33, __rho_12_^0'=__rho_12_^post33, i___02424^0'=i___02424^post33, a11^0'=a11^post33, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post33, __rho_8_^0'=__rho_8_^post33, keR^0'=keR^post33, a4444^0'=a4444^post33, a3232^0'=a3232^post33, ResourceIrp^0'=ResourceIrp^post33, i___01313^0'=i___01313^post33, Irql^0'=Irql^post33, b3333^0'=b3333^post33, __rho_5_^0'=__rho_5_^post33, k4^0'=k4^post33, __rho_1_^0'=__rho_1_^post33, i___04646^0'=i___04646^post33, a2525^0'=a2525^post33, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post33, __rho_9_^0'=__rho_9_^post33, AsyncAddressData^0'=AsyncAddressData^post33, b22^0'=b22^post33, a3737^0'=a3737^post33, k1^0'=k1^post33, __rho_11_^0'=__rho_11_^post33, i___02020^0'=i___02020^post33, IsochResourceData^0'=IsochResourceData^post33, pIrb^0'=pIrb^post33, __rho_7_^0'=__rho_7_^post33, keA^0'=keA^post33, __rho_3_^0'=__rho_3_^post33, a4343^0'=a4343^post33, a3131^0'=a3131^post33, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post33, i^0'=i^post33, Irp^0'=Irp^post33, b2929^0'=b2929^post33, __rho_56_^0'=__rho_56_^post33, k3^0'=k3^post33, __rho_13_^0'=__rho_13_^post33, i___04040^0'=i___04040^post33, a1818^0'=a1818^post33, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post33, __rho_99_^0'=__rho_99_^post33, a77^0'=a77^post33, a3434^0'=a3434^post33, i___099^0'=i___099^post33, __rho_10_^0'=__rho_10_^post33, (-k1^post33+k1^0 == 0 /\ -b2929^post33+b2929^0 == 0 /\ __rho_8_^0-__rho_8_^post33 == 0 /\ k5^0-k5^post33 == 0 /\ b3333^0-b3333^post33 == 0 /\ -i___099^post33+i___099^0 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post33 == 0 /\ -__rho_99_^post33+__rho_99_^0 == 0 /\ -Irql^post33+Irql^0 == 0 /\ -i___04040^post33+i___04040^0 == 0 /\ -a4343^post33+a4343^0 == 0 /\ ret_t1394_SubmitIrpSynch3636^0-ret_t1394_SubmitIrpSynch3636^post33 == 0 /\ -__rho_12_^post33+__rho_12_^0 == 0 /\ a3737^0-a3737^post33 == 0 /\ -i___01313^post33+i___01313^0 == 0 /\ -AsyncAddressData^post33+AsyncAddressData^0 == 0 /\ a3838^0-a3838^post33 == 0 /\ ntStatus^0-ntStatus^post33 == 0 /\ b2626^0-b2626^post33 == 0 /\ -__rho_5_^post33+__rho_5_^0 == 0 /\ a2828^0-a2828^post33 == 0 /\ i^0-i^post33 == 0 /\ -__rho_7_^post33+__rho_7_^0 == 0 /\ a2525^0-a2525^post33 == 0 /\ IsochDetachData^0-IsochDetachData^post33 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post33 == 0 /\ -ret_IoSetDeviceInterfaceState44^post33+ret_IoSetDeviceInterfaceState44^0 == 0 /\ -__rho_56_^post33+__rho_56_^0 == 0 /\ -__rho_13_^post33+__rho_13_^0 == 0 /\ a4444^0-a4444^post33 == 0 /\ -a77^post33+a77^0 == 0 /\ a11^0-a11^post33 == 0 /\ -Irp^post33+Irp^0 == 0 /\ ResourceIrp^0-ResourceIrp^post33 == 0 /\ b22^0-b22^post33 == 0 /\ b3535^0-b3535^post33 == 0 /\ __rho_3_^0-__rho_3_^post33 == 0 /\ -__rho_11_^post33+__rho_11_^0 == 0 /\ -a3131^post33+a3131^0 == 0 /\ -i___02020^post33+i___02020^0 == 0 /\ -k4^post33+k4^0 == 0 /\ keR^0-keR^post33 == 0 /\ __rho_1_^0-__rho_1_^post33 == 0 /\ i___02424^0-i___02424^post33 == 0 /\ -a1818^post33+a1818^0 == 0 /\ __rho_2_^0-__rho_2_^post33 == 0 /\ __rho_4_^0-__rho_4_^post33 == 0 /\ -pIrb^post33+pIrb^0 == 0 /\ -a3434^post33+a3434^0 == 0 /\ -__rho_10_^post33+__rho_10_^0 == 0 /\ -k3^post33+k3^0 == 0 /\ -CromData^post33+CromData^0 == 0 /\ __rho_9_^0-__rho_9_^post33 == 0 /\ a3232^0-a3232^post33 == 0 /\ -keA^post33+keA^0 == 0 /\ -IsochResourceData^post33+IsochResourceData^0 == 0 /\ i___01717^0-i___01717^post33 == 0 /\ i___04646^0-i___04646^post33 == 0 /\ k2^0-k2^post33 == 0 /\ ret_IoAllocateIrp2727^0-ret_IoAllocateIrp2727^post33 == 0 /\ __rho_6_^0-__rho_6_^post33 == 0), cost: 1
  34: l26 -> l25 : i___01717^0'=i___01717^post34, IsochDetachData^0'=IsochDetachData^post34, ntStatus^0'=ntStatus^post34, __rho_6_^0'=__rho_6_^post34, k5^0'=k5^post34, __rho_2_^0'=__rho_2_^post34, a3838^0'=a3838^post34, a2828^0'=a2828^post34, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post34, b3535^0'=b3535^post34, CromData^0'=CromData^post34, b2626^0'=b2626^post34, __rho_4_^0'=__rho_4_^post34, k2^0'=k2^post34, __rho_12_^0'=__rho_12_^post34, i___02424^0'=i___02424^post34, a11^0'=a11^post34, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post34, __rho_8_^0'=__rho_8_^post34, keR^0'=keR^post34, a4444^0'=a4444^post34, a3232^0'=a3232^post34, ResourceIrp^0'=ResourceIrp^post34, i___01313^0'=i___01313^post34, Irql^0'=Irql^post34, b3333^0'=b3333^post34, __rho_5_^0'=__rho_5_^post34, k4^0'=k4^post34, __rho_1_^0'=__rho_1_^post34, i___04646^0'=i___04646^post34, a2525^0'=a2525^post34, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post34, __rho_9_^0'=__rho_9_^post34, AsyncAddressData^0'=AsyncAddressData^post34, b22^0'=b22^post34, a3737^0'=a3737^post34, k1^0'=k1^post34, __rho_11_^0'=__rho_11_^post34, i___02020^0'=i___02020^post34, IsochResourceData^0'=IsochResourceData^post34, pIrb^0'=pIrb^post34, __rho_7_^0'=__rho_7_^post34, keA^0'=keA^post34, __rho_3_^0'=__rho_3_^post34, a4343^0'=a4343^post34, a3131^0'=a3131^post34, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post34, i^0'=i^post34, Irp^0'=Irp^post34, b2929^0'=b2929^post34, __rho_56_^0'=__rho_56_^post34, k3^0'=k3^post34, __rho_13_^0'=__rho_13_^post34, i___04040^0'=i___04040^post34, a1818^0'=a1818^post34, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post34, __rho_99_^0'=__rho_99_^post34, a77^0'=a77^post34, a3434^0'=a3434^post34, i___099^0'=i___099^post34, __rho_10_^0'=__rho_10_^post34, (-__rho_3_^post34+__rho_3_^0 == 0 /\ a2525^0-a2525^post34 == 0 /\ -a77^post34+a77^0 == 0 /\ -a1818^post34+a1818^0 == 0 /\ a3232^0-a3232^post34 == 0 /\ IsochDetachData^0-IsochDetachData^post34 == 0 /\ __rho_11_^0-__rho_11_^post34 == 0 /\ k1^0-k1^post34 == 0 /\ i___04646^0-i___04646^post34 == 0 /\ -ret_IoAllocateIrp2727^post34+ret_IoAllocateIrp2727^0 == 0 /\ __rho_6_^0-__rho_6_^post34 == 0 /\ -a3131^post34+a3131^0 == 0 /\ a11^0-a11^post34 == 0 /\ -IsochResourceData^post34+IsochResourceData^0 == 0 /\ ResourceIrp^0-ResourceIrp^post34 == 0 /\ b2626^0-b2626^post34 == 0 /\ -k2^post34+k2^0 == 0 /\ b3333^0-b3333^post34 == 0 /\ b3535^0-b3535^post34 == 0 /\ -k3^post34+k3^0 == 0 /\ k5^0-k5^post34 == 0 /\ b2929^0-b2929^post34 == 0 /\ __rho_13_^0-__rho_13_^post34 == 0 /\ -__rho_1_^post34+__rho_1_^0 == 0 /\ a4444^0-a4444^post34 == 0 /\ a3737^0-a3737^post34 == 0 /\ ntStatus^0-ntStatus^post34 == 0 /\ -__rho_99_^post34+__rho_99_^0 == 0 /\ -__rho_8_^post34+__rho_8_^0 == 0 /\ __rho_9_^0-__rho_9_^post34 == 0 /\ -__rho_56_^post34+__rho_56_^0 == 0 /\ -ret_t1394Diag_PnpStopDevice33^post34+ret_t1394Diag_PnpStopDevice33^0 == 0 /\ -AsyncAddressData^post34+AsyncAddressData^0 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post34+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ i___01717^0-i___01717^post34 == 0 /\ a2828^0-a2828^post34 == 0 /\ -__rho_7_^post34+__rho_7_^0 == 0 /\ -a4343^post34+a4343^0 == 0 /\ -i___099^post34+i___099^0 == 0 /\ -k4^post34+k4^0 == 0 /\ -i^post34+i^0 == 0 /\ -__rho_2_^post34+__rho_2_^0 == 0 /\ -i___04040^post34+i___04040^0 == 0 /\ -Irql^post34+Irql^0 == 0 /\ -__rho_10_^post34+__rho_10_^0 == 0 /\ keR^0-keR^post34 == 0 /\ -keA^post34+keA^0 == 0 /\ __rho_12_^0-__rho_12_^post34 == 0 /\ CromData^0-CromData^post34 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post34 == 0 /\ -Irp^post34+Irp^0 == 0 /\ i___01313^0-i___01313^post34 == 0 /\ -a3434^post34+a3434^0 == 0 /\ -ret_IoSetDeviceInterfaceState44^post34+ret_IoSetDeviceInterfaceState44^0 == 0 /\ pIrb^0-pIrb^post34 == 0 /\ -b22^post34+b22^0 == 0 /\ -__rho_5_^post34+__rho_5_^0 == 0 /\ i___02424^0-i___02424^post34 == 0 /\ __rho_4_^0-__rho_4_^post34 == 0 /\ -i___02020^post34+i___02020^0 == 0 /\ a3838^0-a3838^post34 == 0), cost: 1
  35: l27 -> l15 : i___01717^0'=i___01717^post35, IsochDetachData^0'=IsochDetachData^post35, ntStatus^0'=ntStatus^post35, __rho_6_^0'=__rho_6_^post35, k5^0'=k5^post35, __rho_2_^0'=__rho_2_^post35, a3838^0'=a3838^post35, a2828^0'=a2828^post35, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post35, b3535^0'=b3535^post35, CromData^0'=CromData^post35, b2626^0'=b2626^post35, __rho_4_^0'=__rho_4_^post35, k2^0'=k2^post35, __rho_12_^0'=__rho_12_^post35, i___02424^0'=i___02424^post35, a11^0'=a11^post35, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post35, __rho_8_^0'=__rho_8_^post35, keR^0'=keR^post35, a4444^0'=a4444^post35, a3232^0'=a3232^post35, ResourceIrp^0'=ResourceIrp^post35, i___01313^0'=i___01313^post35, Irql^0'=Irql^post35, b3333^0'=b3333^post35, __rho_5_^0'=__rho_5_^post35, k4^0'=k4^post35, __rho_1_^0'=__rho_1_^post35, i___04646^0'=i___04646^post35, a2525^0'=a2525^post35, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post35, __rho_9_^0'=__rho_9_^post35, AsyncAddressData^0'=AsyncAddressData^post35, b22^0'=b22^post35, a3737^0'=a3737^post35, k1^0'=k1^post35, __rho_11_^0'=__rho_11_^post35, i___02020^0'=i___02020^post35, IsochResourceData^0'=IsochResourceData^post35, pIrb^0'=pIrb^post35, __rho_7_^0'=__rho_7_^post35, keA^0'=keA^post35, __rho_3_^0'=__rho_3_^post35, a4343^0'=a4343^post35, a3131^0'=a3131^post35, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post35, i^0'=i^post35, Irp^0'=Irp^post35, b2929^0'=b2929^post35, __rho_56_^0'=__rho_56_^post35, k3^0'=k3^post35, __rho_13_^0'=__rho_13_^post35, i___04040^0'=i___04040^post35, a1818^0'=a1818^post35, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post35, __rho_99_^0'=__rho_99_^post35, a77^0'=a77^post35, a3434^0'=a3434^post35, i___099^0'=i___099^post35, __rho_10_^0'=__rho_10_^post35, (-__rho_1_^post35+__rho_1_^0 == 0 /\ i___01313^0-i___01313^post35 == 0 /\ -__rho_13_^post35+__rho_13_^0 == 0 /\ -__rho_3_^post35+__rho_3_^0 == 0 /\ a3434^post35-ResourceIrp^0 == 0 /\ -pIrb^post35+pIrb^0 == 0 /\ a3232^post35-pIrb^0 == 0 /\ a2828^0-a2828^post35 == 0 /\ -b22^post35+b22^0 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post35 == 0 /\ __rho_11_^0-__rho_11_^post35 == 0 /\ i___04040^0-i___04040^post35 == 0 /\ -ret_IoAllocateIrp2727^post35+ret_IoAllocateIrp2727^0 == 0 /\ -a77^post35+a77^0 == 0 /\ -IsochResourceData^post35+IsochResourceData^0 == 0 /\ -a2525^post35+a2525^0 == 0 /\ i___01717^0-i___01717^post35 == 0 /\ i___04646^0-i___04646^post35 == 0 /\ -Irql^post35+Irql^0 == 0 /\ ret_t1394_SubmitIrpSynch3636^post35 == 0 /\ __rho_8_^0-__rho_8_^post35 == 0 /\ __rho_12_^0-__rho_12_^post35 == 0 /\ -k3^post35+k3^0 == 0 /\ b3333^post35 == 0 /\ -keR^post35+keR^0 == 0 /\ CromData^0-CromData^post35 == 0 /\ -__rho_99_^post35+__rho_99_^0 == 0 /\ -a11^post35+a11^0 == 0 /\ a3838^post35-ResourceIrp^0 == 0 /\ __rho_4_^0-__rho_4_^post35 == 0 /\ __rho_2_^0-__rho_2_^post35 == 0 /\ a4444^0-a4444^post35 == 0 /\ k1^0-k1^post35 == 0 /\ ntStatus^post35-ret_t1394_SubmitIrpSynch3636^post35 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post35 == 0 /\ -__rho_9_^post35+__rho_9_^0 == 0 /\ -a1818^post35+a1818^0 == 0 /\ -AsyncAddressData^post35+AsyncAddressData^0 == 0 /\ k2^0-k2^post35 == 0 /\ -a3131^post35+a3131^0 == 0 /\ -i^post35+i^0 == 0 /\ a4343^0-a4343^post35 == 0 /\ 1-pIrb^0 <= 0 /\ __rho_6_^0-__rho_6_^post35 == 0 /\ i___02424^0-i___02424^post35 == 0 /\ __rho_7_^0-__rho_7_^post35 == 0 /\ k4^0-k4^post35 == 0 /\ -pIrb^0+b3535^post35 == 0 /\ __rho_5_^0-__rho_5_^post35 == 0 /\ -__rho_56_^post35+__rho_56_^0 == 0 /\ -i___099^post35+i___099^0 == 0 /\ b2626^0-b2626^post35 == 0 /\ i___02020^0-i___02020^post35 == 0 /\ IsochDetachData^0-IsochDetachData^post35 == 0 /\ -ret_IoSetDeviceInterfaceState44^post35+ret_IoSetDeviceInterfaceState44^0 == 0 /\ -keA^post35+keA^0 == 0 /\ -__rho_10_^post35+__rho_10_^0 == 0 /\ -Irp^post35+Irp^0 == 0 /\ k5^0-k5^post35 == 0 /\ -ResourceIrp^post35+ResourceIrp^0 == 0 /\ -b2929^post35+b2929^0 == 0 /\ a3737^post35-pIrb^0 == 0), cost: 1
  36: l27 -> l15 : i___01717^0'=i___01717^post36, IsochDetachData^0'=IsochDetachData^post36, ntStatus^0'=ntStatus^post36, __rho_6_^0'=__rho_6_^post36, k5^0'=k5^post36, __rho_2_^0'=__rho_2_^post36, a3838^0'=a3838^post36, a2828^0'=a2828^post36, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post36, b3535^0'=b3535^post36, CromData^0'=CromData^post36, b2626^0'=b2626^post36, __rho_4_^0'=__rho_4_^post36, k2^0'=k2^post36, __rho_12_^0'=__rho_12_^post36, i___02424^0'=i___02424^post36, a11^0'=a11^post36, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post36, __rho_8_^0'=__rho_8_^post36, keR^0'=keR^post36, a4444^0'=a4444^post36, a3232^0'=a3232^post36, ResourceIrp^0'=ResourceIrp^post36, i___01313^0'=i___01313^post36, Irql^0'=Irql^post36, b3333^0'=b3333^post36, __rho_5_^0'=__rho_5_^post36, k4^0'=k4^post36, __rho_1_^0'=__rho_1_^post36, i___04646^0'=i___04646^post36, a2525^0'=a2525^post36, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post36, __rho_9_^0'=__rho_9_^post36, AsyncAddressData^0'=AsyncAddressData^post36, b22^0'=b22^post36, a3737^0'=a3737^post36, k1^0'=k1^post36, __rho_11_^0'=__rho_11_^post36, i___02020^0'=i___02020^post36, IsochResourceData^0'=IsochResourceData^post36, pIrb^0'=pIrb^post36, __rho_7_^0'=__rho_7_^post36, keA^0'=keA^post36, __rho_3_^0'=__rho_3_^post36, a4343^0'=a4343^post36, a3131^0'=a3131^post36, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post36, i^0'=i^post36, Irp^0'=Irp^post36, b2929^0'=b2929^post36, __rho_56_^0'=__rho_56_^post36, k3^0'=k3^post36, __rho_13_^0'=__rho_13_^post36, i___04040^0'=i___04040^post36, a1818^0'=a1818^post36, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post36, __rho_99_^0'=__rho_99_^post36, a77^0'=a77^post36, a3434^0'=a3434^post36, i___099^0'=i___099^post36, __rho_10_^0'=__rho_10_^post36, (a4444^0-a4444^post36 == 0 /\ -__rho_7_^post36+__rho_7_^0 == 0 /\ k2^0-k2^post36 == 0 /\ -__rho_1_^post36+__rho_1_^0 == 0 /\ -i^post36+i^0 == 0 /\ k5^0-k5^post36 == 0 /\ AsyncAddressData^0-AsyncAddressData^post36 == 0 /\ -Irp^post36+Irp^0 == 0 /\ k4^0-k4^post36 == 0 /\ -__rho_56_^post36+__rho_56_^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post36 == 0 /\ CromData^0-CromData^post36 == 0 /\ a11^0-a11^post36 == 0 /\ -ResourceIrp^post36+ResourceIrp^0 == 0 /\ -a77^post36+a77^0 == 0 /\ -i___04646^post36+i___04646^0 == 0 /\ -a3232^post36+a3232^0 == 0 /\ ret_IoSetDeviceInterfaceState44^0-ret_IoSetDeviceInterfaceState44^post36 == 0 /\ -b3333^post36+b3333^0 == 0 /\ -keR^post36+keR^0 == 0 /\ -i___04040^post36+i___04040^0 == 0 /\ i___02020^0-i___02020^post36 == 0 /\ -__rho_10_^post36+__rho_10_^0 == 0 /\ a2828^0-a2828^post36 == 0 /\ -a3737^post36+a3737^0 == 0 /\ __rho_12_^0-__rho_12_^post36 == 0 /\ -b22^post36+b22^0 == 0 /\ -ret_IoAllocateIrp2727^post36+ret_IoAllocateIrp2727^0 == 0 /\ -i___01313^post36+i___01313^0 == 0 /\ -ResourceIrp^0+a3131^post36 == 0 /\ __rho_2_^0-__rho_2_^post36 == 0 /\ -a3434^post36+a3434^0 == 0 /\ -IsochResourceData^post36+IsochResourceData^0 == 0 /\ __rho_6_^0-__rho_6_^post36 == 0 /\ __rho_11_^0-__rho_11_^post36 == 0 /\ -a2525^post36+a2525^0 == 0 /\ b3535^0-b3535^post36 == 0 /\ -__rho_3_^post36+__rho_3_^0 == 0 /\ pIrb^0 <= 0 /\ -ret_ExAllocatePool3030^post36+ret_ExAllocatePool3030^0 == 0 /\ a3838^0-a3838^post36 == 0 /\ keA^0-keA^post36 == 0 /\ -__rho_13_^post36+__rho_13_^0 == 0 /\ -k1^post36+k1^0 == 0 /\ Irql^0-Irql^post36 == 0 /\ IsochDetachData^0-IsochDetachData^post36 == 0 /\ __rho_4_^0-__rho_4_^post36 == 0 /\ -__rho_9_^post36+__rho_9_^0 == 0 /\ -pIrb^post36+pIrb^0 == 0 /\ -i___099^post36+i___099^0 == 0 /\ __rho_8_^0-__rho_8_^post36 == 0 /\ -ntStatus^post36+ntStatus^0 == 0 /\ -__rho_99_^post36+__rho_99_^0 == 0 /\ __rho_5_^0-__rho_5_^post36 == 0 /\ -b2929^post36+b2929^0 == 0 /\ b2626^0-b2626^post36 == 0 /\ i___02424^0-i___02424^post36 == 0 /\ -k3^post36+k3^0 == 0 /\ i___01717^0-i___01717^post36 == 0 /\ a4343^0-a4343^post36 == 0 /\ -a1818^post36+a1818^0 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post36+ret_t1394_SubmitIrpSynch3636^0 == 0), cost: 1
  37: l28 -> l7 : i___01717^0'=i___01717^post37, IsochDetachData^0'=IsochDetachData^post37, ntStatus^0'=ntStatus^post37, __rho_6_^0'=__rho_6_^post37, k5^0'=k5^post37, __rho_2_^0'=__rho_2_^post37, a3838^0'=a3838^post37, a2828^0'=a2828^post37, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post37, b3535^0'=b3535^post37, CromData^0'=CromData^post37, b2626^0'=b2626^post37, __rho_4_^0'=__rho_4_^post37, k2^0'=k2^post37, __rho_12_^0'=__rho_12_^post37, i___02424^0'=i___02424^post37, a11^0'=a11^post37, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post37, __rho_8_^0'=__rho_8_^post37, keR^0'=keR^post37, a4444^0'=a4444^post37, a3232^0'=a3232^post37, ResourceIrp^0'=ResourceIrp^post37, i___01313^0'=i___01313^post37, Irql^0'=Irql^post37, b3333^0'=b3333^post37, __rho_5_^0'=__rho_5_^post37, k4^0'=k4^post37, __rho_1_^0'=__rho_1_^post37, i___04646^0'=i___04646^post37, a2525^0'=a2525^post37, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post37, __rho_9_^0'=__rho_9_^post37, AsyncAddressData^0'=AsyncAddressData^post37, b22^0'=b22^post37, a3737^0'=a3737^post37, k1^0'=k1^post37, __rho_11_^0'=__rho_11_^post37, i___02020^0'=i___02020^post37, IsochResourceData^0'=IsochResourceData^post37, pIrb^0'=pIrb^post37, __rho_7_^0'=__rho_7_^post37, keA^0'=keA^post37, __rho_3_^0'=__rho_3_^post37, a4343^0'=a4343^post37, a3131^0'=a3131^post37, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post37, i^0'=i^post37, Irp^0'=Irp^post37, b2929^0'=b2929^post37, __rho_56_^0'=__rho_56_^post37, k3^0'=k3^post37, __rho_13_^0'=__rho_13_^post37, i___04040^0'=i___04040^post37, a1818^0'=a1818^post37, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post37, __rho_99_^0'=__rho_99_^post37, a77^0'=a77^post37, a3434^0'=a3434^post37, i___099^0'=i___099^post37, __rho_10_^0'=__rho_10_^post37, (0 == 0 /\ a2828^0-a2828^post37 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post37+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ -Irql^post37+Irql^0 == 0 /\ -ret_IoAllocateIrp2727^post37+ret_IoAllocateIrp2727^0 == 0 /\ -ResourceIrp^post37+ResourceIrp^0 == 0 /\ -__rho_13_^post37+__rho_13_^0 == 0 /\ __rho_5_^0-__rho_5_^post37 == 0 /\ a4444^0-a4444^post37 == 0 /\ b3333^0-b3333^post37 == 0 /\ -a11^post37+a11^0 == 0 /\ -a77^post37+a77^0 == 0 /\ __rho_12_^0-__rho_12_^post37 == 0 /\ a4343^0-a4343^post37 == 0 /\ a2525^0-a2525^post37 == 0 /\ b22^0-b22^post37 == 0 /\ -__rho_3_^post37+__rho_3_^0 == 0 /\ -__rho_11_^post37+__rho_11_^0 == 0 /\ i___01313^0-i___01313^post37 == 0 /\ CromData^0-CromData^post37 == 0 /\ -__rho_99_^post37+__rho_99_^0 == 0 /\ a3838^0-a3838^post37 == 0 /\ -k3^post37+k3^0 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post37 == 0 /\ Irp^0-Irp^post37 == 0 /\ k4^0-k4^post37 == 0 /\ keA^230 == 0 /\ __rho_4_^0-__rho_4_^post37 == 0 /\ -b2929^post37+b2929^0 == 0 /\ b3535^0-b3535^post37 == 0 /\ -a3434^post37+a3434^0 == 0 /\ __rho_8_^0-__rho_8_^post37 == 0 /\ IsochDetachData^0-IsochDetachData^post37 == 0 /\ -__rho_7_^post37+__rho_7_^0 == 0 /\ -a3232^post37+a3232^0 == 0 /\ -b2626^post37+b2626^0 == 0 /\ -a1818^post37+a1818^0 == 0 /\ -i___099^post37+i___099^0 == 0 /\ i___02424^0-i___02424^post37 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post37 == 0 /\ -1+keA^13 == 0 /\ -i^post37+i^0 == 0 /\ -__rho_56_^post37+__rho_56_^0 == 0 /\ -keR^post37+keR^0 == 0 /\ -i___04646^post37+i___04646^0 == 0 /\ k2^0-k2^post37 == 0 /\ ret_IoSetDeviceInterfaceState44^post37 == 0 /\ __rho_1_^0-__rho_1_^post37 == 0 /\ -a3737^post37+a3737^0 == 0 /\ k5^0-k5^post37 == 0 /\ IsochResourceData^0-IsochResourceData^post37 == 0 /\ i___01717^0-i___01717^post37 == 0 /\ keA^post37 == 0 /\ AsyncAddressData^0-AsyncAddressData^post37 == 0 /\ -__rho_6_^post37+__rho_6_^0 == 0 /\ -pIrb^post37+pIrb^0 == 0 /\ -__rho_10_^post37+__rho_10_^0 == 0 /\ -i___04040^post37+i___04040^0 == 0 /\ -i___02020^post37+i___02020^0 == 0 /\ k1^post37-__rho_2_^post37 == 0 /\ -1+keA^330 == 0 /\ -__rho_9_^post37+__rho_9_^0 == 0 /\ -ret_IoSetDeviceInterfaceState44^post37+ntStatus^post37 == 0 /\ a3131^0-a3131^post37 == 0), cost: 1
  38: l29 -> l27 : i___01717^0'=i___01717^post38, IsochDetachData^0'=IsochDetachData^post38, ntStatus^0'=ntStatus^post38, __rho_6_^0'=__rho_6_^post38, k5^0'=k5^post38, __rho_2_^0'=__rho_2_^post38, a3838^0'=a3838^post38, a2828^0'=a2828^post38, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post38, b3535^0'=b3535^post38, CromData^0'=CromData^post38, b2626^0'=b2626^post38, __rho_4_^0'=__rho_4_^post38, k2^0'=k2^post38, __rho_12_^0'=__rho_12_^post38, i___02424^0'=i___02424^post38, a11^0'=a11^post38, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post38, __rho_8_^0'=__rho_8_^post38, keR^0'=keR^post38, a4444^0'=a4444^post38, a3232^0'=a3232^post38, ResourceIrp^0'=ResourceIrp^post38, i___01313^0'=i___01313^post38, Irql^0'=Irql^post38, b3333^0'=b3333^post38, __rho_5_^0'=__rho_5_^post38, k4^0'=k4^post38, __rho_1_^0'=__rho_1_^post38, i___04646^0'=i___04646^post38, a2525^0'=a2525^post38, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post38, __rho_9_^0'=__rho_9_^post38, AsyncAddressData^0'=AsyncAddressData^post38, b22^0'=b22^post38, a3737^0'=a3737^post38, k1^0'=k1^post38, __rho_11_^0'=__rho_11_^post38, i___02020^0'=i___02020^post38, IsochResourceData^0'=IsochResourceData^post38, pIrb^0'=pIrb^post38, __rho_7_^0'=__rho_7_^post38, keA^0'=keA^post38, __rho_3_^0'=__rho_3_^post38, a4343^0'=a4343^post38, a3131^0'=a3131^post38, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post38, i^0'=i^post38, Irp^0'=Irp^post38, b2929^0'=b2929^post38, __rho_56_^0'=__rho_56_^post38, k3^0'=k3^post38, __rho_13_^0'=__rho_13_^post38, i___04040^0'=i___04040^post38, a1818^0'=a1818^post38, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post38, __rho_99_^0'=__rho_99_^post38, a77^0'=a77^post38, a3434^0'=a3434^post38, i___099^0'=i___099^post38, __rho_10_^0'=__rho_10_^post38, (-i___04040^post38+i___04040^0 == 0 /\ i___04646^0-i___04646^post38 == 0 /\ __rho_4_^0-__rho_4_^post38 == 0 /\ -IsochResourceData^post38+IsochResourceData^0 == 0 /\ ntStatus^0-ntStatus^post38 == 0 /\ -a3434^post38+a3434^0 == 0 /\ -__rho_5_^post38+__rho_5_^0 == 0 /\ a3232^0-a3232^post38 == 0 /\ b2626^0-b2626^post38 == 0 /\ -__rho_99_^post38+__rho_99_^0 == 0 /\ -b22^post38+b22^0 == 0 /\ k1^0-k1^post38 == 0 /\ -__rho_13_^post38+__rho_13_^0 == 0 /\ -a3131^post38+a3131^0 == 0 /\ a4444^0-a4444^post38 == 0 /\ -a11^post38+a11^0 == 0 /\ a3737^0-a3737^post38 == 0 /\ -a1818^post38+a1818^0 == 0 /\ -i___099^post38+i___099^0 == 0 /\ -ret_ExAllocatePool3030^post38+pIrb^post38 == 0 /\ IsochDetachData^0-IsochDetachData^post38 == 0 /\ i___01313^0-i___01313^post38 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post38+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ -k3^post38+k3^0 == 0 /\ keR^0-keR^post38 == 0 /\ -__rho_8_^post38+__rho_8_^0 == 0 /\ -k4^post38+k4^0 == 0 /\ b3535^0-b3535^post38 == 0 /\ -AsyncAddressData^post38+AsyncAddressData^0 == 0 /\ k5^0-k5^post38 == 0 /\ -ret_IoSetDeviceInterfaceState44^post38+ret_IoSetDeviceInterfaceState44^0 == 0 /\ -__rho_10_^post38+__rho_10_^0 == 0 /\ -Irp^post38+Irp^0 == 0 /\ k2^0-k2^post38 == 0 /\ ret_ExAllocatePool3030^post38 == 0 /\ __rho_2_^0-__rho_2_^post38 == 0 /\ -keA^post38+keA^0 == 0 /\ a77^0-a77^post38 == 0 /\ -__rho_1_^post38+__rho_1_^0 == 0 /\ -Irql^post38+Irql^0 == 0 /\ -1+a2828^post38 == 0 /\ i___01717^0-i___01717^post38 == 0 /\ -i___02424^post38+i___02424^0 == 0 /\ -i___02020^post38+i___02020^0 == 0 /\ -__rho_56_^post38+__rho_56_^0 == 0 /\ b3333^0-b3333^post38 == 0 /\ __rho_7_^0-__rho_7_^post38 == 0 /\ b2929^post38 == 0 /\ __rho_6_^0-__rho_6_^post38 == 0 /\ ResourceIrp^0-ResourceIrp^post38 == 0 /\ -__rho_3_^post38+__rho_3_^0 == 0 /\ a3838^0-a3838^post38 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post38 == 0 /\ __rho_9_^0-__rho_9_^post38 == 0 /\ -__rho_11_^post38+__rho_11_^0 == 0 /\ a2525^0-a2525^post38 == 0 /\ __rho_12_^0-__rho_12_^post38 == 0 /\ CromData^0-CromData^post38 == 0 /\ -i^post38+i^0 == 0 /\ -a4343^post38+a4343^0 == 0 /\ -ret_IoAllocateIrp2727^post38+ret_IoAllocateIrp2727^0 == 0), cost: 1
  39: l30 -> l29 : i___01717^0'=i___01717^post39, IsochDetachData^0'=IsochDetachData^post39, ntStatus^0'=ntStatus^post39, __rho_6_^0'=__rho_6_^post39, k5^0'=k5^post39, __rho_2_^0'=__rho_2_^post39, a3838^0'=a3838^post39, a2828^0'=a2828^post39, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post39, b3535^0'=b3535^post39, CromData^0'=CromData^post39, b2626^0'=b2626^post39, __rho_4_^0'=__rho_4_^post39, k2^0'=k2^post39, __rho_12_^0'=__rho_12_^post39, i___02424^0'=i___02424^post39, a11^0'=a11^post39, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post39, __rho_8_^0'=__rho_8_^post39, keR^0'=keR^post39, a4444^0'=a4444^post39, a3232^0'=a3232^post39, ResourceIrp^0'=ResourceIrp^post39, i___01313^0'=i___01313^post39, Irql^0'=Irql^post39, b3333^0'=b3333^post39, __rho_5_^0'=__rho_5_^post39, k4^0'=k4^post39, __rho_1_^0'=__rho_1_^post39, i___04646^0'=i___04646^post39, a2525^0'=a2525^post39, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post39, __rho_9_^0'=__rho_9_^post39, AsyncAddressData^0'=AsyncAddressData^post39, b22^0'=b22^post39, a3737^0'=a3737^post39, k1^0'=k1^post39, __rho_11_^0'=__rho_11_^post39, i___02020^0'=i___02020^post39, IsochResourceData^0'=IsochResourceData^post39, pIrb^0'=pIrb^post39, __rho_7_^0'=__rho_7_^post39, keA^0'=keA^post39, __rho_3_^0'=__rho_3_^post39, a4343^0'=a4343^post39, a3131^0'=a3131^post39, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post39, i^0'=i^post39, Irp^0'=Irp^post39, b2929^0'=b2929^post39, __rho_56_^0'=__rho_56_^post39, k3^0'=k3^post39, __rho_13_^0'=__rho_13_^post39, i___04040^0'=i___04040^post39, a1818^0'=a1818^post39, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post39, __rho_99_^0'=__rho_99_^post39, a77^0'=a77^post39, a3434^0'=a3434^post39, i___099^0'=i___099^post39, __rho_10_^0'=__rho_10_^post39, (-keR^post39+keR^0 == 0 /\ k2^0-k2^post39 == 0 /\ -Irql^post39+Irql^0 == 0 /\ __rho_2_^0-__rho_2_^post39 == 0 /\ i___01717^0-i___01717^post39 == 0 /\ __rho_8_^0-__rho_8_^post39 == 0 /\ -__rho_9_^post39+__rho_9_^0 == 0 /\ -a3434^post39+a3434^0 == 0 /\ -__rho_99_^post39+__rho_99_^0 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post39 == 0 /\ 1-ResourceIrp^0 <= 0 /\ __rho_6_^0-__rho_6_^post39 == 0 /\ __rho_7_^0-__rho_7_^post39 == 0 /\ -b22^post39+b22^0 == 0 /\ -__rho_5_^post39+__rho_5_^0 == 0 /\ __rho_11_^0-__rho_11_^post39 == 0 /\ -b2929^post39+b2929^0 == 0 /\ -a11^post39+a11^0 == 0 /\ -b3333^post39+b3333^0 == 0 /\ -a1818^post39+a1818^0 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post39+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ -a3232^post39+a3232^0 == 0 /\ __rho_12_^0-__rho_12_^post39 == 0 /\ CromData^0-CromData^post39 == 0 /\ i___04646^0-i___04646^post39 == 0 /\ AsyncAddressData^0-AsyncAddressData^post39 == 0 /\ -i___04040^post39+i___04040^0 == 0 /\ -ret_IoSetDeviceInterfaceState44^post39+ret_IoSetDeviceInterfaceState44^0 == 0 /\ a3131^0-a3131^post39 == 0 /\ -Irp^post39+Irp^0 == 0 /\ -__rho_10_^post39+__rho_10_^0 == 0 /\ __rho_4_^0-__rho_4_^post39 == 0 /\ -keA^post39+keA^0 == 0 /\ -a2525^post39+a2525^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post39 == 0 /\ b2626^0-b2626^post39 == 0 /\ -i___02020^post39+i___02020^0 == 0 /\ ntStatus^0-ntStatus^post39 == 0 /\ a4444^0-a4444^post39 == 0 /\ a3838^0-a3838^post39 == 0 /\ a3737^0-a3737^post39 == 0 /\ -ResourceIrp^post39+ResourceIrp^0 == 0 /\ -__rho_13_^post39+__rho_13_^0 == 0 /\ k4^0-k4^post39 == 0 /\ pIrb^0-pIrb^post39 == 0 /\ k1^0-k1^post39 == 0 /\ i___02424^0-i___02424^post39 == 0 /\ -__rho_3_^post39+__rho_3_^0 == 0 /\ -__rho_56_^post39+__rho_56_^0 == 0 /\ -__rho_1_^post39+__rho_1_^0 == 0 /\ -a77^post39+a77^0 == 0 /\ -k3^post39+k3^0 == 0 /\ i___01313^0-i___01313^post39 == 0 /\ -ret_IoAllocateIrp2727^post39+ret_IoAllocateIrp2727^0 == 0 /\ IsochDetachData^0-IsochDetachData^post39 == 0 /\ -IsochResourceData^post39+IsochResourceData^0 == 0 /\ k5^0-k5^post39 == 0 /\ b3535^0-b3535^post39 == 0 /\ a2828^0-a2828^post39 == 0 /\ -i___099^post39+i___099^0 == 0 /\ a4343^0-a4343^post39 == 0 /\ -i^post39+i^0 == 0), cost: 1
  40: l30 -> l29 : i___01717^0'=i___01717^post40, IsochDetachData^0'=IsochDetachData^post40, ntStatus^0'=ntStatus^post40, __rho_6_^0'=__rho_6_^post40, k5^0'=k5^post40, __rho_2_^0'=__rho_2_^post40, a3838^0'=a3838^post40, a2828^0'=a2828^post40, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post40, b3535^0'=b3535^post40, CromData^0'=CromData^post40, b2626^0'=b2626^post40, __rho_4_^0'=__rho_4_^post40, k2^0'=k2^post40, __rho_12_^0'=__rho_12_^post40, i___02424^0'=i___02424^post40, a11^0'=a11^post40, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post40, __rho_8_^0'=__rho_8_^post40, keR^0'=keR^post40, a4444^0'=a4444^post40, a3232^0'=a3232^post40, ResourceIrp^0'=ResourceIrp^post40, i___01313^0'=i___01313^post40, Irql^0'=Irql^post40, b3333^0'=b3333^post40, __rho_5_^0'=__rho_5_^post40, k4^0'=k4^post40, __rho_1_^0'=__rho_1_^post40, i___04646^0'=i___04646^post40, a2525^0'=a2525^post40, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post40, __rho_9_^0'=__rho_9_^post40, AsyncAddressData^0'=AsyncAddressData^post40, b22^0'=b22^post40, a3737^0'=a3737^post40, k1^0'=k1^post40, __rho_11_^0'=__rho_11_^post40, i___02020^0'=i___02020^post40, IsochResourceData^0'=IsochResourceData^post40, pIrb^0'=pIrb^post40, __rho_7_^0'=__rho_7_^post40, keA^0'=keA^post40, __rho_3_^0'=__rho_3_^post40, a4343^0'=a4343^post40, a3131^0'=a3131^post40, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post40, i^0'=i^post40, Irp^0'=Irp^post40, b2929^0'=b2929^post40, __rho_56_^0'=__rho_56_^post40, k3^0'=k3^post40, __rho_13_^0'=__rho_13_^post40, i___04040^0'=i___04040^post40, a1818^0'=a1818^post40, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post40, __rho_99_^0'=__rho_99_^post40, a77^0'=a77^post40, a3434^0'=a3434^post40, i___099^0'=i___099^post40, __rho_10_^0'=__rho_10_^post40, (-i___04646^post40+i___04646^0 == 0 /\ k5^0-k5^post40 == 0 /\ -__rho_99_^post40+__rho_99_^0 == 0 /\ k4^0-k4^post40 == 0 /\ -ResourceIrp^post40+ResourceIrp^0 == 0 /\ -i___04040^post40+i___04040^0 == 0 /\ -i___099^post40+i___099^0 == 0 /\ i___02424^0-i___02424^post40 == 0 /\ CromData^0-CromData^post40 == 0 /\ -a4343^post40+a4343^0 == 0 /\ -b2929^post40+b2929^0 == 0 /\ keR^0-keR^post40 == 0 /\ k3^0-k3^post40 == 0 /\ -__rho_9_^post40+__rho_9_^0 == 0 /\ -a3737^post40+a3737^0 == 0 /\ AsyncAddressData^0-AsyncAddressData^post40 == 0 /\ ret_IoSetDeviceInterfaceState44^0-ret_IoSetDeviceInterfaceState44^post40 == 0 /\ k2^0-k2^post40 == 0 /\ a2828^0-a2828^post40 == 0 /\ ntStatus^0-ntStatus^post40 == 0 /\ a3232^0-a3232^post40 == 0 /\ -ret_ExAllocatePool3030^post40+ret_ExAllocatePool3030^0 == 0 /\ -__rho_13_^post40+__rho_13_^0 == 0 /\ IsochDetachData^0-IsochDetachData^post40 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post40 == 0 /\ __rho_7_^0-__rho_7_^post40 == 0 /\ -i___01313^post40+i___01313^0 == 0 /\ -b3333^post40+b3333^0 == 0 /\ a4444^0-a4444^post40 == 0 /\ a11^0-a11^post40 == 0 /\ -__rho_56_^post40+__rho_56_^0 == 0 /\ Irql^0-Irql^post40 == 0 /\ -a77^post40+a77^0 == 0 /\ -Irp^post40+Irp^0 == 0 /\ -a2525^post40+a2525^0 == 0 /\ -__rho_3_^post40+__rho_3_^0 == 0 /\ -b22^post40+b22^0 == 0 /\ keA^0-keA^post40 == 0 /\ b3535^0-b3535^post40 == 0 /\ i___02020^0-i___02020^post40 == 0 /\ -__rho_11_^post40+__rho_11_^0 == 0 /\ -__rho_10_^post40+__rho_10_^0 == 0 /\ __rho_1_^0-__rho_1_^post40 == 0 /\ __rho_12_^0-__rho_12_^post40 == 0 /\ -a3838^post40+a3838^0 == 0 /\ __rho_2_^0-__rho_2_^post40 == 0 /\ -pIrb^post40+pIrb^0 == 0 /\ -a3434^post40+a3434^0 == 0 /\ -a1818^post40+a1818^0 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post40+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ -i^post40+i^0 == 0 /\ a3131^0-a3131^post40 == 0 /\ b2626^0-b2626^post40 == 0 /\ -IsochResourceData^post40+IsochResourceData^0 == 0 /\ __rho_4_^0-__rho_4_^post40 == 0 /\ -ret_IoAllocateIrp2727^post40+ret_IoAllocateIrp2727^0 == 0 /\ i___01717^0-i___01717^post40 == 0 /\ __rho_8_^0-__rho_8_^post40 == 0 /\ -k1^post40+k1^0 == 0 /\ __rho_6_^0-__rho_6_^post40 == 0 /\ __rho_5_^0-__rho_5_^post40 == 0 /\ 1+ResourceIrp^0 <= 0), cost: 1
  41: l30 -> l15 : i___01717^0'=i___01717^post41, IsochDetachData^0'=IsochDetachData^post41, ntStatus^0'=ntStatus^post41, __rho_6_^0'=__rho_6_^post41, k5^0'=k5^post41, __rho_2_^0'=__rho_2_^post41, a3838^0'=a3838^post41, a2828^0'=a2828^post41, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post41, b3535^0'=b3535^post41, CromData^0'=CromData^post41, b2626^0'=b2626^post41, __rho_4_^0'=__rho_4_^post41, k2^0'=k2^post41, __rho_12_^0'=__rho_12_^post41, i___02424^0'=i___02424^post41, a11^0'=a11^post41, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post41, __rho_8_^0'=__rho_8_^post41, keR^0'=keR^post41, a4444^0'=a4444^post41, a3232^0'=a3232^post41, ResourceIrp^0'=ResourceIrp^post41, i___01313^0'=i___01313^post41, Irql^0'=Irql^post41, b3333^0'=b3333^post41, __rho_5_^0'=__rho_5_^post41, k4^0'=k4^post41, __rho_1_^0'=__rho_1_^post41, i___04646^0'=i___04646^post41, a2525^0'=a2525^post41, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post41, __rho_9_^0'=__rho_9_^post41, AsyncAddressData^0'=AsyncAddressData^post41, b22^0'=b22^post41, a3737^0'=a3737^post41, k1^0'=k1^post41, __rho_11_^0'=__rho_11_^post41, i___02020^0'=i___02020^post41, IsochResourceData^0'=IsochResourceData^post41, pIrb^0'=pIrb^post41, __rho_7_^0'=__rho_7_^post41, keA^0'=keA^post41, __rho_3_^0'=__rho_3_^post41, a4343^0'=a4343^post41, a3131^0'=a3131^post41, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post41, i^0'=i^post41, Irp^0'=Irp^post41, b2929^0'=b2929^post41, __rho_56_^0'=__rho_56_^post41, k3^0'=k3^post41, __rho_13_^0'=__rho_13_^post41, i___04040^0'=i___04040^post41, a1818^0'=a1818^post41, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post41, __rho_99_^0'=__rho_99_^post41, a77^0'=a77^post41, a3434^0'=a3434^post41, i___099^0'=i___099^post41, __rho_10_^0'=__rho_10_^post41, (-__rho_56_^post41+__rho_56_^0 == 0 /\ -__rho_3_^post41+__rho_3_^0 == 0 /\ keR^0-keR^post41 == 0 /\ -k1^post41+k1^0 == 0 /\ -b2929^post41+b2929^0 == 0 /\ k5^0-k5^post41 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post41+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ -a4444^post41+a4444^0 == 0 /\ -pIrb^post41+pIrb^0 == 0 /\ ret_IoSetDeviceInterfaceState44^0-ret_IoSetDeviceInterfaceState44^post41 == 0 /\ -ResourceIrp^0 <= 0 /\ -a4343^post41+a4343^0 == 0 /\ CromData^0-CromData^post41 == 0 /\ -i___01313^post41+i___01313^0 == 0 /\ -__rho_11_^post41+__rho_11_^0 == 0 /\ __rho_5_^0-__rho_5_^post41 == 0 /\ i___02424^0-i___02424^post41 == 0 /\ ntStatus^0-ntStatus^post41 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post41 == 0 /\ __rho_4_^0-__rho_4_^post41 == 0 /\ k3^0-k3^post41 == 0 /\ -i___099^post41+i___099^0 == 0 /\ -i___04040^post41+i___04040^0 == 0 /\ a3232^0-a3232^post41 == 0 /\ -Irp^post41+Irp^0 == 0 /\ -__rho_10_^post41+__rho_10_^0 == 0 /\ IsochDetachData^0-IsochDetachData^post41 == 0 /\ a11^0-a11^post41 == 0 /\ -a2525^post41+a2525^0 == 0 /\ ResourceIrp^0 <= 0 /\ a2828^0-a2828^post41 == 0 /\ -a3434^post41+a3434^0 == 0 /\ k2^0-k2^post41 == 0 /\ -__rho_13_^post41+__rho_13_^0 == 0 /\ __rho_8_^0-__rho_8_^post41 == 0 /\ -k4^post41+k4^0 == 0 /\ -a77^post41+a77^0 == 0 /\ -a1818^post41+a1818^0 == 0 /\ -__rho_9_^post41+__rho_9_^0 == 0 /\ __rho_12_^0-__rho_12_^post41 == 0 /\ b3535^0-b3535^post41 == 0 /\ b3333^0-b3333^post41 == 0 /\ -i___04646^post41+i___04646^0 == 0 /\ -__rho_7_^post41+__rho_7_^0 == 0 /\ -ret_IoAllocateIrp2727^post41+ret_IoAllocateIrp2727^0 == 0 /\ a3838^0-a3838^post41 == 0 /\ -ret_ExAllocatePool3030^post41+ret_ExAllocatePool3030^0 == 0 /\ __rho_2_^0-__rho_2_^post41 == 0 /\ -i^post41+i^0 == 0 /\ IsochResourceData^0-IsochResourceData^post41 == 0 /\ i___01717^0-i___01717^post41 == 0 /\ __rho_1_^0-__rho_1_^post41 == 0 /\ AsyncAddressData^0-AsyncAddressData^post41 == 0 /\ -a3737^post41+a3737^0 == 0 /\ Irql^0-Irql^post41 == 0 /\ a3131^0-a3131^post41 == 0 /\ __rho_6_^0-__rho_6_^post41 == 0 /\ -b22^post41+b22^0 == 0 /\ -__rho_99_^post41+__rho_99_^0 == 0 /\ ResourceIrp^0-ResourceIrp^post41 == 0 /\ b2626^0-b2626^post41 == 0 /\ -i___02020^post41+i___02020^0 == 0 /\ keA^0-keA^post41 == 0), cost: 1
  42: l31 -> l15 : i___01717^0'=i___01717^post42, IsochDetachData^0'=IsochDetachData^post42, ntStatus^0'=ntStatus^post42, __rho_6_^0'=__rho_6_^post42, k5^0'=k5^post42, __rho_2_^0'=__rho_2_^post42, a3838^0'=a3838^post42, a2828^0'=a2828^post42, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post42, b3535^0'=b3535^post42, CromData^0'=CromData^post42, b2626^0'=b2626^post42, __rho_4_^0'=__rho_4_^post42, k2^0'=k2^post42, __rho_12_^0'=__rho_12_^post42, i___02424^0'=i___02424^post42, a11^0'=a11^post42, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post42, __rho_8_^0'=__rho_8_^post42, keR^0'=keR^post42, a4444^0'=a4444^post42, a3232^0'=a3232^post42, ResourceIrp^0'=ResourceIrp^post42, i___01313^0'=i___01313^post42, Irql^0'=Irql^post42, b3333^0'=b3333^post42, __rho_5_^0'=__rho_5_^post42, k4^0'=k4^post42, __rho_1_^0'=__rho_1_^post42, i___04646^0'=i___04646^post42, a2525^0'=a2525^post42, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post42, __rho_9_^0'=__rho_9_^post42, AsyncAddressData^0'=AsyncAddressData^post42, b22^0'=b22^post42, a3737^0'=a3737^post42, k1^0'=k1^post42, __rho_11_^0'=__rho_11_^post42, i___02020^0'=i___02020^post42, IsochResourceData^0'=IsochResourceData^post42, pIrb^0'=pIrb^post42, __rho_7_^0'=__rho_7_^post42, keA^0'=keA^post42, __rho_3_^0'=__rho_3_^post42, a4343^0'=a4343^post42, a3131^0'=a3131^post42, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post42, i^0'=i^post42, Irp^0'=Irp^post42, b2929^0'=b2929^post42, __rho_56_^0'=__rho_56_^post42, k3^0'=k3^post42, __rho_13_^0'=__rho_13_^post42, i___04040^0'=i___04040^post42, a1818^0'=a1818^post42, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post42, __rho_99_^0'=__rho_99_^post42, a77^0'=a77^post42, a3434^0'=a3434^post42, i___099^0'=i___099^post42, __rho_10_^0'=__rho_10_^post42, (__rho_5_^0-__rho_5_^post42 == 0 /\ a3131^0-a3131^post42 == 0 /\ -ret_ExAllocatePool3030^post42+ret_ExAllocatePool3030^0 == 0 /\ Irp^0-Irp^post42 == 0 /\ -ret_IoAllocateIrp2727^post42+ret_IoAllocateIrp2727^0 == 0 /\ a11^0-a11^post42 == 0 /\ -__rho_13_^post42+__rho_13_^0 == 0 /\ __rho_6_^0-__rho_6_^post42 == 0 /\ b3535^0-b3535^post42 == 0 /\ b22^0-b22^post42 == 0 /\ -a4444^post42+a4444^0 == 0 /\ b2626^0-b2626^post42 == 0 /\ __rho_1_^0-__rho_1_^post42 == 0 /\ i___02424^0-i___02424^post42 == 0 /\ -a77^post42+a77^0 == 0 /\ __rho_56_^0-__rho_56_^post42 == 0 /\ keR^0-keR^post42 == 0 /\ -k3^post42+k3^0 == 0 /\ -__rho_99_^post42+__rho_99_^0 == 0 /\ i___01717^0-i___01717^post42 == 0 /\ -k1^post42+k1^0 == 0 /\ __rho_8_^0-__rho_8_^post42 == 0 /\ -i___099^post42+i___099^0 == 0 /\ -a4343^post42+a4343^0 == 0 /\ -a1818^post42+a1818^0 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post42+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ -a3434^post42+a3434^0 == 0 /\ a2525^0-a2525^post42 == 0 /\ -i^post42+i^0 == 0 /\ i___04646^0-i___04646^post42 == 0 /\ -__rho_7_^post42+__rho_7_^0 == 0 /\ k5^0-k5^post42 == 0 /\ IsochResourceData^0 <= 0 /\ a2828^0-a2828^post42 == 0 /\ -k4^post42+k4^0 == 0 /\ b3333^0-b3333^post42 == 0 /\ a3232^0-a3232^post42 == 0 /\ Irql^0-Irql^post42 == 0 /\ -__rho_11_^post42+__rho_11_^0 == 0 /\ IsochDetachData^0-IsochDetachData^post42 == 0 /\ -pIrb^post42+pIrb^0 == 0 /\ __rho_2_^0-__rho_2_^post42 == 0 /\ __rho_12_^0-__rho_12_^post42 == 0 /\ -__rho_3_^post42+__rho_3_^0 == 0 /\ -i___02020^post42+i___02020^0 == 0 /\ -__rho_10_^post42+__rho_10_^0 == 0 /\ -i___04040^post42+i___04040^0 == 0 /\ IsochResourceData^0-IsochResourceData^post42 == 0 /\ k2^0-k2^post42 == 0 /\ -AsyncAddressData^post42+AsyncAddressData^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post42 == 0 /\ ntStatus^0-ntStatus^post42 == 0 /\ ResourceIrp^0-ResourceIrp^post42 == 0 /\ ret_IoSetDeviceInterfaceState44^0-ret_IoSetDeviceInterfaceState44^post42 == 0 /\ -__rho_4_^post42+__rho_4_^0 == 0 /\ keA^0-keA^post42 == 0 /\ -b2929^post42+b2929^0 == 0 /\ -i___01313^post42+i___01313^0 == 0 /\ -__rho_9_^post42+__rho_9_^0 == 0 /\ -a3838^post42+a3838^0 == 0 /\ CromData^0-CromData^post42 == 0 /\ -a3737^post42+a3737^0 == 0), cost: 1
  43: l31 -> l30 : i___01717^0'=i___01717^post43, IsochDetachData^0'=IsochDetachData^post43, ntStatus^0'=ntStatus^post43, __rho_6_^0'=__rho_6_^post43, k5^0'=k5^post43, __rho_2_^0'=__rho_2_^post43, a3838^0'=a3838^post43, a2828^0'=a2828^post43, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post43, b3535^0'=b3535^post43, CromData^0'=CromData^post43, b2626^0'=b2626^post43, __rho_4_^0'=__rho_4_^post43, k2^0'=k2^post43, __rho_12_^0'=__rho_12_^post43, i___02424^0'=i___02424^post43, a11^0'=a11^post43, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post43, __rho_8_^0'=__rho_8_^post43, keR^0'=keR^post43, a4444^0'=a4444^post43, a3232^0'=a3232^post43, ResourceIrp^0'=ResourceIrp^post43, i___01313^0'=i___01313^post43, Irql^0'=Irql^post43, b3333^0'=b3333^post43, __rho_5_^0'=__rho_5_^post43, k4^0'=k4^post43, __rho_1_^0'=__rho_1_^post43, i___04646^0'=i___04646^post43, a2525^0'=a2525^post43, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post43, __rho_9_^0'=__rho_9_^post43, AsyncAddressData^0'=AsyncAddressData^post43, b22^0'=b22^post43, a3737^0'=a3737^post43, k1^0'=k1^post43, __rho_11_^0'=__rho_11_^post43, i___02020^0'=i___02020^post43, IsochResourceData^0'=IsochResourceData^post43, pIrb^0'=pIrb^post43, __rho_7_^0'=__rho_7_^post43, keA^0'=keA^post43, __rho_3_^0'=__rho_3_^post43, a4343^0'=a4343^post43, a3131^0'=a3131^post43, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post43, i^0'=i^post43, Irp^0'=Irp^post43, b2929^0'=b2929^post43, __rho_56_^0'=__rho_56_^post43, k3^0'=k3^post43, __rho_13_^0'=__rho_13_^post43, i___04040^0'=i___04040^post43, a1818^0'=a1818^post43, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=__rho_99_^post43, a77^0'=a77^post43, a3434^0'=a3434^post43, i___099^0'=i___099^post43, __rho_10_^0'=__rho_10_^post43, (0 == 0 /\ ntStatus^0-ntStatus^post43 == 0 /\ b2929^0-b2929^post43 == 0 /\ k5^0-k5^post43 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post43 == 0 /\ -a3232^post43+a3232^0 == 0 /\ IsochDetachData^0-IsochDetachData^post43 == 0 /\ keR^0-keR^post43 == 0 /\ -k1^post43+k1^0 == 0 /\ -__rho_8_^post43+__rho_8_^0 == 0 /\ __rho_4_^0-__rho_4_^post43 == 0 /\ -i___04040^post43+i___04040^0 == 0 /\ -i___099^post43+i___099^0 == 0 /\ ret_t1394_SubmitIrpSynch3636^0-ret_t1394_SubmitIrpSynch3636^post43 == 0 /\ -AsyncAddressData^post43+AsyncAddressData^0 == 0 /\ -a4343^post43+a4343^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post43 == 0 /\ -b22^post43+b22^0 == 0 /\ -__rho_5_^post43+__rho_5_^0 == 0 /\ a2828^0-a2828^post43 == 0 /\ b2626^post43 == 0 /\ -__rho_13_^post43+__rho_13_^0 == 0 /\ a11^0-a11^post43 == 0 /\ -Irp^post43+Irp^0 == 0 /\ __rho_11_^0-__rho_11_^post43 == 0 /\ -keA^post43+keA^0 == 0 /\ b3535^0-b3535^post43 == 0 /\ -a1818^post43+a1818^0 == 0 /\ ResourceIrp^post43-ret_IoAllocateIrp2727^post43 == 0 /\ __rho_12_^0-__rho_12_^post43 == 0 /\ -a77^post43+a77^0 == 0 /\ i___01717^0-i___01717^post43 == 0 /\ -ret_IoSetDeviceInterfaceState44^post43+ret_IoSetDeviceInterfaceState44^0 == 0 /\ -k2^post43+k2^0 == 0 /\ a3737^0-a3737^post43 == 0 /\ -__rho_99_^post43+ret_IoAllocateIrp2727^post43 == 0 /\ -__rho_1_^post43+__rho_1_^0 == 0 /\ -a3131^post43+a3131^0 == 0 /\ -1+a2525^post43 == 0 /\ -k3^post43+k3^0 == 0 /\ 1-IsochResourceData^0 <= 0 /\ -__rho_10_^post43+__rho_10_^0 == 0 /\ -i___02020^post43+i___02020^0 == 0 /\ __rho_2_^0-__rho_2_^post43 == 0 /\ a3838^0-a3838^post43 == 0 /\ i___01313^0-i___01313^post43 == 0 /\ __rho_7_^0-__rho_7_^post43 == 0 /\ -a3434^post43+a3434^0 == 0 /\ a4444^0-a4444^post43 == 0 /\ -__rho_9_^post43+__rho_9_^0 == 0 /\ -CromData^post43+CromData^0 == 0 /\ -i^post43+i^0 == 0 /\ i___02424^0-i___02424^post43 == 0 /\ k4^0-k4^post43 == 0 /\ -IsochResourceData^post43+IsochResourceData^0 == 0 /\ __rho_6_^0-__rho_6_^post43 == 0 /\ -i___04646^post43+i___04646^0 == 0 /\ -__rho_56_^post43+__rho_56_^0 == 0 /\ -__rho_3_^post43+__rho_3_^0 == 0 /\ Irql^0-Irql^post43 == 0 /\ -b3333^post43+b3333^0 == 0), cost: 1
  46: l32 -> l28 : i___01717^0'=i___01717^post46, IsochDetachData^0'=IsochDetachData^post46, ntStatus^0'=ntStatus^post46, __rho_6_^0'=__rho_6_^post46, k5^0'=k5^post46, __rho_2_^0'=__rho_2_^post46, a3838^0'=a3838^post46, a2828^0'=a2828^post46, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post46, b3535^0'=b3535^post46, CromData^0'=CromData^post46, b2626^0'=b2626^post46, __rho_4_^0'=__rho_4_^post46, k2^0'=k2^post46, __rho_12_^0'=__rho_12_^post46, i___02424^0'=i___02424^post46, a11^0'=a11^post46, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post46, __rho_8_^0'=__rho_8_^post46, keR^0'=keR^post46, a4444^0'=a4444^post46, a3232^0'=a3232^post46, ResourceIrp^0'=ResourceIrp^post46, i___01313^0'=i___01313^post46, Irql^0'=Irql^post46, b3333^0'=b3333^post46, __rho_5_^0'=__rho_5_^post46, k4^0'=k4^post46, __rho_1_^0'=__rho_1_^post46, i___04646^0'=i___04646^post46, a2525^0'=a2525^post46, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post46, __rho_9_^0'=__rho_9_^post46, AsyncAddressData^0'=AsyncAddressData^post46, b22^0'=b22^post46, a3737^0'=a3737^post46, k1^0'=k1^post46, __rho_11_^0'=__rho_11_^post46, i___02020^0'=i___02020^post46, IsochResourceData^0'=IsochResourceData^post46, pIrb^0'=pIrb^post46, __rho_7_^0'=__rho_7_^post46, keA^0'=keA^post46, __rho_3_^0'=__rho_3_^post46, a4343^0'=a4343^post46, a3131^0'=a3131^post46, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post46, i^0'=i^post46, Irp^0'=Irp^post46, b2929^0'=b2929^post46, __rho_56_^0'=__rho_56_^post46, k3^0'=k3^post46, __rho_13_^0'=__rho_13_^post46, i___04040^0'=i___04040^post46, a1818^0'=a1818^post46, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post46, __rho_99_^0'=__rho_99_^post46, a77^0'=a77^post46, a3434^0'=a3434^post46, i___099^0'=i___099^post46, __rho_10_^0'=__rho_10_^post46, (i___01313^0-i___01313^post46 == 0 /\ -__rho_3_^post46+__rho_3_^0 == 0 /\ -b3333^post46+b3333^0 == 0 /\ __rho_8_^0-__rho_8_^post46 == 0 /\ -b2929^post46+b2929^0 == 0 /\ -a77^post46+a77^0 == 0 /\ -__rho_9_^post46+__rho_9_^0 == 0 /\ -__rho_5_^post46+__rho_5_^0 == 0 /\ -i^post46+i^0 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post46+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ -a3232^post46+a3232^0 == 0 /\ __rho_2_^0-__rho_2_^post46 == 0 /\ -i___04040^post46+i___04040^0 == 0 /\ -i___099^post46+i___099^0 == 0 /\ i___01717^0-i___01717^post46 == 0 /\ -Irp^post46+Irp^0 == 0 /\ -ret_IoSetDeviceInterfaceState44^post46+ret_IoSetDeviceInterfaceState44^0 == 0 /\ __rho_12_^0-__rho_12_^post46 == 0 /\ CromData^0-CromData^post46 == 0 /\ -a2525^post46+a2525^0 == 0 /\ AsyncAddressData^0-AsyncAddressData^post46 == 0 /\ __rho_11_^0-__rho_11_^post46 == 0 /\ pIrb^0-pIrb^post46 == 0 /\ __rho_6_^0-__rho_6_^post46 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post46 == 0 /\ -a3434^post46+a3434^0 == 0 /\ i___04646^0-i___04646^post46 == 0 /\ __rho_1_^0 <= 0 /\ -__rho_99_^post46+__rho_99_^0 == 0 /\ a3838^0-a3838^post46 == 0 /\ -__rho_13_^post46+__rho_13_^0 == 0 /\ a3737^0-a3737^post46 == 0 /\ -__rho_56_^post46+__rho_56_^0 == 0 /\ k5^0-k5^post46 == 0 /\ -b22^post46+b22^0 == 0 /\ -b3535^post46+b3535^0 == 0 /\ k4^0-k4^post46 == 0 /\ -a3131^post46+a3131^0 == 0 /\ -a1818^post46+a1818^0 == 0 /\ a4343^0-a4343^post46 == 0 /\ k1^0-k1^post46 == 0 /\ -k3^post46+k3^0 == 0 /\ __rho_7_^0-__rho_7_^post46 == 0 /\ i___02424^0-i___02424^post46 == 0 /\ -IsochResourceData^post46+IsochResourceData^0 == 0 /\ __rho_4_^0-__rho_4_^post46 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post46 == 0 /\ -ret_IoAllocateIrp2727^post46+ret_IoAllocateIrp2727^0 == 0 /\ b2626^0-b2626^post46 == 0 /\ -__rho_10_^post46+__rho_10_^0 == 0 /\ -keR^post46+keR^0 == 0 /\ Irql^0-Irql^post46 == 0 /\ -keA^post46+keA^0 == 0 /\ IsochDetachData^0-IsochDetachData^post46 == 0 /\ a2828^0-a2828^post46 == 0 /\ -__rho_1_^post46+__rho_1_^0 == 0 /\ -ResourceIrp^post46+ResourceIrp^0 == 0 /\ k2^0-k2^post46 == 0 /\ -a11^post46+a11^0 == 0 /\ a4444^0-a4444^post46 == 0 /\ ntStatus^0-ntStatus^post46 == 0 /\ i___02020^0-i___02020^post46 == 0), cost: 1
  47: l32 -> l28 : i___01717^0'=i___01717^post47, IsochDetachData^0'=IsochDetachData^post47, ntStatus^0'=ntStatus^post47, __rho_6_^0'=__rho_6_^post47, k5^0'=k5^post47, __rho_2_^0'=__rho_2_^post47, a3838^0'=a3838^post47, a2828^0'=a2828^post47, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post47, b3535^0'=b3535^post47, CromData^0'=CromData^post47, b2626^0'=b2626^post47, __rho_4_^0'=__rho_4_^post47, k2^0'=k2^post47, __rho_12_^0'=__rho_12_^post47, i___02424^0'=i___02424^post47, a11^0'=a11^post47, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post47, __rho_8_^0'=__rho_8_^post47, keR^0'=keR^post47, a4444^0'=a4444^post47, a3232^0'=a3232^post47, ResourceIrp^0'=ResourceIrp^post47, i___01313^0'=i___01313^post47, Irql^0'=Irql^post47, b3333^0'=b3333^post47, __rho_5_^0'=__rho_5_^post47, k4^0'=k4^post47, __rho_1_^0'=__rho_1_^post47, i___04646^0'=i___04646^post47, a2525^0'=a2525^post47, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post47, __rho_9_^0'=__rho_9_^post47, AsyncAddressData^0'=AsyncAddressData^post47, b22^0'=b22^post47, a3737^0'=a3737^post47, k1^0'=k1^post47, __rho_11_^0'=__rho_11_^post47, i___02020^0'=i___02020^post47, IsochResourceData^0'=IsochResourceData^post47, pIrb^0'=pIrb^post47, __rho_7_^0'=__rho_7_^post47, keA^0'=keA^post47, __rho_3_^0'=__rho_3_^post47, a4343^0'=a4343^post47, a3131^0'=a3131^post47, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post47, i^0'=i^post47, Irp^0'=Irp^post47, b2929^0'=b2929^post47, __rho_56_^0'=__rho_56_^post47, k3^0'=k3^post47, __rho_13_^0'=__rho_13_^post47, i___04040^0'=i___04040^post47, a1818^0'=a1818^post47, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post47, __rho_99_^0'=__rho_99_^post47, a77^0'=a77^post47, a3434^0'=a3434^post47, i___099^0'=i___099^post47, __rho_10_^0'=__rho_10_^post47, (-__rho_1_^post47+__rho_1_^0 == 0 /\ -__rho_56_^post47+__rho_56_^0 == 0 /\ keR^0-keR^post47 == 0 /\ 1-__rho_1_^0 <= 0 /\ -b3333^post47+b3333^0 == 0 /\ -b2929^post47+b2929^0 == 0 /\ k5^0-k5^post47 == 0 /\ -IsochResourceData^post47+IsochResourceData^0 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post47+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ -a4444^post47+a4444^0 == 0 /\ CromData^0-CromData^post47 == 0 /\ -ret_t1394Diag_PnpStopDevice33^post47+ntStatus^post47 == 0 /\ -1+a11^post47 == 0 /\ -__rho_3_^post47+__rho_3_^0 == 0 /\ -a4343^post47+a4343^0 == 0 /\ i___02424^0-i___02424^post47 == 0 /\ -k1^post47+k1^0 == 0 /\ k4^0-k4^post47 == 0 /\ -i___01313^post47+i___01313^0 == 0 /\ -a77^post47+a77^0 == 0 /\ k3^0-k3^post47 == 0 /\ -i___04646^post47+i___04646^0 == 0 /\ a3232^0-a3232^post47 == 0 /\ -__rho_10_^post47+__rho_10_^0 == 0 /\ -i___04040^post47+i___04040^0 == 0 /\ IsochDetachData^0-IsochDetachData^post47 == 0 /\ -a2525^post47+a2525^0 == 0 /\ Irql^0-Irql^post47 == 0 /\ -Irp^post47+Irp^0 == 0 /\ ret_IoSetDeviceInterfaceState44^0-ret_IoSetDeviceInterfaceState44^post47 == 0 /\ -a3434^post47+a3434^0 == 0 /\ a2828^0-a2828^post47 == 0 /\ k2^0-k2^post47 == 0 /\ -__rho_4_^post47+__rho_4_^0 == 0 /\ -i^post47+i^0 == 0 /\ -__rho_13_^post47+__rho_13_^0 == 0 /\ i___099^0-i___099^post47 == 0 /\ -a1818^post47+a1818^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^post47 == 0 /\ __rho_8_^0-__rho_8_^post47 == 0 /\ b3535^0-b3535^post47 == 0 /\ __rho_5_^0-__rho_5_^post47 == 0 /\ -ret_ExAllocatePool3030^post47+ret_ExAllocatePool3030^0 == 0 /\ __rho_11_^0-__rho_11_^post47 == 0 /\ i___02020^0-i___02020^post47 == 0 /\ a3838^0-a3838^post47 == 0 /\ __rho_7_^0-__rho_7_^post47 == 0 /\ -ret_IoAllocateIrp2727^post47+ret_IoAllocateIrp2727^0 == 0 /\ __rho_2_^0-__rho_2_^post47 == 0 /\ i___01717^0-i___01717^post47 == 0 /\ b22^post47-Irp^0 == 0 /\ AsyncAddressData^0-AsyncAddressData^post47 == 0 /\ __rho_12_^0-__rho_12_^post47 == 0 /\ -__rho_99_^post47+__rho_99_^0 == 0 /\ __rho_6_^0-__rho_6_^post47 == 0 /\ -keA^post47+keA^0 == 0 /\ -a3737^post47+a3737^0 == 0 /\ -pIrb^post47+pIrb^0 == 0 /\ ResourceIrp^0-ResourceIrp^post47 == 0 /\ b2626^0-b2626^post47 == 0 /\ -__rho_9_^post47+__rho_9_^0 == 0 /\ a3131^0-a3131^post47 == 0), cost: 1
  50: l33 -> l32 : i___01717^0'=i___01717^post50, IsochDetachData^0'=IsochDetachData^post50, ntStatus^0'=ntStatus^post50, __rho_6_^0'=__rho_6_^post50, k5^0'=k5^post50, __rho_2_^0'=__rho_2_^post50, a3838^0'=a3838^post50, a2828^0'=a2828^post50, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post50, b3535^0'=b3535^post50, CromData^0'=CromData^post50, b2626^0'=b2626^post50, __rho_4_^0'=__rho_4_^post50, k2^0'=k2^post50, __rho_12_^0'=__rho_12_^post50, i___02424^0'=i___02424^post50, a11^0'=a11^post50, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post50, __rho_8_^0'=__rho_8_^post50, keR^0'=keR^post50, a4444^0'=a4444^post50, a3232^0'=a3232^post50, ResourceIrp^0'=ResourceIrp^post50, i___01313^0'=i___01313^post50, Irql^0'=Irql^post50, b3333^0'=b3333^post50, __rho_5_^0'=__rho_5_^post50, k4^0'=k4^post50, __rho_1_^0'=__rho_1_^post50, i___04646^0'=i___04646^post50, a2525^0'=a2525^post50, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post50, __rho_9_^0'=__rho_9_^post50, AsyncAddressData^0'=AsyncAddressData^post50, b22^0'=b22^post50, a3737^0'=a3737^post50, k1^0'=k1^post50, __rho_11_^0'=__rho_11_^post50, i___02020^0'=i___02020^post50, IsochResourceData^0'=IsochResourceData^post50, pIrb^0'=pIrb^post50, __rho_7_^0'=__rho_7_^post50, keA^0'=keA^post50, __rho_3_^0'=__rho_3_^post50, a4343^0'=a4343^post50, a3131^0'=a3131^post50, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post50, i^0'=i^post50, Irp^0'=Irp^post50, b2929^0'=b2929^post50, __rho_56_^0'=__rho_56_^post50, k3^0'=k3^post50, __rho_13_^0'=__rho_13_^post50, i___04040^0'=i___04040^post50, a1818^0'=a1818^post50, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post50, __rho_99_^0'=__rho_99_^post50, a77^0'=a77^post50, a3434^0'=a3434^post50, i___099^0'=i___099^post50, __rho_10_^0'=__rho_10_^post50, (0 == 0 /\ k3^0-k3^post50 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post50+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ a11^0-a11^post50 == 0 /\ -b3333^post50+b3333^0 == 0 /\ -ret_IoAllocateIrp2727^post50+ret_IoAllocateIrp2727^0 == 0 /\ -i___01313^post50+i___01313^0 == 0 /\ -k1^post50+k1^0 == 0 /\ ret_IoSetDeviceInterfaceState44^0-ret_IoSetDeviceInterfaceState44^post50 == 0 /\ -a77^post50+a77^0 == 0 /\ -ret_ExAllocatePool3030^post50+ret_ExAllocatePool3030^0 == 0 /\ b2626^0-b2626^post50 == 0 /\ i___02424^0-i___02424^post50 == 0 /\ -__rho_3_^post50+__rho_3_^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post50 == 0 /\ Irql^0-Irql^post50 == 0 /\ -__rho_99_^post50+__rho_99_^0 == 0 /\ a3232^0-a3232^post50 == 0 /\ -i___04040^post50+i___04040^0 == 0 /\ Irp^0-Irp^post50 == 0 /\ -a4444^post50+a4444^0 == 0 /\ -__rho_4_^post50+__rho_4_^0 == 0 /\ k2^0-k2^post50 == 0 /\ ntStatus^0-ntStatus^post50 == 0 /\ -b2929^post50+b2929^0 == 0 /\ b3535^0-b3535^post50 == 0 /\ a2828^0-a2828^post50 == 0 /\ i___02020^0-i___02020^post50 == 0 /\ k5^0-k5^post50 == 0 /\ k4^0-k4^post50 == 0 /\ -a3737^post50+a3737^0 == 0 /\ -pIrb^post50+pIrb^0 == 0 /\ -a3434^post50+a3434^0 == 0 /\ IsochDetachData^0-IsochDetachData^post50 == 0 /\ -__rho_9_^post50+__rho_9_^0 == 0 /\ -__rho_7_^post50+__rho_7_^0 == 0 /\ -a1818^post50+a1818^0 == 0 /\ __rho_2_^0-__rho_2_^post50 == 0 /\ -__rho_13_^post50+__rho_13_^0 == 0 /\ -i^post50+i^0 == 0 /\ __rho_8_^0-__rho_8_^post50 == 0 /\ -__rho_56_^post50+__rho_56_^0 == 0 /\ -a2525^post50+a2525^0 == 0 /\ -b22^post50+b22^0 == 0 /\ __rho_12_^0-__rho_12_^post50 == 0 /\ -i___04646^post50+i___04646^0 == 0 /\ IsochResourceData^0-IsochResourceData^post50 == 0 /\ -__rho_11_^post50+__rho_11_^0 == 0 /\ i___01717^0-i___01717^post50 == 0 /\ -i___099^post50+i___099^0 == 0 /\ -__rho_6_^post50+__rho_6_^0 == 0 /\ keA^post50 == 0 /\ -a3838^post50+a3838^0 == 0 /\ AsyncAddressData^0-AsyncAddressData^post50 == 0 /\ -a4343^post50+a4343^0 == 0 /\ __rho_5_^0-__rho_5_^post50 == 0 /\ -__rho_10_^post50+__rho_10_^0 == 0 /\ keR^post50 == 0 /\ CromData^0-CromData^post50 == 0 /\ ResourceIrp^0-ResourceIrp^post50 == 0 /\ a3131^0-a3131^post50 == 0), cost: 1
  51: l34 -> l33 : i___01717^0'=i___01717^post51, IsochDetachData^0'=IsochDetachData^post51, ntStatus^0'=ntStatus^post51, __rho_6_^0'=__rho_6_^post51, k5^0'=k5^post51, __rho_2_^0'=__rho_2_^post51, a3838^0'=a3838^post51, a2828^0'=a2828^post51, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post51, b3535^0'=b3535^post51, CromData^0'=CromData^post51, b2626^0'=b2626^post51, __rho_4_^0'=__rho_4_^post51, k2^0'=k2^post51, __rho_12_^0'=__rho_12_^post51, i___02424^0'=i___02424^post51, a11^0'=a11^post51, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post51, __rho_8_^0'=__rho_8_^post51, keR^0'=keR^post51, a4444^0'=a4444^post51, a3232^0'=a3232^post51, ResourceIrp^0'=ResourceIrp^post51, i___01313^0'=i___01313^post51, Irql^0'=Irql^post51, b3333^0'=b3333^post51, __rho_5_^0'=__rho_5_^post51, k4^0'=k4^post51, __rho_1_^0'=__rho_1_^post51, i___04646^0'=i___04646^post51, a2525^0'=a2525^post51, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post51, __rho_9_^0'=__rho_9_^post51, AsyncAddressData^0'=AsyncAddressData^post51, b22^0'=b22^post51, a3737^0'=a3737^post51, k1^0'=k1^post51, __rho_11_^0'=__rho_11_^post51, i___02020^0'=i___02020^post51, IsochResourceData^0'=IsochResourceData^post51, pIrb^0'=pIrb^post51, __rho_7_^0'=__rho_7_^post51, keA^0'=keA^post51, __rho_3_^0'=__rho_3_^post51, a4343^0'=a4343^post51, a3131^0'=a3131^post51, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post51, i^0'=i^post51, Irp^0'=Irp^post51, b2929^0'=b2929^post51, __rho_56_^0'=__rho_56_^post51, k3^0'=k3^post51, __rho_13_^0'=__rho_13_^post51, i___04040^0'=i___04040^post51, a1818^0'=a1818^post51, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post51, __rho_99_^0'=__rho_99_^post51, a77^0'=a77^post51, a3434^0'=a3434^post51, i___099^0'=i___099^post51, __rho_10_^0'=__rho_10_^post51, (-i___01313^post51+i___01313^0 == 0 /\ -a3434^post51+a3434^0 == 0 /\ __rho_5_^0-__rho_5_^post51 == 0 /\ __rho_2_^0-__rho_2_^post51 == 0 /\ __rho_13_^0-__rho_13_^post51 == 0 /\ __rho_8_^0-__rho_8_^post51 == 0 /\ k2^0-k2^post51 == 0 /\ ret_t1394_SubmitIrpSynch3636^0-ret_t1394_SubmitIrpSynch3636^post51 == 0 /\ b22^0-b22^post51 == 0 /\ -a77^post51+a77^0 == 0 /\ i___01717^0-i___01717^post51 == 0 /\ -k1^post51+k1^0 == 0 /\ __rho_56_^0-__rho_56_^post51 == 0 /\ a2525^0-a2525^post51 == 0 /\ __rho_6_^0-__rho_6_^post51 == 0 /\ -__rho_10_^post51+__rho_10_^0 == 0 /\ -i___04040^post51+i___04040^0 == 0 /\ ResourceIrp^0-ResourceIrp^post51 == 0 /\ -AsyncAddressData^post51+AsyncAddressData^0 == 0 /\ -i___04646^post51+i___04646^0 == 0 /\ -__rho_7_^post51+__rho_7_^0 == 0 /\ -__rho_11_^post51+__rho_11_^0 == 0 /\ -b2929^post51+b2929^0 == 0 /\ a3838^0-a3838^post51 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post51 == 0 /\ -a1818^post51+a1818^0 == 0 /\ b3333^0-b3333^post51 == 0 /\ keR^0-keR^post51 == 0 /\ __rho_3_^0-__rho_3_^post51 == 0 /\ IsochResourceData^0-IsochResourceData^post51 == 0 /\ k4^0-k4^post51 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post51 == 0 /\ -Irp^post51+Irp^0 == 0 /\ b2626^0-b2626^post51 == 0 /\ i___02424^0-i___02424^post51 == 0 /\ CromData^0-CromData^post51 == 0 /\ -a3131^post51+a3131^0 == 0 /\ -i___02020^post51+i___02020^0 == 0 /\ __rho_4_^0-__rho_4_^post51 == 0 /\ -k3^post51+k3^0 == 0 /\ -a4343^post51+a4343^0 == 0 /\ -__rho_9_^post51+__rho_9_^0 == 0 /\ -__rho_99_^post51+__rho_99_^0 == 0 /\ -a4444^post51+a4444^0 == 0 /\ ret_IoAllocateIrp2727^0-ret_IoAllocateIrp2727^post51 == 0 /\ a11^0-a11^post51 == 0 /\ -a2828^post51+a2828^0 == 0 /\ -i___099^post51+i___099^0 == 0 /\ -pIrb^post51+pIrb^0 == 0 /\ k5^0-k5^post51 == 0 /\ b3535^0-b3535^post51 == 0 /\ -__rho_12_^post51+__rho_12_^0 == 0 /\ -a3737^post51+a3737^0 == 0 /\ ntStatus^0-ntStatus^post51 == 0 /\ __rho_1_^0-__rho_1_^post51 == 0 /\ -keA^post51+keA^0 == 0 /\ a3232^0-a3232^post51 == 0 /\ ret_IoSetDeviceInterfaceState44^0-ret_IoSetDeviceInterfaceState44^post51 == 0 /\ Irql^0-Irql^post51 == 0 /\ IsochDetachData^0-IsochDetachData^post51 == 0 /\ -i^post51+i^0 == 0), cost: 1


Applied preprocessing
Original rule:
l0 -> l1 : i___01717^0'=i___01717^post0, IsochDetachData^0'=IsochDetachData^post0, ntStatus^0'=ntStatus^post0, __rho_6_^0'=__rho_6_^post0, k5^0'=k5^post0, __rho_2_^0'=__rho_2_^post0, a3838^0'=a3838^post0, a2828^0'=a2828^post0, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post0, b3535^0'=b3535^post0, CromData^0'=CromData^post0, b2626^0'=b2626^post0, __rho_4_^0'=__rho_4_^post0, k2^0'=k2^post0, __rho_12_^0'=__rho_12_^post0, i___02424^0'=i___02424^post0, a11^0'=a11^post0, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post0, __rho_8_^0'=__rho_8_^post0, keR^0'=keR^post0, a4444^0'=a4444^post0, a3232^0'=a3232^post0, ResourceIrp^0'=ResourceIrp^post0, i___01313^0'=i___01313^post0, Irql^0'=Irql^post0, b3333^0'=b3333^post0, __rho_5_^0'=__rho_5_^post0, k4^0'=k4^post0, __rho_1_^0'=__rho_1_^post0, i___04646^0'=i___04646^post0, a2525^0'=a2525^post0, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post0, __rho_9_^0'=__rho_9_^post0, AsyncAddressData^0'=AsyncAddressData^post0, b22^0'=b22^post0, a3737^0'=a3737^post0, k1^0'=k1^post0, __rho_11_^0'=__rho_11_^post0, i___02020^0'=i___02020^post0, IsochResourceData^0'=IsochResourceData^post0, pIrb^0'=pIrb^post0, __rho_7_^0'=__rho_7_^post0, keA^0'=keA^post0, __rho_3_^0'=__rho_3_^post0, a4343^0'=a4343^post0, a3131^0'=a3131^post0, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post0, i^0'=i^post0, Irp^0'=Irp^post0, b2929^0'=b2929^post0, __rho_56_^0'=__rho_56_^post0, k3^0'=k3^post0, __rho_13_^0'=__rho_13_^post0, i___04040^0'=i___04040^post0, a1818^0'=a1818^post0, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post0, __rho_99_^0'=__rho_99_^post0, a77^0'=a77^post0, a3434^0'=a3434^post0, i___099^0'=i___099^post0, __rho_10_^0'=__rho_10_^post0, (__rho_4_^0-__rho_4_^post0 == 0 /\ IsochDetachData^0-IsochDetachData^post0 == 0 /\ -a1818^post0+a1818^0 == 0 /\ keR^0-keR^post0 == 0 /\ -b3333^post0+b3333^0 == 0 /\ -__rho_5_^post0+__rho_5_^0 == 0 /\ __rho_12_^0-__rho_12_^post0 == 0 /\ ntStatus^0-ntStatus^post0 == 0 /\ -__rho_56_^post0+__rho_56_^0 == 0 /\ -i^post0+i^0 == 0 /\ a3838^0-a3838^post0 == 0 /\ -a3131^post0+a3131^0 == 0 /\ __rho_2_^0-__rho_2_^post0 == 0 /\ k1^0-k1^post0 == 0 /\ -a3232^post0+a3232^0 == 0 /\ -ret_IoSetDeviceInterfaceState44^post0+ret_IoSetDeviceInterfaceState44^0 == 0 /\ __rho_11_^0-__rho_11_^post0 == 0 /\ __rho_8_^0-__rho_8_^post0 == 0 /\ pIrb^0-pIrb^post0 == 0 /\ -ResourceIrp^post0+ResourceIrp^0 == 0 /\ i___01313^0-i___01313^post0 == 0 /\ -i___04040^post0+i___04040^0 == 0 /\ __rho_6_^0-__rho_6_^post0 == 0 /\ -__rho_10_^post0+__rho_10_^0 == 0 /\ i___04646^0-i___04646^post0 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post0 == 0 /\ -__rho_9_^post0+__rho_9_^0 == 0 /\ -b2929^post0+b2929^0 == 0 /\ -keA^post0+keA^0 == 0 /\ i___01717^0-i___01717^post0 == 0 /\ -b22^post0+b22^0 == 0 /\ a3737^0-a3737^post0 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post0+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ AsyncAddressData^0 <= 0 /\ -ret_IoAllocateIrp2727^post0+ret_IoAllocateIrp2727^0 == 0 /\ -__rho_13_^post0+__rho_13_^0 == 0 /\ k4^0-k4^post0 == 0 /\ k5^0-k5^post0 == 0 /\ k2^0-k2^post0 == 0 /\ -AsyncAddressData^post0+AsyncAddressData^0 == 0 /\ -Irp^post0+Irp^0 == 0 /\ CromData^0-CromData^post0 == 0 /\ -i___02424^post0+i___02424^0 == 0 /\ -a77^post0+a77^0 == 0 /\ -IsochResourceData^post0+IsochResourceData^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post0 == 0 /\ -__rho_3_^post0+__rho_3_^0 == 0 /\ a2525^0-a2525^post0 == 0 /\ -a4343^post0+a4343^0 == 0 /\ __rho_99_^0-__rho_99_^post0 == 0 /\ -i___099^post0+i___099^0 == 0 /\ -b2626^post0+b2626^0 == 0 /\ -k3^post0+k3^0 == 0 /\ Irql^0-Irql^post0 == 0 /\ a2828^0-a2828^post0 == 0 /\ i___02020^0-i___02020^post0 == 0 /\ a4444^0-a4444^post0 == 0 /\ __rho_7_^0-__rho_7_^post0 == 0 /\ -b3535^post0+b3535^0 == 0 /\ -a11^post0+a11^0 == 0 /\ -a3434^post0+a3434^0 == 0 /\ -__rho_1_^post0+__rho_1_^0 == 0), cost: 1
New rule:
l0 -> l1 : AsyncAddressData^0 <= 0, cost: 1

Applied preprocessing
Original rule:
l0 -> l1 : i___01717^0'=i___01717^post1, IsochDetachData^0'=IsochDetachData^post1, ntStatus^0'=ntStatus^post1, __rho_6_^0'=__rho_6_^post1, k5^0'=k5^post1, __rho_2_^0'=__rho_2_^post1, a3838^0'=a3838^post1, a2828^0'=a2828^post1, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post1, b3535^0'=b3535^post1, CromData^0'=CromData^post1, b2626^0'=b2626^post1, __rho_4_^0'=__rho_4_^post1, k2^0'=k2^post1, __rho_12_^0'=__rho_12_^post1, i___02424^0'=i___02424^post1, a11^0'=a11^post1, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post1, __rho_8_^0'=__rho_8_^post1, keR^0'=keR^post1, a4444^0'=a4444^post1, a3232^0'=a3232^post1, ResourceIrp^0'=ResourceIrp^post1, i___01313^0'=i___01313^post1, Irql^0'=Irql^post1, b3333^0'=b3333^post1, __rho_5_^0'=__rho_5_^post1, k4^0'=k4^post1, __rho_1_^0'=__rho_1_^post1, i___04646^0'=i___04646^post1, a2525^0'=a2525^post1, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post1, __rho_9_^0'=__rho_9_^post1, AsyncAddressData^0'=AsyncAddressData^post1, b22^0'=b22^post1, a3737^0'=a3737^post1, k1^0'=k1^post1, __rho_11_^0'=__rho_11_^post1, i___02020^0'=i___02020^post1, IsochResourceData^0'=IsochResourceData^post1, pIrb^0'=pIrb^post1, __rho_7_^0'=__rho_7_^post1, keA^0'=keA^post1, __rho_3_^0'=__rho_3_^post1, a4343^0'=a4343^post1, a3131^0'=a3131^post1, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post1, i^0'=i^post1, Irp^0'=Irp^post1, b2929^0'=b2929^post1, __rho_56_^0'=__rho_56_^post1, k3^0'=k3^post1, __rho_13_^0'=__rho_13_^post1, i___04040^0'=i___04040^post1, a1818^0'=a1818^post1, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post1, __rho_99_^0'=__rho_99_^post1, a77^0'=a77^post1, a3434^0'=a3434^post1, i___099^0'=i___099^post1, __rho_10_^0'=__rho_10_^post1, (-IsochResourceData^post1+IsochResourceData^0 == 0 /\ -ret_IoAllocateIrp2727^post1+ret_IoAllocateIrp2727^0 == 0 /\ -keR^post1+keR^0 == 0 /\ __rho_2_^0-__rho_2_^post1 == 0 /\ k2^0-k2^post1 == 0 /\ -a3434^post1+a3434^0 == 0 /\ -a2525^post1+a2525^0 == 0 /\ -__rho_5_^post1+__rho_5_^0 == 0 /\ __rho_8_^0-__rho_8_^post1 == 0 /\ -__rho_99_^post1+__rho_99_^0 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post1 == 0 /\ i___04040^0-i___04040^post1 == 0 /\ -b22^post1+b22^0 == 0 /\ a2828^0-a2828^post1 == 0 /\ i___01717^0-i___01717^post1 == 0 /\ -__rho_13_^post1+__rho_13_^0 == 0 /\ -__rho_9_^post1+__rho_9_^0 == 0 /\ pIrb^0-pIrb^post1 == 0 /\ __rho_12_^0-__rho_12_^post1 == 0 /\ -a11^post1+a11^0 == 0 /\ __rho_6_^0-__rho_6_^post1 == 0 /\ -i___099^post1+i___099^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post1 == 0 /\ -k3^post1+k3^0 == 0 /\ a3838^0-a3838^post1 == 0 /\ AsyncAddressData^0-AsyncAddressData^post1 == 0 /\ -a1818^post1+a1818^0 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post1+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ CromData^0-CromData^post1 == 0 /\ -b2929^post1+b2929^0 == 0 /\ __rho_11_^0-__rho_11_^post1 == 0 /\ __rho_4_^0-__rho_4_^post1 == 0 /\ a3131^0-a3131^post1 == 0 /\ -i^post1+i^0 == 0 /\ -__rho_1_^post1+__rho_1_^0 == 0 /\ ntStatus^0-ntStatus^post1 == 0 /\ -ret_IoSetDeviceInterfaceState44^post1+ret_IoSetDeviceInterfaceState44^0 == 0 /\ i___02020^0-i___02020^post1 == 0 /\ b2626^0-b2626^post1 == 0 /\ -Irp^post1+Irp^0 == 0 /\ k1^0-k1^post1 == 0 /\ i___02424^0-i___02424^post1 == 0 /\ __rho_7_^0-__rho_7_^post1 == 0 /\ -ResourceIrp^post1+ResourceIrp^0 == 0 /\ a4444^0-a4444^post1 == 0 /\ -__rho_3_^post1+__rho_3_^0 == 0 /\ -__rho_56_^post1+__rho_56_^0 == 0 /\ -a77^post1+a77^0 == 0 /\ -keA^post1+keA^0 == 0 /\ 1-AsyncAddressData^0 <= 0 /\ k4^0-k4^post1 == 0 /\ b3535^0-b3535^post1 == 0 /\ i___01313^0-i___01313^post1 == 0 /\ a4343^0-a4343^post1 == 0 /\ -i___04646^post1+i___04646^0 == 0 /\ -a3232^post1+a3232^0 == 0 /\ Irql^0-Irql^post1 == 0 /\ -b3333^post1+b3333^0 == 0 /\ IsochDetachData^0-IsochDetachData^post1 == 0 /\ -__rho_10_^post1+__rho_10_^0 == 0 /\ k5^0-k5^post1 == 0 /\ -a3737^post1+a3737^0 == 0), cost: 1
New rule:
l0 -> l1 : -1+AsyncAddressData^0 >= 0, cost: 1

Applied preprocessing
Original rule:
l2 -> l0 : i___01717^0'=i___01717^post2, IsochDetachData^0'=IsochDetachData^post2, ntStatus^0'=ntStatus^post2, __rho_6_^0'=__rho_6_^post2, k5^0'=k5^post2, __rho_2_^0'=__rho_2_^post2, a3838^0'=a3838^post2, a2828^0'=a2828^post2, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post2, b3535^0'=b3535^post2, CromData^0'=CromData^post2, b2626^0'=b2626^post2, __rho_4_^0'=__rho_4_^post2, k2^0'=k2^post2, __rho_12_^0'=__rho_12_^post2, i___02424^0'=i___02424^post2, a11^0'=a11^post2, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post2, __rho_8_^0'=__rho_8_^post2, keR^0'=keR^post2, a4444^0'=a4444^post2, a3232^0'=a3232^post2, ResourceIrp^0'=ResourceIrp^post2, i___01313^0'=i___01313^post2, Irql^0'=Irql^post2, b3333^0'=b3333^post2, __rho_5_^0'=__rho_5_^post2, k4^0'=k4^post2, __rho_1_^0'=__rho_1_^post2, i___04646^0'=i___04646^post2, a2525^0'=a2525^post2, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post2, __rho_9_^0'=__rho_9_^post2, AsyncAddressData^0'=AsyncAddressData^post2, b22^0'=b22^post2, a3737^0'=a3737^post2, k1^0'=k1^post2, __rho_11_^0'=__rho_11_^post2, i___02020^0'=i___02020^post2, IsochResourceData^0'=IsochResourceData^post2, pIrb^0'=pIrb^post2, __rho_7_^0'=__rho_7_^post2, keA^0'=keA^post2, __rho_3_^0'=__rho_3_^post2, a4343^0'=a4343^post2, a3131^0'=a3131^post2, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post2, i^0'=i^post2, Irp^0'=Irp^post2, b2929^0'=b2929^post2, __rho_56_^0'=__rho_56_^post2, k3^0'=k3^post2, __rho_13_^0'=__rho_13_^post2, i___04040^0'=i___04040^post2, a1818^0'=a1818^post2, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post2, __rho_99_^0'=__rho_99_^post2, a77^0'=a77^post2, a3434^0'=a3434^post2, i___099^0'=i___099^post2, __rho_10_^0'=__rho_10_^post2, (-__rho_4_^post2+__rho_4_^0 == 0 /\ -a3737^post2+a3737^0 == 0 /\ -ret_ExAllocatePool3030^post2+ret_ExAllocatePool3030^0 == 0 /\ -a3434^post2+a3434^0 == 0 /\ ntStatus^0-ntStatus^post2 == 0 /\ k3^0-k3^post2 == 0 /\ a4444^0-a4444^post2 == 0 /\ a11^0-a11^post2 == 0 /\ b2626^0-b2626^post2 == 0 /\ -__rho_99_^post2+__rho_99_^0 == 0 /\ -__rho_9_^post2+__rho_9_^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post2 == 0 /\ -__rho_1_^post2+__rho_1_^0 == 0 /\ k4^0-k4^post2 == 0 /\ -b2929^post2+b2929^0 == 0 /\ -k1^post2+k1^0 == 0 /\ Irp^0-Irp^post2 == 0 /\ i___02424^0-i___02424^post2 == 0 /\ ret_IoSetDeviceInterfaceState44^0-ret_IoSetDeviceInterfaceState44^post2 == 0 /\ -b3333^post2+b3333^0 == 0 /\ -b22^post2+b22^0 == 0 /\ -a3131^post2+a3131^0 == 0 /\ -__rho_7_^post2+__rho_7_^0 == 0 /\ -a1818^post2+a1818^0 == 0 /\ IsochDetachData^0-IsochDetachData^post2 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post2+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ keR^0-keR^post2 == 0 /\ -i___04646^post2+i___04646^0 == 0 /\ -i___04040^post2+i___04040^0 == 0 /\ b3535^0-b3535^post2 == 0 /\ a3232^0-a3232^post2 == 0 /\ a2828^0-a2828^post2 == 0 /\ k5^0-k5^post2 == 0 /\ -__rho_10_^post2+__rho_10_^0 == 0 /\ __rho_9_^0 <= 0 /\ k2^0-k2^post2 == 0 /\ i___02020^0-i___02020^post2 == 0 /\ __rho_2_^0-__rho_2_^post2 == 0 /\ -a2525^post2+a2525^0 == 0 /\ -pIrb^post2+pIrb^0 == 0 /\ -__rho_13_^post2+__rho_13_^0 == 0 /\ Irql^0-Irql^post2 == 0 /\ __rho_8_^0-__rho_8_^post2 == 0 /\ i___01717^0-i___01717^post2 == 0 /\ -__rho_56_^post2+__rho_56_^0 == 0 /\ -a77^post2+a77^0 == 0 /\ __rho_11_^0-__rho_11_^post2 == 0 /\ keA^0-keA^post2 == 0 /\ -__rho_3_^post2+__rho_3_^0 == 0 /\ ResourceIrp^0-ResourceIrp^post2 == 0 /\ IsochResourceData^0-IsochResourceData^post2 == 0 /\ AsyncAddressData^0-AsyncAddressData^post2 == 0 /\ -__rho_6_^post2+__rho_6_^0 == 0 /\ -i___099^post2+i___099^0 == 0 /\ __rho_12_^0-__rho_12_^post2 == 0 /\ CromData^0-CromData^post2 == 0 /\ -i^post2+i^0 == 0 /\ -a3838^post2+a3838^0 == 0 /\ __rho_5_^0-__rho_5_^post2 == 0 /\ -a4343^post2+a4343^0 == 0 /\ -ret_IoAllocateIrp2727^post2+ret_IoAllocateIrp2727^0 == 0 /\ -i___01313^post2+i___01313^0 == 0), cost: 1
New rule:
l2 -> l0 : __rho_9_^0 <= 0, cost: 1

Applied preprocessing
Original rule:
l2 -> l0 : i___01717^0'=i___01717^post3, IsochDetachData^0'=IsochDetachData^post3, ntStatus^0'=ntStatus^post3, __rho_6_^0'=__rho_6_^post3, k5^0'=k5^post3, __rho_2_^0'=__rho_2_^post3, a3838^0'=a3838^post3, a2828^0'=a2828^post3, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post3, b3535^0'=b3535^post3, CromData^0'=CromData^post3, b2626^0'=b2626^post3, __rho_4_^0'=__rho_4_^post3, k2^0'=k2^post3, __rho_12_^0'=__rho_12_^post3, i___02424^0'=i___02424^post3, a11^0'=a11^post3, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post3, __rho_8_^0'=__rho_8_^post3, keR^0'=keR^post3, a4444^0'=a4444^post3, a3232^0'=a3232^post3, ResourceIrp^0'=ResourceIrp^post3, i___01313^0'=i___01313^post3, Irql^0'=Irql^post3, b3333^0'=b3333^post3, __rho_5_^0'=__rho_5_^post3, k4^0'=k4^post3, __rho_1_^0'=__rho_1_^post3, i___04646^0'=i___04646^post3, a2525^0'=a2525^post3, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post3, __rho_9_^0'=__rho_9_^post3, AsyncAddressData^0'=AsyncAddressData^post3, b22^0'=b22^post3, a3737^0'=a3737^post3, k1^0'=k1^post3, __rho_11_^0'=__rho_11_^post3, i___02020^0'=i___02020^post3, IsochResourceData^0'=IsochResourceData^post3, pIrb^0'=pIrb^post3, __rho_7_^0'=__rho_7_^post3, keA^0'=keA^post3, __rho_3_^0'=__rho_3_^post3, a4343^0'=a4343^post3, a3131^0'=a3131^post3, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post3, i^0'=i^post3, Irp^0'=Irp^post3, b2929^0'=b2929^post3, __rho_56_^0'=__rho_56_^post3, k3^0'=k3^post3, __rho_13_^0'=__rho_13_^post3, i___04040^0'=i___04040^post3, a1818^0'=a1818^post3, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post3, __rho_99_^0'=__rho_99_^post3, a77^0'=a77^post3, a3434^0'=a3434^post3, i___099^0'=i___099^post3, __rho_10_^0'=__rho_10_^post3, (Irp^0-Irp^post3 == 0 /\ -i___04646^post3+i___04646^0 == 0 /\ -a3737^post3+a3737^0 == 0 /\ -i___04040^post3+i___04040^0 == 0 /\ -i___099^post3+i___099^0 == 0 /\ -a4343^post3+a4343^0 == 0 /\ -__rho_12_^post3+__rho_12_^0 == 0 /\ __rho_1_^0-__rho_1_^post3 == 0 /\ b22^0-b22^post3 == 0 /\ IsochDetachData^0-IsochDetachData^post3 == 0 /\ __rho_2_^0-__rho_2_^post3 == 0 /\ -__rho_99_^post3+__rho_99_^0 == 0 /\ b3535^0-b3535^post3 == 0 /\ -keA^post3+keA^0 == 0 /\ ret_t1394_SubmitIrpSynch3636^0-ret_t1394_SubmitIrpSynch3636^post3 == 0 /\ -__rho_13_^post3+__rho_13_^0 == 0 /\ -__rho_7_^post3+__rho_7_^0 == 0 /\ b2626^0-b2626^post3 == 0 /\ a3838^0-a3838^post3 == 0 /\ -i___01313^post3+i___01313^0 == 0 /\ __rho_9_^0-__rho_9_^post3 == 0 /\ a2525^0-a2525^post3 == 0 /\ i___01717^0-i___01717^post3 == 0 /\ -ret_ExAllocatePool3030^post3+ret_ExAllocatePool3030^0 == 0 /\ __rho_6_^0-__rho_6_^post3 == 0 /\ __rho_5_^0-__rho_5_^post3 == 0 /\ __rho_8_^0-__rho_8_^post3 == 0 /\ -a77^post3+a77^0 == 0 /\ -__rho_56_^post3+__rho_56_^0 == 0 /\ CromData^0-CromData^post3 == 0 /\ i___02424^0-i___02424^post3 == 0 /\ k5^0-k5^post3 == 0 /\ -__rho_11_^post3+__rho_11_^0 == 0 /\ ResourceIrp^0-ResourceIrp^post3 == 0 /\ -Irql^post3+Irql^0 == 0 /\ -k3^post3+k3^0 == 0 /\ b3333^0-b3333^post3 == 0 /\ -__rho_10_^post3+__rho_10_^0 == 0 /\ -a2828^post3+a2828^0 == 0 /\ -i___02020^post3+i___02020^0 == 0 /\ -__rho_4_^post3+__rho_4_^0 == 0 /\ a3232^0-a3232^post3 == 0 /\ keR^0-keR^post3 == 0 /\ IsochResourceData^0-IsochResourceData^post3 == 0 /\ -pIrb^post3+pIrb^0 == 0 /\ -a3434^post3+a3434^0 == 0 /\ __rho_3_^0-__rho_3_^post3 == 0 /\ ntStatus^0-ntStatus^post3 == 0 /\ k2^0-k2^post3 == 0 /\ ret_IoSetDeviceInterfaceState44^0-ret_IoSetDeviceInterfaceState44^post3 == 0 /\ -a1818^post3+a1818^0 == 0 /\ -AsyncAddressData^post3+AsyncAddressData^0 == 0 /\ -b2929^post3+b2929^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post3 == 0 /\ -i^post3+i^0 == 0 /\ a11^0-a11^post3 == 0 /\ -k1^post3+k1^0 == 0 /\ ret_IoAllocateIrp2727^0-ret_IoAllocateIrp2727^post3 == 0 /\ 1-__rho_9_^0 <= 0 /\ -a4444^post3+a4444^0 == 0 /\ -k4^post3+k4^0 == 0 /\ -a3131^post3+a3131^0 == 0), cost: 1
New rule:
l2 -> l0 : -1+__rho_9_^0 >= 0, cost: 1

Applied preprocessing
Original rule:
l3 -> l2 : i___01717^0'=i___01717^post4, IsochDetachData^0'=IsochDetachData^post4, ntStatus^0'=ntStatus^post4, __rho_6_^0'=__rho_6_^post4, k5^0'=k5^post4, __rho_2_^0'=__rho_2_^post4, a3838^0'=a3838^post4, a2828^0'=a2828^post4, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post4, b3535^0'=b3535^post4, CromData^0'=CromData^post4, b2626^0'=b2626^post4, __rho_4_^0'=__rho_4_^post4, k2^0'=k2^post4, __rho_12_^0'=__rho_12_^post4, i___02424^0'=i___02424^post4, a11^0'=a11^post4, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post4, __rho_8_^0'=__rho_8_^post4, keR^0'=keR^post4, a4444^0'=a4444^post4, a3232^0'=a3232^post4, ResourceIrp^0'=ResourceIrp^post4, i___01313^0'=i___01313^post4, Irql^0'=Irql^post4, b3333^0'=b3333^post4, __rho_5_^0'=__rho_5_^post4, k4^0'=k4^post4, __rho_1_^0'=__rho_1_^post4, i___04646^0'=i___04646^post4, a2525^0'=a2525^post4, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post4, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post4, b22^0'=b22^post4, a3737^0'=a3737^post4, k1^0'=k1^post4, __rho_11_^0'=__rho_11_^post4, i___02020^0'=i___02020^post4, IsochResourceData^0'=IsochResourceData^post4, pIrb^0'=pIrb^post4, __rho_7_^0'=__rho_7_^post4, keA^0'=keA^post4, __rho_3_^0'=__rho_3_^post4, a4343^0'=a4343^post4, a3131^0'=a3131^post4, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post4, i^0'=i^post4, Irp^0'=Irp^post4, b2929^0'=b2929^post4, __rho_56_^0'=__rho_56_^post4, k3^0'=k3^post4, __rho_13_^0'=__rho_13_^post4, i___04040^0'=i___04040^post4, a1818^0'=a1818^post4, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post4, __rho_99_^0'=__rho_99_^post4, a77^0'=a77^post4, a3434^0'=a3434^post4, i___099^0'=i___099^post4, __rho_10_^0'=__rho_10_^post4, (0 == 0 /\ -i___02020^post4+i___02020^0 == 0 /\ __rho_8_^0-__rho_8_^post4 == 0 /\ -pIrb^post4+pIrb^0 == 0 /\ -AsyncAddressData^post4+AsyncAddressData^0 == 0 /\ -b2929^post4+b2929^0 == 0 /\ b3535^0-b3535^post4 == 0 /\ -Irql^post4+Irql^0 == 0 /\ -k1^post4+k1^0 == 0 /\ -i___01313^post4+i___01313^0 == 0 /\ -__rho_11_^post4+__rho_11_^0 == 0 /\ b3333^0-b3333^post4 == 0 /\ ret_t1394_SubmitIrpSynch3636^0-ret_t1394_SubmitIrpSynch3636^post4 == 0 /\ a3838^0-a3838^post4 == 0 /\ -i___04040^post4+i___04040^0 == 0 /\ -i___099^post4+i___099^0 == 0 /\ -a4343^post4+a4343^0 == 0 /\ __rho_2_^0-__rho_2_^post4 == 0 /\ i___01717^0-i___01717^post4 == 0 /\ b22^0-b22^post4 == 0 /\ -Irp^post4+Irp^0 == 0 /\ a2525^0-a2525^post4 == 0 /\ __rho_1_^0-__rho_1_^post4 == 0 /\ -a3434^post4+a3434^0 == 0 /\ -__rho_12_^post4+__rho_12_^0 == 0 /\ a4444^0-a4444^post4 == 0 /\ i^0-i^post4 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post4 == 0 /\ __rho_6_^0-__rho_6_^post4 == 0 /\ __rho_56_^0-__rho_56_^post4 == 0 /\ -__rho_13_^post4+__rho_13_^0 == 0 /\ IsochResourceData^0-IsochResourceData^post4 == 0 /\ ResourceIrp^0-ResourceIrp^post4 == 0 /\ b2626^0-b2626^post4 == 0 /\ __rho_3_^0-__rho_3_^post4 == 0 /\ keR^0-keR^post4 == 0 /\ -a3131^post4+a3131^0 == 0 /\ ret_IoSetDeviceInterfaceState44^0-ret_IoSetDeviceInterfaceState44^post4 == 0 /\ -k4^post4+k4^0 == 0 /\ k5^0-k5^post4 == 0 /\ -a77^post4+a77^0 == 0 /\ -a1818^post4+a1818^0 == 0 /\ -__rho_7_^post4+__rho_7_^0 == 0 /\ -a3737^post4+a3737^0 == 0 /\ i___02424^0-i___02424^post4 == 0 /\ -k3^post4+k3^0 == 0 /\ __rho_5_^0-__rho_5_^post4 == 0 /\ CromData^0-CromData^post4 == 0 /\ __rho_4_^0-__rho_4_^post4 == 0 /\ ntStatus^0-ntStatus^post4 == 0 /\ i___04646^0-i___04646^post4 == 0 /\ -__rho_10_^post4+__rho_10_^0 == 0 /\ -a2828^post4+a2828^0 == 0 /\ a3232^0-a3232^post4 == 0 /\ IsochDetachData^0-IsochDetachData^post4 == 0 /\ a11^0-a11^post4 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post4 == 0 /\ -keA^post4+keA^0 == 0 /\ -__rho_99_^post4+__rho_99_^0 == 0 /\ k2^0-k2^post4 == 0 /\ ret_IoAllocateIrp2727^0-ret_IoAllocateIrp2727^post4 == 0), cost: 1
New rule:
l3 -> l2 : __rho_9_^0'=__rho_9_^post4, 0 == 0, cost: 1

Applied preprocessing
Original rule:
l4 -> l3 : i___01717^0'=i___01717^post5, IsochDetachData^0'=IsochDetachData^post5, ntStatus^0'=ntStatus^post5, __rho_6_^0'=__rho_6_^post5, k5^0'=k5^post5, __rho_2_^0'=__rho_2_^post5, a3838^0'=a3838^post5, a2828^0'=a2828^post5, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post5, b3535^0'=b3535^post5, CromData^0'=CromData^post5, b2626^0'=b2626^post5, __rho_4_^0'=__rho_4_^post5, k2^0'=k2^post5, __rho_12_^0'=__rho_12_^post5, i___02424^0'=i___02424^post5, a11^0'=a11^post5, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post5, __rho_8_^0'=__rho_8_^post5, keR^0'=keR^post5, a4444^0'=a4444^post5, a3232^0'=a3232^post5, ResourceIrp^0'=ResourceIrp^post5, i___01313^0'=i___01313^post5, Irql^0'=Irql^post5, b3333^0'=b3333^post5, __rho_5_^0'=__rho_5_^post5, k4^0'=k4^post5, __rho_1_^0'=__rho_1_^post5, i___04646^0'=i___04646^post5, a2525^0'=a2525^post5, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post5, __rho_9_^0'=__rho_9_^post5, AsyncAddressData^0'=AsyncAddressData^post5, b22^0'=b22^post5, a3737^0'=a3737^post5, k1^0'=k1^post5, __rho_11_^0'=__rho_11_^post5, i___02020^0'=i___02020^post5, IsochResourceData^0'=IsochResourceData^post5, pIrb^0'=pIrb^post5, __rho_7_^0'=__rho_7_^post5, keA^0'=keA^post5, __rho_3_^0'=__rho_3_^post5, a4343^0'=a4343^post5, a3131^0'=a3131^post5, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post5, i^0'=i^post5, Irp^0'=Irp^post5, b2929^0'=b2929^post5, __rho_56_^0'=__rho_56_^post5, k3^0'=k3^post5, __rho_13_^0'=__rho_13_^post5, i___04040^0'=i___04040^post5, a1818^0'=a1818^post5, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post5, __rho_99_^0'=__rho_99_^post5, a77^0'=a77^post5, a3434^0'=a3434^post5, i___099^0'=i___099^post5, __rho_10_^0'=__rho_10_^post5, (-CromData^post5+CromData^0 == 0 /\ -i___01313^post5+i___01313^0 == 0 /\ a2525^0-a2525^post5 == 0 /\ a3232^0-a3232^post5 == 0 /\ ret_t1394_SubmitIrpSynch3636^0-ret_t1394_SubmitIrpSynch3636^post5 == 0 /\ -IsochResourceData^post5+IsochResourceData^0 == 0 /\ -ret_IoSetDeviceInterfaceState44^post5+ret_IoSetDeviceInterfaceState44^0 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post5 == 0 /\ a2828^0-a2828^post5 == 0 /\ k5^0-k5^post5 == 0 /\ -ret_IoAllocateIrp2727^post5+ret_IoAllocateIrp2727^0 == 0 /\ -k2^post5+k2^0 == 0 /\ __rho_9_^0-__rho_9_^post5 == 0 /\ -a77^post5+a77^0 == 0 /\ -k1^post5+k1^0 == 0 /\ b3333^0-b3333^post5 == 0 /\ IsochDetachData^0-IsochDetachData^post5 == 0 /\ __rho_2_^0-__rho_2_^post5 == 0 /\ __rho_8_^0 <= 0 /\ -i___099^post5+i___099^0 == 0 /\ -a4343^post5+a4343^0 == 0 /\ __rho_13_^0-__rho_13_^post5 == 0 /\ -k3^post5+k3^0 == 0 /\ -a3434^post5+a3434^0 == 0 /\ b2929^0-b2929^post5 == 0 /\ ResourceIrp^0-ResourceIrp^post5 == 0 /\ a3838^0-a3838^post5 == 0 /\ i^0-i^post5 == 0 /\ -__rho_99_^post5+__rho_99_^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post5 == 0 /\ ntStatus^0-ntStatus^post5 == 0 /\ a4444^0-a4444^post5 == 0 /\ -a1818^post5+a1818^0 == 0 /\ -__rho_5_^post5+__rho_5_^0 == 0 /\ a11^0-a11^post5 == 0 /\ -__rho_8_^post5+__rho_8_^0 == 0 /\ __rho_3_^0-__rho_3_^post5 == 0 /\ -__rho_7_^post5+__rho_7_^0 == 0 /\ __rho_6_^0-__rho_6_^post5 == 0 /\ -AsyncAddressData^post5+AsyncAddressData^0 == 0 /\ -k4^post5+k4^0 == 0 /\ b3535^0-b3535^post5 == 0 /\ b2626^0-b2626^post5 == 0 /\ -__rho_56_^post5+__rho_56_^0 == 0 /\ b22^0-b22^post5 == 0 /\ i___02424^0-i___02424^post5 == 0 /\ -a3131^post5+a3131^0 == 0 /\ -__rho_11_^post5+__rho_11_^0 == 0 /\ keR^0-keR^post5 == 0 /\ -Irql^post5+Irql^0 == 0 /\ i___01717^0-i___01717^post5 == 0 /\ -__rho_10_^post5+__rho_10_^0 == 0 /\ -i___04040^post5+i___04040^0 == 0 /\ -Irp^post5+Irp^0 == 0 /\ -i___02020^post5+i___02020^0 == 0 /\ -__rho_12_^post5+__rho_12_^0 == 0 /\ i___04646^0-i___04646^post5 == 0 /\ -keA^post5+keA^0 == 0 /\ -a3737^post5+a3737^0 == 0 /\ __rho_4_^0-__rho_4_^post5 == 0 /\ -__rho_1_^post5+__rho_1_^0 == 0 /\ -pIrb^post5+pIrb^0 == 0), cost: 1
New rule:
l4 -> l3 : __rho_8_^0 <= 0, cost: 1

Applied preprocessing
Original rule:
l4 -> l3 : i___01717^0'=i___01717^post6, IsochDetachData^0'=IsochDetachData^post6, ntStatus^0'=ntStatus^post6, __rho_6_^0'=__rho_6_^post6, k5^0'=k5^post6, __rho_2_^0'=__rho_2_^post6, a3838^0'=a3838^post6, a2828^0'=a2828^post6, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post6, b3535^0'=b3535^post6, CromData^0'=CromData^post6, b2626^0'=b2626^post6, __rho_4_^0'=__rho_4_^post6, k2^0'=k2^post6, __rho_12_^0'=__rho_12_^post6, i___02424^0'=i___02424^post6, a11^0'=a11^post6, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post6, __rho_8_^0'=__rho_8_^post6, keR^0'=keR^post6, a4444^0'=a4444^post6, a3232^0'=a3232^post6, ResourceIrp^0'=ResourceIrp^post6, i___01313^0'=i___01313^post6, Irql^0'=Irql^post6, b3333^0'=b3333^post6, __rho_5_^0'=__rho_5_^post6, k4^0'=k4^post6, __rho_1_^0'=__rho_1_^post6, i___04646^0'=i___04646^post6, a2525^0'=a2525^post6, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post6, __rho_9_^0'=__rho_9_^post6, AsyncAddressData^0'=AsyncAddressData^post6, b22^0'=b22^post6, a3737^0'=a3737^post6, k1^0'=k1^post6, __rho_11_^0'=__rho_11_^post6, i___02020^0'=i___02020^post6, IsochResourceData^0'=IsochResourceData^post6, pIrb^0'=pIrb^post6, __rho_7_^0'=__rho_7_^post6, keA^0'=keA^post6, __rho_3_^0'=__rho_3_^post6, a4343^0'=a4343^post6, a3131^0'=a3131^post6, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post6, i^0'=i^post6, Irp^0'=Irp^post6, b2929^0'=b2929^post6, __rho_56_^0'=__rho_56_^post6, k3^0'=k3^post6, __rho_13_^0'=__rho_13_^post6, i___04040^0'=i___04040^post6, a1818^0'=a1818^post6, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post6, __rho_99_^0'=__rho_99_^post6, a77^0'=a77^post6, a3434^0'=a3434^post6, i___099^0'=i___099^post6, __rho_10_^0'=__rho_10_^post6, (i^0-i^post6 == 0 /\ __rho_4_^0-__rho_4_^post6 == 0 /\ -Irp^post6+Irp^0 == 0 /\ -keA^post6+keA^0 == 0 /\ -ret_IoAllocateIrp2727^post6+ret_IoAllocateIrp2727^0 == 0 /\ a3737^0-a3737^post6 == 0 /\ -__rho_1_^post6+__rho_1_^0 == 0 /\ a11^0-a11^post6 == 0 /\ -__rho_13_^post6+__rho_13_^0 == 0 /\ __rho_3_^0-__rho_3_^post6 == 0 /\ __rho_11_^0-__rho_11_^post6 == 0 /\ i___04040^0-i___04040^post6 == 0 /\ -ret_IoSetDeviceInterfaceState44^post6+ret_IoSetDeviceInterfaceState44^0 == 0 /\ -__rho_5_^post6+__rho_5_^0 == 0 /\ -Irql^post6+Irql^0 == 0 /\ b2626^0-b2626^post6 == 0 /\ -i___02424^post6+i___02424^0 == 0 /\ -a77^post6+a77^0 == 0 /\ -a2525^post6+a2525^0 == 0 /\ -i___02020^post6+i___02020^0 == 0 /\ -k3^post6+k3^0 == 0 /\ -__rho_99_^post6+__rho_99_^0 == 0 /\ i___01717^0-i___01717^post6 == 0 /\ -i___099^post6+i___099^0 == 0 /\ __rho_6_^0-__rho_6_^post6 == 0 /\ i___04646^0-i___04646^post6 == 0 /\ 1-__rho_8_^0 <= 0 /\ -__rho_8_^post6+__rho_8_^0 == 0 /\ -b3333^post6+b3333^0 == 0 /\ i___01313^0-i___01313^post6 == 0 /\ b2929^0-b2929^post6 == 0 /\ -IsochResourceData^post6+IsochResourceData^0 == 0 /\ keR^0-keR^post6 == 0 /\ -a3434^post6+a3434^0 == 0 /\ a4444^0-a4444^post6 == 0 /\ -b3535^post6+b3535^0 == 0 /\ pIrb^0-pIrb^post6 == 0 /\ a4343^0-a4343^post6 == 0 /\ -b22^post6+b22^0 == 0 /\ a2828^0-a2828^post6 == 0 /\ k4^0-k4^post6 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post6 == 0 /\ -__rho_56_^post6+__rho_56_^0 == 0 /\ -__rho_2_^post6+__rho_2_^0 == 0 /\ IsochDetachData^0-IsochDetachData^post6 == 0 /\ -AsyncAddressData^post6+AsyncAddressData^0 == 0 /\ -a3232^post6+a3232^0 == 0 /\ __rho_12_^0-__rho_12_^post6 == 0 /\ -k1^post6+k1^0 == 0 /\ -a3131^post6+a3131^0 == 0 /\ -__rho_10_^post6+__rho_10_^0 == 0 /\ k2^0-k2^post6 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post6+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post6 == 0 /\ a3838^0-a3838^post6 == 0 /\ ntStatus^0-ntStatus^post6 == 0 /\ ResourceIrp^0-ResourceIrp^post6 == 0 /\ k5^0-k5^post6 == 0 /\ -__rho_7_^post6+__rho_7_^0 == 0 /\ -__rho_9_^post6+__rho_9_^0 == 0 /\ CromData^0-CromData^post6 == 0 /\ a1818^0-a1818^post6 == 0), cost: 1
New rule:
l4 -> l3 : -1+__rho_8_^0 >= 0, cost: 1

Applied preprocessing
Original rule:
l5 -> l4 : i___01717^0'=i___01717^post7, IsochDetachData^0'=IsochDetachData^post7, ntStatus^0'=ntStatus^post7, __rho_6_^0'=__rho_6_^post7, k5^0'=k5^post7, __rho_2_^0'=__rho_2_^post7, a3838^0'=a3838^post7, a2828^0'=a2828^post7, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post7, b3535^0'=b3535^post7, CromData^0'=CromData^post7, b2626^0'=b2626^post7, __rho_4_^0'=__rho_4_^post7, k2^0'=k2^post7, __rho_12_^0'=__rho_12_^post7, i___02424^0'=i___02424^post7, a11^0'=a11^post7, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post7, __rho_8_^0'=__rho_8_^post7, keR^0'=keR^post7, a4444^0'=a4444^post7, a3232^0'=a3232^post7, ResourceIrp^0'=ResourceIrp^post7, i___01313^0'=i___01313^post7, Irql^0'=Irql^post7, b3333^0'=b3333^post7, __rho_5_^0'=__rho_5_^post7, k4^0'=k4^post7, __rho_1_^0'=__rho_1_^post7, i___04646^0'=i___04646^post7, a2525^0'=a2525^post7, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post7, __rho_9_^0'=__rho_9_^post7, AsyncAddressData^0'=AsyncAddressData^post7, b22^0'=b22^post7, a3737^0'=a3737^post7, k1^0'=k1^post7, __rho_11_^0'=__rho_11_^post7, i___02020^0'=i___02020^post7, IsochResourceData^0'=IsochResourceData^post7, pIrb^0'=pIrb^post7, __rho_7_^0'=__rho_7_^post7, keA^0'=keA^post7, __rho_3_^0'=__rho_3_^post7, a4343^0'=a4343^post7, a3131^0'=a3131^post7, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post7, i^0'=i^post7, Irp^0'=Irp^post7, b2929^0'=b2929^post7, __rho_56_^0'=__rho_56_^post7, k3^0'=k3^post7, __rho_13_^0'=__rho_13_^post7, i___04040^0'=i___04040^post7, a1818^0'=a1818^post7, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post7, __rho_99_^0'=__rho_99_^post7, a77^0'=a77^post7, a3434^0'=a3434^post7, i___099^0'=i___099^post7, __rho_10_^0'=__rho_10_^post7, (0 == 0 /\ -Irp^post7+Irp^0 == 0 /\ -keA^post7+keA^0 == 0 /\ a4444^0-a4444^post7 == 0 /\ -__rho_1_^post7+__rho_1_^0 == 0 /\ -a2525^post7+a2525^0 == 0 /\ k5^0-k5^post7 == 0 /\ i___01313^0-i___01313^post7 == 0 /\ k4^0-k4^post7 == 0 /\ -b22^post7+b22^0 == 0 /\ -ResourceIrp^post7+ResourceIrp^0 == 0 /\ __rho_12_^0-__rho_12_^post7 == 0 /\ a2828^0-a2828^post7 == 0 /\ -__rho_13_^post7+__rho_13_^0 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post7 == 0 /\ -__rho_3_^post7+__rho_3_^0 == 0 /\ CromData^0-CromData^post7 == 0 /\ -i___04646^post7+i___04646^0 == 0 /\ __rho_4_^0-__rho_4_^post7 == 0 /\ __rho_2_^0-__rho_2_^post7 == 0 /\ ntStatus^0-ntStatus^post7 == 0 /\ -__rho_56_^post7+__rho_56_^0 == 0 /\ a3838^0-a3838^post7 == 0 /\ -a77^post7+a77^0 == 0 /\ -i___099^post7+i___099^0 == 0 /\ -k3^post7+k3^0 == 0 /\ -b3333^post7+b3333^0 == 0 /\ -__rho_10_^post7+__rho_10_^0 == 0 /\ -i___04040^post7+i___04040^0 == 0 /\ ret_IoSetDeviceInterfaceState44^0-ret_IoSetDeviceInterfaceState44^post7 == 0 /\ k1^0-k1^post7 == 0 /\ -i^post7+i^0 == 0 /\ -IsochResourceData^post7+IsochResourceData^0 == 0 /\ -a3434^post7+a3434^0 == 0 /\ __rho_5_^0-__rho_5_^post7 == 0 /\ -ret_IoAllocateIrp2727^post7+ret_IoAllocateIrp2727^0 == 0 /\ i___02424^0-i___02424^post7 == 0 /\ __rho_7_^0-__rho_7_^post7 == 0 /\ -b2626^post7+b2626^0 == 0 /\ __rho_6_^0-__rho_6_^post7 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post7 == 0 /\ b3535^0-b3535^post7 == 0 /\ IsochDetachData^0-IsochDetachData^post7 == 0 /\ Irql^0-Irql^post7 == 0 /\ -keR^post7+keR^0 == 0 /\ __rho_11_^0-__rho_11_^post7 == 0 /\ a4343^0-a4343^post7 == 0 /\ -__rho_9_^post7+__rho_9_^0 == 0 /\ -pIrb^post7+pIrb^0 == 0 /\ k2^0-k2^post7 == 0 /\ -AsyncAddressData^post7+AsyncAddressData^0 == 0 /\ -a11^post7+a11^0 == 0 /\ -__rho_99_^post7+__rho_99_^0 == 0 /\ -b2929^post7+b2929^0 == 0 /\ -a1818^post7+a1818^0 == 0 /\ i___02020^0-i___02020^post7 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post7+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ -a3131^post7+a3131^0 == 0 /\ -a3737^post7+a3737^0 == 0 /\ -a3232^post7+a3232^0 == 0 /\ i___01717^0-i___01717^post7 == 0), cost: 1
New rule:
l5 -> l4 : __rho_8_^0'=__rho_8_^post7, 0 == 0, cost: 1

Applied preprocessing
Original rule:
l6 -> l5 : i___01717^0'=i___01717^post8, IsochDetachData^0'=IsochDetachData^post8, ntStatus^0'=ntStatus^post8, __rho_6_^0'=__rho_6_^post8, k5^0'=k5^post8, __rho_2_^0'=__rho_2_^post8, a3838^0'=a3838^post8, a2828^0'=a2828^post8, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post8, b3535^0'=b3535^post8, CromData^0'=CromData^post8, b2626^0'=b2626^post8, __rho_4_^0'=__rho_4_^post8, k2^0'=k2^post8, __rho_12_^0'=__rho_12_^post8, i___02424^0'=i___02424^post8, a11^0'=a11^post8, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post8, __rho_8_^0'=__rho_8_^post8, keR^0'=keR^post8, a4444^0'=a4444^post8, a3232^0'=a3232^post8, ResourceIrp^0'=ResourceIrp^post8, i___01313^0'=i___01313^post8, Irql^0'=Irql^post8, b3333^0'=b3333^post8, __rho_5_^0'=__rho_5_^post8, k4^0'=k4^post8, __rho_1_^0'=__rho_1_^post8, i___04646^0'=i___04646^post8, a2525^0'=a2525^post8, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post8, __rho_9_^0'=__rho_9_^post8, AsyncAddressData^0'=AsyncAddressData^post8, b22^0'=b22^post8, a3737^0'=a3737^post8, k1^0'=k1^post8, __rho_11_^0'=__rho_11_^post8, i___02020^0'=i___02020^post8, IsochResourceData^0'=IsochResourceData^post8, pIrb^0'=pIrb^post8, __rho_7_^0'=__rho_7_^post8, keA^0'=keA^post8, __rho_3_^0'=__rho_3_^post8, a4343^0'=a4343^post8, a3131^0'=a3131^post8, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post8, i^0'=i^post8, Irp^0'=Irp^post8, b2929^0'=b2929^post8, __rho_56_^0'=__rho_56_^post8, k3^0'=k3^post8, __rho_13_^0'=__rho_13_^post8, i___04040^0'=i___04040^post8, a1818^0'=a1818^post8, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post8, __rho_99_^0'=__rho_99_^post8, a77^0'=a77^post8, a3434^0'=a3434^post8, i___099^0'=i___099^post8, __rho_10_^0'=__rho_10_^post8, (AsyncAddressData^0-AsyncAddressData^post8 == 0 /\ -k3^post8+k3^0 == 0 /\ i___01313^0-i___01313^post8 == 0 /\ __rho_8_^0-__rho_8_^post8 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post8 == 0 /\ -i___099^post8+i___099^0 == 0 /\ k5^0-k5^post8 == 0 /\ -__rho_10_^post8+__rho_10_^0 == 0 /\ -a3232^post8+a3232^0 == 0 /\ __rho_12_^0-__rho_12_^post8 == 0 /\ -pIrb^post8+pIrb^0 == 0 /\ ret_IoSetDeviceInterfaceState44^0-ret_IoSetDeviceInterfaceState44^post8 == 0 /\ __rho_5_^0-__rho_5_^post8 == 0 /\ -a1818^post8+a1818^0 == 0 /\ ntStatus^0-ntStatus^post8 == 0 /\ a3838^0-a3838^post8 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post8+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ a2828^0-a2828^post8 == 0 /\ __rho_7_^0-__rho_7_^post8 == 0 /\ i___02020^0-i___02020^post8 == 0 /\ -ret_IoAllocateIrp2727^post8+ret_IoAllocateIrp2727^0 == 0 /\ CromData^0-CromData^post8 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post8 == 0 /\ -a2525^post8+a2525^0 == 0 /\ -a77^post8+a77^0 == 0 /\ a11^0-a11^post8 == 0 /\ -i^post8+i^0 == 0 /\ Irql^0-Irql^post8 == 0 /\ -a4444^post8+a4444^0 == 0 /\ k4^0-k4^post8 == 0 /\ -__rho_56_^post8+__rho_56_^0 == 0 /\ b3535^0-b3535^post8 == 0 /\ -__rho_99_^post8+__rho_99_^0 == 0 /\ a3131^0-a3131^post8 == 0 /\ i___02424^0-i___02424^post8 == 0 /\ -a3737^post8+a3737^0 == 0 /\ -i___04040^post8+i___04040^0 == 0 /\ __rho_1_^0-__rho_1_^post8 == 0 /\ __rho_4_^0-__rho_4_^post8 == 0 /\ IsochDetachData^0-IsochDetachData^post8 == 0 /\ __rho_2_^0-__rho_2_^post8 == 0 /\ -b2626^post8+b2626^0 == 0 /\ -__rho_9_^post8+__rho_9_^0 == 0 /\ -b2929^post8+b2929^0 == 0 /\ k1^0-k1^post8 == 0 /\ __rho_7_^0 <= 0 /\ -keA^post8+keA^0 == 0 /\ -a3434^post8+a3434^0 == 0 /\ a4343^0-a4343^post8 == 0 /\ -keR^post8+keR^0 == 0 /\ -b22^post8+b22^0 == 0 /\ b3333^0-b3333^post8 == 0 /\ -__rho_13_^post8+__rho_13_^0 == 0 /\ -__rho_3_^post8+__rho_3_^0 == 0 /\ -Irp^post8+Irp^0 == 0 /\ IsochResourceData^0-IsochResourceData^post8 == 0 /\ i___01717^0-i___01717^post8 == 0 /\ k2^0-k2^post8 == 0 /\ __rho_6_^0-__rho_6_^post8 == 0 /\ -i___04646^post8+i___04646^0 == 0 /\ -ResourceIrp^post8+ResourceIrp^0 == 0 /\ -__rho_11_^post8+__rho_11_^0 == 0), cost: 1
New rule:
l6 -> l5 : __rho_7_^0 <= 0, cost: 1

Applied preprocessing
Original rule:
l6 -> l5 : i___01717^0'=i___01717^post9, IsochDetachData^0'=IsochDetachData^post9, ntStatus^0'=ntStatus^post9, __rho_6_^0'=__rho_6_^post9, k5^0'=k5^post9, __rho_2_^0'=__rho_2_^post9, a3838^0'=a3838^post9, a2828^0'=a2828^post9, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post9, b3535^0'=b3535^post9, CromData^0'=CromData^post9, b2626^0'=b2626^post9, __rho_4_^0'=__rho_4_^post9, k2^0'=k2^post9, __rho_12_^0'=__rho_12_^post9, i___02424^0'=i___02424^post9, a11^0'=a11^post9, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post9, __rho_8_^0'=__rho_8_^post9, keR^0'=keR^post9, a4444^0'=a4444^post9, a3232^0'=a3232^post9, ResourceIrp^0'=ResourceIrp^post9, i___01313^0'=i___01313^post9, Irql^0'=Irql^post9, b3333^0'=b3333^post9, __rho_5_^0'=__rho_5_^post9, k4^0'=k4^post9, __rho_1_^0'=__rho_1_^post9, i___04646^0'=i___04646^post9, a2525^0'=a2525^post9, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post9, __rho_9_^0'=__rho_9_^post9, AsyncAddressData^0'=AsyncAddressData^post9, b22^0'=b22^post9, a3737^0'=a3737^post9, k1^0'=k1^post9, __rho_11_^0'=__rho_11_^post9, i___02020^0'=i___02020^post9, IsochResourceData^0'=IsochResourceData^post9, pIrb^0'=pIrb^post9, __rho_7_^0'=__rho_7_^post9, keA^0'=keA^post9, __rho_3_^0'=__rho_3_^post9, a4343^0'=a4343^post9, a3131^0'=a3131^post9, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post9, i^0'=i^post9, Irp^0'=Irp^post9, b2929^0'=b2929^post9, __rho_56_^0'=__rho_56_^post9, k3^0'=k3^post9, __rho_13_^0'=__rho_13_^post9, i___04040^0'=i___04040^post9, a1818^0'=a1818^post9, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post9, __rho_99_^0'=__rho_99_^post9, a77^0'=a77^post9, a3434^0'=a3434^post9, i___099^0'=i___099^post9, __rho_10_^0'=__rho_10_^post9, (-b3333^post9+b3333^0 == 0 /\ -i___02020^post9+i___02020^0 == 0 /\ -pIrb^post9+pIrb^0 == 0 /\ -__rho_13_^post9+__rho_13_^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post9 == 0 /\ a3232^0-a3232^post9 == 0 /\ AsyncAddressData^0-AsyncAddressData^post9 == 0 /\ IsochDetachData^0-IsochDetachData^post9 == 0 /\ -a1818^post9+a1818^0 == 0 /\ -__rho_3_^post9+__rho_3_^0 == 0 /\ ret_IoSetDeviceInterfaceState44^0-ret_IoSetDeviceInterfaceState44^post9 == 0 /\ -__rho_11_^post9+__rho_11_^0 == 0 /\ __rho_5_^0-__rho_5_^post9 == 0 /\ -k3^post9+k3^0 == 0 /\ k2^0-k2^post9 == 0 /\ a11^0-a11^post9 == 0 /\ __rho_6_^0-__rho_6_^post9 == 0 /\ -ret_IoAllocateIrp2727^post9+ret_IoAllocateIrp2727^0 == 0 /\ k4^0-k4^post9 == 0 /\ b3535^0-b3535^post9 == 0 /\ Irql^0-Irql^post9 == 0 /\ k5^0-k5^post9 == 0 /\ -ResourceIrp^post9+ResourceIrp^0 == 0 /\ -__rho_99_^post9+__rho_99_^0 == 0 /\ a4444^0-a4444^post9 == 0 /\ ntStatus^0-ntStatus^post9 == 0 /\ -keR^post9+keR^0 == 0 /\ -__rho_9_^post9+__rho_9_^0 == 0 /\ -__rho_56_^post9+__rho_56_^0 == 0 /\ -b2929^post9+b2929^0 == 0 /\ a2828^0-a2828^post9 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post9+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ i___01717^0-i___01717^post9 == 0 /\ __rho_12_^0-__rho_12_^post9 == 0 /\ -a77^post9+a77^0 == 0 /\ 1-__rho_7_^0 <= 0 /\ -i___099^post9+i___099^0 == 0 /\ -i___04646^post9+i___04646^0 == 0 /\ -k1^post9+k1^0 == 0 /\ -__rho_7_^post9+__rho_7_^0 == 0 /\ -a3737^post9+a3737^0 == 0 /\ -i^post9+i^0 == 0 /\ a3131^0-a3131^post9 == 0 /\ IsochResourceData^0-IsochResourceData^post9 == 0 /\ -ret_ExAllocatePool3030^post9+ret_ExAllocatePool3030^0 == 0 /\ -i___04040^post9+i___04040^0 == 0 /\ i___01313^0-i___01313^post9 == 0 /\ b2626^0-b2626^post9 == 0 /\ -a2525^post9+a2525^0 == 0 /\ -a3838^post9+a3838^0 == 0 /\ -__rho_10_^post9+__rho_10_^0 == 0 /\ CromData^0-CromData^post9 == 0 /\ __rho_1_^0-__rho_1_^post9 == 0 /\ -a3434^post9+a3434^0 == 0 /\ a4343^0-a4343^post9 == 0 /\ __rho_8_^0-__rho_8_^post9 == 0 /\ -Irp^post9+Irp^0 == 0 /\ -b22^post9+b22^0 == 0 /\ i___02424^0-i___02424^post9 == 0 /\ __rho_2_^0-__rho_2_^post9 == 0 /\ keA^0-keA^post9 == 0 /\ __rho_4_^0-__rho_4_^post9 == 0), cost: 1
New rule:
l6 -> l5 : -1+__rho_7_^0 >= 0, cost: 1

Applied preprocessing
Original rule:
l7 -> l8 : i___01717^0'=i___01717^post10, IsochDetachData^0'=IsochDetachData^post10, ntStatus^0'=ntStatus^post10, __rho_6_^0'=__rho_6_^post10, k5^0'=k5^post10, __rho_2_^0'=__rho_2_^post10, a3838^0'=a3838^post10, a2828^0'=a2828^post10, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post10, b3535^0'=b3535^post10, CromData^0'=CromData^post10, b2626^0'=b2626^post10, __rho_4_^0'=__rho_4_^post10, k2^0'=k2^post10, __rho_12_^0'=__rho_12_^post10, i___02424^0'=i___02424^post10, a11^0'=a11^post10, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post10, __rho_8_^0'=__rho_8_^post10, keR^0'=keR^post10, a4444^0'=a4444^post10, a3232^0'=a3232^post10, ResourceIrp^0'=ResourceIrp^post10, i___01313^0'=i___01313^post10, Irql^0'=Irql^post10, b3333^0'=b3333^post10, __rho_5_^0'=__rho_5_^post10, k4^0'=k4^post10, __rho_1_^0'=__rho_1_^post10, i___04646^0'=i___04646^post10, a2525^0'=a2525^post10, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post10, __rho_9_^0'=__rho_9_^post10, AsyncAddressData^0'=AsyncAddressData^post10, b22^0'=b22^post10, a3737^0'=a3737^post10, k1^0'=k1^post10, __rho_11_^0'=__rho_11_^post10, i___02020^0'=i___02020^post10, IsochResourceData^0'=IsochResourceData^post10, pIrb^0'=pIrb^post10, __rho_7_^0'=__rho_7_^post10, keA^0'=keA^post10, __rho_3_^0'=__rho_3_^post10, a4343^0'=a4343^post10, a3131^0'=a3131^post10, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post10, i^0'=i^post10, Irp^0'=Irp^post10, b2929^0'=b2929^post10, __rho_56_^0'=__rho_56_^post10, k3^0'=k3^post10, __rho_13_^0'=__rho_13_^post10, i___04040^0'=i___04040^post10, a1818^0'=a1818^post10, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post10, __rho_99_^0'=__rho_99_^post10, a77^0'=a77^post10, a3434^0'=a3434^post10, i___099^0'=i___099^post10, __rho_10_^0'=__rho_10_^post10, (-__rho_7_^post10+__rho_7_^0 == 0 /\ Irql^0-Irql^post10 == 0 /\ k3^0-k3^post10 == 0 /\ a2828^0-a2828^post10 == 0 /\ keA^0-keA^post10 == 0 /\ ntStatus^0-ntStatus^post10 == 0 /\ -__rho_56_^post10+__rho_56_^0 == 0 /\ -i^post10+i^0 == 0 /\ -a3131^post10+a3131^0 == 0 /\ -a3737^post10+a3737^0 == 0 /\ -i___04646^post10+i___04646^0 == 0 /\ keR^0-keR^post10 == 0 /\ Irp^0-Irp^post10 == 0 /\ __rho_5_^0-__rho_5_^post10 == 0 /\ __rho_8_^0-__rho_8_^post10 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post10 == 0 /\ -i___04040^post10+i___04040^0 == 0 /\ -pIrb^post10+pIrb^0 == 0 /\ ret_t1394_SubmitIrpSynch3636^0-ret_t1394_SubmitIrpSynch3636^post10 == 0 /\ -__rho_10_^post10+__rho_10_^0 == 0 /\ -i___02020^post10+i___02020^0 == 0 /\ CromData^0-CromData^post10 == 0 /\ ResourceIrp^0-ResourceIrp^post10 == 0 /\ __rho_2_^0-__rho_2_^post10 == 0 /\ -b2929^post10+b2929^0 == 0 /\ a3838^0-a3838^post10 == 0 /\ b22^0-b22^post10 == 0 /\ -a1818^post10+a1818^0 == 0 /\ __rho_9_^0-__rho_9_^post10 == 0 /\ a3232^0-a3232^post10 == 0 /\ IsochResourceData^0-IsochResourceData^post10 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post10 == 0 /\ -ret_IoAllocateIrp2727^post10+ret_IoAllocateIrp2727^0 == 0 /\ -__rho_13_^post10+__rho_13_^0 == 0 /\ IsochDetachData^0-IsochDetachData^post10 == 0 /\ -i___01313^post10+i___01313^0 == 0 /\ -a77^post10+a77^0 == 0 /\ -k1^post10+k1^0 == 0 /\ k2^0-k2^post10 == 0 /\ -a4444^post10+a4444^0 == 0 /\ __rho_6_^0-__rho_6_^post10 == 0 /\ ret_IoSetDeviceInterfaceState44^0-ret_IoSetDeviceInterfaceState44^post10 == 0 /\ k4^0-k4^post10 == 0 /\ i___02424^0-i___02424^post10 == 0 /\ -i___099^post10+i___099^0 == 0 /\ a11^0-a11^post10 == 0 /\ b2626^0-b2626^post10 == 0 /\ -__rho_3_^post10+__rho_3_^0 == 0 /\ -__rho_11_^post10+__rho_11_^0 == 0 /\ -__rho_12_^post10+__rho_12_^0 == 0 /\ -__rho_99_^post10+__rho_99_^0 == 0 /\ -i___01717^post10+i___01717^0 == 0 /\ -a2525^post10+a2525^0 == 0 /\ -a4343^post10+a4343^0 == 0 /\ b3535^0-b3535^post10 == 0 /\ AsyncAddressData^0-AsyncAddressData^post10 == 0 /\ -__rho_4_^post10+__rho_4_^0 == 0 /\ b3333^0-b3333^post10 == 0 /\ -k5^post10+k5^0 == 0 /\ __rho_1_^0-__rho_1_^post10 == 0 /\ -a3434^post10+a3434^0 == 0), cost: 1
New rule:
l7 -> l8 : TRUE, cost: 1

Applied preprocessing
Original rule:
l9 -> l6 : i___01717^0'=i___01717^post11, IsochDetachData^0'=IsochDetachData^post11, ntStatus^0'=ntStatus^post11, __rho_6_^0'=__rho_6_^post11, k5^0'=k5^post11, __rho_2_^0'=__rho_2_^post11, a3838^0'=a3838^post11, a2828^0'=a2828^post11, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post11, b3535^0'=b3535^post11, CromData^0'=CromData^post11, b2626^0'=b2626^post11, __rho_4_^0'=__rho_4_^post11, k2^0'=k2^post11, __rho_12_^0'=__rho_12_^post11, i___02424^0'=i___02424^post11, a11^0'=a11^post11, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post11, __rho_8_^0'=__rho_8_^post11, keR^0'=keR^post11, a4444^0'=a4444^post11, a3232^0'=a3232^post11, ResourceIrp^0'=ResourceIrp^post11, i___01313^0'=i___01313^post11, Irql^0'=Irql^post11, b3333^0'=b3333^post11, __rho_5_^0'=__rho_5_^post11, k4^0'=k4^post11, __rho_1_^0'=__rho_1_^post11, i___04646^0'=i___04646^post11, a2525^0'=a2525^post11, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post11, __rho_9_^0'=__rho_9_^post11, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=b22^post11, a3737^0'=a3737^post11, k1^0'=k1^post11, __rho_11_^0'=__rho_11_^post11, i___02020^0'=i___02020^post11, IsochResourceData^0'=IsochResourceData^post11, pIrb^0'=pIrb^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=keA^post11, __rho_3_^0'=__rho_3_^post11, a4343^0'=a4343^post11, a3131^0'=a3131^post11, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post11, i^0'=i^post11, Irp^0'=Irp^post11, b2929^0'=b2929^post11, __rho_56_^0'=__rho_56_^post11, k3^0'=k3^post11, __rho_13_^0'=__rho_13_^post11, i___04040^0'=i___04040^post11, a1818^0'=a1818^post11, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post11, __rho_99_^0'=__rho_99_^post11, a77^0'=a77^post11, a3434^0'=a3434^post11, i___099^0'=i___099^post11, __rho_10_^0'=__rho_10_^post11, (0 == 0 /\ ResourceIrp^0-ResourceIrp^post11 == 0 /\ a2525^0-a2525^post11 == 0 /\ -a77^post11+a77^0 == 0 /\ IsochDetachData^0-IsochDetachData^post11 == 0 /\ a3232^0-a3232^post11 == 0 /\ -IsochResourceData^post11+IsochResourceData^0 == 0 /\ -a1818^post11+a1818^0 == 0 /\ __rho_13_^0-__rho_13_^post11 == 0 /\ -__rho_3_^post11+__rho_3_^0 == 0 /\ -__rho_10_^post11+__rho_10_^0 == 0 /\ a11^0-a11^post11 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post11+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ __rho_6_^0-__rho_6_^post11 == 0 /\ -b22^post11+b22^0 == 0 /\ -k3^post11+k3^0 == 0 /\ -a3434^post11+a3434^0 == 0 /\ b3535^0-b3535^post11 == 0 /\ 1+k2^post11-k2^0 == 0 /\ k5^0-k5^post11 == 0 /\ -ret_IoAllocateIrp2727^post11+ret_IoAllocateIrp2727^0 == 0 /\ b2929^0-b2929^post11 == 0 /\ __rho_11_^0-__rho_11_^post11 == 0 /\ ret_IoSetDeviceInterfaceState44^0-ret_IoSetDeviceInterfaceState44^post11 == 0 /\ -i___02424^post11+i___02424^0 == 0 /\ ntStatus^0-ntStatus^post11 == 0 /\ -a3131^post11+a3131^0 == 0 /\ k1^0-k1^post11 == 0 /\ a2828^0-a2828^post11 == 0 /\ 1-k2^0 <= 0 /\ -__rho_56_^post11+__rho_56_^0 == 0 /\ -__rho_99_^post11+__rho_99_^0 == 0 /\ -i___099^post11+i___099^0 == 0 /\ -i^post11+i^0 == 0 /\ -__rho_1_^post11+__rho_1_^0 == 0 /\ __rho_5_^0-__rho_5_^post11 == 0 /\ -ret_t1394Diag_PnpStopDevice33^post11+ret_t1394Diag_PnpStopDevice33^0 == 0 /\ i___02020^0-i___02020^post11 == 0 /\ __rho_12_^0-__rho_12_^post11 == 0 /\ -__rho_8_^post11+__rho_8_^0 == 0 /\ -i___04040^post11+i___04040^0 == 0 /\ -a4343^post11+a4343^0 == 0 /\ a4444^0-a4444^post11 == 0 /\ a3838^0-a3838^post11 == 0 /\ b2626^0-b2626^post11 == 0 /\ i___01313^0-i___01313^post11 == 0 /\ keR^0-keR^post11 == 0 /\ -i___04646^post11+i___04646^0 == 0 /\ i___01717^0-i___01717^post11 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post11 == 0 /\ CromData^0-CromData^post11 == 0 /\ k4^0-k4^post11 == 0 /\ __rho_4_^0-__rho_4_^post11 == 0 /\ -keA^post11+keA^0 == 0 /\ -b3333^post11+b3333^0 == 0 /\ __rho_2_^0-__rho_2_^post11 == 0 /\ -pIrb^post11+pIrb^0 == 0 /\ -Irp^post11+Irp^0 == 0 /\ -a3737^post11+a3737^0 == 0 /\ -__rho_9_^post11+__rho_9_^0 == 0 /\ Irql^0-Irql^post11 == 0), cost: 1
New rule:
l9 -> l6 : k2^0'=-1+k2^0, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, -1+k2^0 >= 0, cost: 1

Applied preprocessing
Original rule:
l9 -> l10 : i___01717^0'=i___01717^post12, IsochDetachData^0'=IsochDetachData^post12, ntStatus^0'=ntStatus^post12, __rho_6_^0'=__rho_6_^post12, k5^0'=k5^post12, __rho_2_^0'=__rho_2_^post12, a3838^0'=a3838^post12, a2828^0'=a2828^post12, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post12, b3535^0'=b3535^post12, CromData^0'=CromData^post12, b2626^0'=b2626^post12, __rho_4_^0'=__rho_4_^post12, k2^0'=k2^post12, __rho_12_^0'=__rho_12_^post12, i___02424^0'=i___02424^post12, a11^0'=a11^post12, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post12, __rho_8_^0'=__rho_8_^post12, keR^0'=keR^post12, a4444^0'=a4444^post12, a3232^0'=a3232^post12, ResourceIrp^0'=ResourceIrp^post12, i___01313^0'=i___01313^post12, Irql^0'=Irql^post12, b3333^0'=b3333^post12, __rho_5_^0'=__rho_5_^post12, k4^0'=k4^post12, __rho_1_^0'=__rho_1_^post12, i___04646^0'=i___04646^post12, a2525^0'=a2525^post12, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post12, __rho_9_^0'=__rho_9_^post12, AsyncAddressData^0'=AsyncAddressData^post12, b22^0'=b22^post12, a3737^0'=a3737^post12, k1^0'=k1^post12, __rho_11_^0'=__rho_11_^post12, i___02020^0'=i___02020^post12, IsochResourceData^0'=IsochResourceData^post12, pIrb^0'=pIrb^post12, __rho_7_^0'=__rho_7_^post12, keA^0'=keA^post12, __rho_3_^0'=__rho_3_^post12, a4343^0'=a4343^post12, a3131^0'=a3131^post12, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post12, i^0'=i^post12, Irp^0'=Irp^post12, b2929^0'=b2929^post12, __rho_56_^0'=__rho_56_^post12, k3^0'=k3^post12, __rho_13_^0'=__rho_13_^post12, i___04040^0'=i___04040^post12, a1818^0'=a1818^post12, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post12, __rho_99_^0'=__rho_99_^post12, a77^0'=a77^post12, a3434^0'=a3434^post12, i___099^0'=i___099^post12, __rho_10_^0'=__rho_10_^post12, (-i___02424^post12+i___02424^0 == 0 /\ __rho_11_^0-__rho_11_^post12 == 0 /\ a3131^0-a3131^post12 == 0 /\ i^0-i^post12 == 0 /\ -a3232^post12+a3232^0 == 0 /\ k3^0-k3^post12 == 0 /\ -b3333^post12+b3333^0 == 0 /\ -1+keR^10 == 0 /\ -i___02020^post12+i___02020^0 == 0 /\ __rho_4_^0-__rho_4_^post12 == 0 /\ -a77^post12+a77^0 == 0 /\ -__rho_8_^post12+__rho_8_^0 == 0 /\ -keA^post12+keA^0 == 0 /\ k2^0 <= 0 /\ -IsochResourceData^post12+IsochResourceData^0 == 0 /\ Irp^0-Irp^post12 == 0 /\ -i___04040^post12+i___04040^0 == 0 /\ b3535^0-b3535^post12 == 0 /\ a3737^0-a3737^post12 == 0 /\ keR^post12 == 0 /\ -1+keR^30 == 0 /\ k5^0-k5^post12 == 0 /\ -__rho_10_^post12+__rho_10_^0 == 0 /\ ntStatus^0-ntStatus^post12 == 0 /\ -a1818^post12+a1818^0 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post12+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ -__rho_1_^post12+__rho_1_^0 == 0 /\ -a3434^post12+a3434^0 == 0 /\ IsochDetachData^0-IsochDetachData^post12 == 0 /\ -b2929^post12+b2929^0 == 0 /\ __rho_2_^0-__rho_2_^post12 == 0 /\ -k1^post12+k1^0 == 0 /\ -a11^post12+a11^0 == 0 /\ -k2^post12+k2^0 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post12 == 0 /\ __rho_9_^0-__rho_9_^post12 == 0 /\ -ret_IoAllocateIrp2727^post12+ret_IoAllocateIrp2727^0 == 0 /\ -__rho_56_^post12+__rho_56_^0 == 0 /\ -__rho_13_^post12+__rho_13_^0 == 0 /\ keR^20 == 0 /\ -i___04646^post12+i___04646^0 == 0 /\ Irql^0-Irql^post12 == 0 /\ a3838^0-a3838^post12 == 0 /\ a4444^0-a4444^post12 == 0 /\ b2626^0-b2626^post12 == 0 /\ -b22^post12+b22^0 == 0 /\ a2525^0-a2525^post12 == 0 /\ -a4343^post12+a4343^0 == 0 /\ a2828^0-a2828^post12 == 0 /\ -__rho_5_^post12+__rho_5_^0 == 0 /\ -__rho_7_^post12+__rho_7_^0 == 0 /\ i___01717^0-i___01717^post12 == 0 /\ -__rho_6_^post12+__rho_6_^0 == 0 /\ __rho_12_^0-__rho_12_^post12 == 0 /\ -i___099^post12+i___099^0 == 0 /\ CromData^0-CromData^post12 == 0 /\ k4^0-k4^post12 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post12 == 0 /\ -__rho_99_^post12+__rho_99_^0 == 0 /\ AsyncAddressData^0-AsyncAddressData^post12 == 0 /\ -ret_IoSetDeviceInterfaceState44^post12+ret_IoSetDeviceInterfaceState44^0 == 0 /\ __rho_3_^0-__rho_3_^post12 == 0 /\ pIrb^0-pIrb^post12 == 0 /\ -Irql^0+i___01313^post12 == 0 /\ ResourceIrp^0-ResourceIrp^post12 == 0), cost: 1
New rule:
l9 -> l10 : keR^0'=0, i___01313^0'=Irql^0, k2^0 <= 0, cost: 1

Applied preprocessing
Original rule:
l1 -> l9 : i___01717^0'=i___01717^post13, IsochDetachData^0'=IsochDetachData^post13, ntStatus^0'=ntStatus^post13, __rho_6_^0'=__rho_6_^post13, k5^0'=k5^post13, __rho_2_^0'=__rho_2_^post13, a3838^0'=a3838^post13, a2828^0'=a2828^post13, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post13, b3535^0'=b3535^post13, CromData^0'=CromData^post13, b2626^0'=b2626^post13, __rho_4_^0'=__rho_4_^post13, k2^0'=k2^post13, __rho_12_^0'=__rho_12_^post13, i___02424^0'=i___02424^post13, a11^0'=a11^post13, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post13, __rho_8_^0'=__rho_8_^post13, keR^0'=keR^post13, a4444^0'=a4444^post13, a3232^0'=a3232^post13, ResourceIrp^0'=ResourceIrp^post13, i___01313^0'=i___01313^post13, Irql^0'=Irql^post13, b3333^0'=b3333^post13, __rho_5_^0'=__rho_5_^post13, k4^0'=k4^post13, __rho_1_^0'=__rho_1_^post13, i___04646^0'=i___04646^post13, a2525^0'=a2525^post13, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post13, __rho_9_^0'=__rho_9_^post13, AsyncAddressData^0'=AsyncAddressData^post13, b22^0'=b22^post13, a3737^0'=a3737^post13, k1^0'=k1^post13, __rho_11_^0'=__rho_11_^post13, i___02020^0'=i___02020^post13, IsochResourceData^0'=IsochResourceData^post13, pIrb^0'=pIrb^post13, __rho_7_^0'=__rho_7_^post13, keA^0'=keA^post13, __rho_3_^0'=__rho_3_^post13, a4343^0'=a4343^post13, a3131^0'=a3131^post13, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post13, i^0'=i^post13, Irp^0'=Irp^post13, b2929^0'=b2929^post13, __rho_56_^0'=__rho_56_^post13, k3^0'=k3^post13, __rho_13_^0'=__rho_13_^post13, i___04040^0'=i___04040^post13, a1818^0'=a1818^post13, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post13, __rho_99_^0'=__rho_99_^post13, a77^0'=a77^post13, a3434^0'=a3434^post13, i___099^0'=i___099^post13, __rho_10_^0'=__rho_10_^post13, (-__rho_13_^post13+__rho_13_^0 == 0 /\ -b3333^post13+b3333^0 == 0 /\ -a1818^post13+a1818^0 == 0 /\ -__rho_3_^post13+__rho_3_^0 == 0 /\ -a11^post13+a11^0 == 0 /\ -pIrb^post13+pIrb^0 == 0 /\ __rho_12_^0-__rho_12_^post13 == 0 /\ a2828^0-a2828^post13 == 0 /\ i___01717^0-i___01717^post13 == 0 /\ -ret_IoAllocateIrp2727^post13+ret_IoAllocateIrp2727^0 == 0 /\ i___04040^0-i___04040^post13 == 0 /\ -a3131^post13+a3131^0 == 0 /\ -IsochResourceData^post13+IsochResourceData^0 == 0 /\ k1^0-k1^post13 == 0 /\ -k3^post13+k3^0 == 0 /\ i___01313^0-i___01313^post13 == 0 /\ -ResourceIrp^post13+ResourceIrp^0 == 0 /\ __rho_8_^0-__rho_8_^post13 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post13 == 0 /\ -__rho_1_^post13+__rho_1_^0 == 0 /\ CromData^0-CromData^post13 == 0 /\ __rho_2_^0-__rho_2_^post13 == 0 /\ -__rho_99_^post13+__rho_99_^0 == 0 /\ -keR^post13+keR^0 == 0 /\ a3838^0-a3838^post13 == 0 /\ __rho_4_^0-__rho_4_^post13 == 0 /\ -a77^post13+a77^0 == 0 /\ a2525^0-a2525^post13 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post13+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ -__rho_56_^post13+__rho_56_^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post13 == 0 /\ a3434^0-a3434^post13 == 0 /\ IsochDetachData^0-IsochDetachData^post13 == 0 /\ __rho_11_^0-__rho_11_^post13 == 0 /\ -b2929^post13+b2929^0 == 0 /\ -i___02424^post13+i___02424^0 == 0 /\ -__rho_9_^post13+__rho_9_^0 == 0 /\ -AsyncAddressData^post13+AsyncAddressData^0 == 0 /\ a4343^0-a4343^post13 == 0 /\ -i___04646^post13+i___04646^0 == 0 /\ k2^0-k2^post13 == 0 /\ __rho_6_^0-__rho_6_^post13 == 0 /\ __rho_5_^0-__rho_5_^post13 == 0 /\ __rho_7_^0-__rho_7_^post13 == 0 /\ -i___099^post13+i___099^0 == 0 /\ -a3232^post13+a3232^0 == 0 /\ b2626^0-b2626^post13 == 0 /\ -i^post13+i^0 == 0 /\ i___02020^0-i___02020^post13 == 0 /\ -ret_IoSetDeviceInterfaceState44^post13+ret_IoSetDeviceInterfaceState44^0 == 0 /\ -keA^post13+keA^0 == 0 /\ Irql^0-Irql^post13 == 0 /\ -__rho_10_^post13+__rho_10_^0 == 0 /\ b3535^0-b3535^post13 == 0 /\ -Irp^post13+Irp^0 == 0 /\ -a3737^post13+a3737^0 == 0 /\ k4^0-k4^post13 == 0 /\ k5^0-k5^post13 == 0 /\ -b22^post13+b22^0 == 0 /\ a4444^0-a4444^post13 == 0 /\ ntStatus^0-ntStatus^post13 == 0), cost: 1
New rule:
l1 -> l9 : TRUE, cost: 1

Applied preprocessing
Original rule:
l10 -> l11 : i___01717^0'=i___01717^post14, IsochDetachData^0'=IsochDetachData^post14, ntStatus^0'=ntStatus^post14, __rho_6_^0'=__rho_6_^post14, k5^0'=k5^post14, __rho_2_^0'=__rho_2_^post14, a3838^0'=a3838^post14, a2828^0'=a2828^post14, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post14, b3535^0'=b3535^post14, CromData^0'=CromData^post14, b2626^0'=b2626^post14, __rho_4_^0'=__rho_4_^post14, k2^0'=k2^post14, __rho_12_^0'=__rho_12_^post14, i___02424^0'=i___02424^post14, a11^0'=a11^post14, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post14, __rho_8_^0'=__rho_8_^post14, keR^0'=keR^post14, a4444^0'=a4444^post14, a3232^0'=a3232^post14, ResourceIrp^0'=ResourceIrp^post14, i___01313^0'=i___01313^post14, Irql^0'=Irql^post14, b3333^0'=b3333^post14, __rho_5_^0'=__rho_5_^post14, k4^0'=k4^post14, __rho_1_^0'=__rho_1_^post14, i___04646^0'=i___04646^post14, a2525^0'=a2525^post14, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post14, __rho_9_^0'=__rho_9_^post14, AsyncAddressData^0'=AsyncAddressData^post14, b22^0'=b22^post14, a3737^0'=a3737^post14, k1^0'=k1^post14, __rho_11_^0'=__rho_11_^post14, i___02020^0'=i___02020^post14, IsochResourceData^0'=IsochResourceData^post14, pIrb^0'=pIrb^post14, __rho_7_^0'=__rho_7_^post14, keA^0'=keA^post14, __rho_3_^0'=__rho_3_^post14, a4343^0'=a4343^post14, a3131^0'=a3131^post14, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post14, i^0'=i^post14, Irp^0'=Irp^post14, b2929^0'=b2929^post14, __rho_56_^0'=__rho_56_^post14, k3^0'=k3^post14, __rho_13_^0'=__rho_13_^post14, i___04040^0'=i___04040^post14, a1818^0'=a1818^post14, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post14, __rho_99_^0'=__rho_99_^post14, a77^0'=a77^post14, a3434^0'=a3434^post14, i___099^0'=i___099^post14, __rho_10_^0'=__rho_10_^post14, (0 == 0 /\ -pIrb^post14+pIrb^0 == 0 /\ -1+keA^10 == 0 /\ __rho_12_^0-__rho_12_^post14 == 0 /\ -a1818^post14+a1818^0 == 0 /\ __rho_6_^0-__rho_6_^post14 == 0 /\ -a3131^post14+a3131^0 == 0 /\ -__rho_56_^post14+__rho_56_^0 == 0 /\ ntStatus^0-ntStatus^post14 == 0 /\ IsochDetachData^0-IsochDetachData^post14 == 0 /\ -i^post14+i^0 == 0 /\ keA^post14 == 0 /\ __rho_13_^0-__rho_13_^post14 == 0 /\ Irql^0-Irql^post14 == 0 /\ __rho_8_^0-__rho_8_^post14 == 0 /\ -IsochResourceData^post14+IsochResourceData^0 == 0 /\ -__rho_1_^post14+__rho_1_^0 == 0 /\ keR^0-keR^post14 == 0 /\ -i___099^post14+i___099^0 == 0 /\ k1^0-k1^post14 == 0 /\ -1+keA^30 == 0 /\ a11^0-a11^post14 == 0 /\ i___02424^0-i___02424^post14 == 0 /\ i___01717^0-i___01717^post14 == 0 /\ -i___04040^post14+i___04040^0 == 0 /\ a3232^0-a3232^post14 == 0 /\ -__rho_3_^post14+__rho_3_^0 == 0 /\ b3333^0-b3333^post14 == 0 /\ -__rho_9_^post14+__rho_9_^0 == 0 /\ -AsyncAddressData^post14+AsyncAddressData^0 == 0 /\ -i___04646^post14+i___04646^0 == 0 /\ -b2929^post14+b2929^0 == 0 /\ -CromData^post14+CromData^0 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post14+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ -ret_IoAllocateIrp2727^post14+ret_IoAllocateIrp2727^0 == 0 /\ __rho_11_^0-__rho_11_^post14 == 0 /\ -a3737^post14+a3737^0 == 0 /\ -a4343^post14+a4343^0 == 0 /\ a3838^0-a3838^post14 == 0 /\ __rho_5_^0-__rho_5_^post14 == 0 /\ -a77^post14+a77^0 == 0 /\ a2828^0-a2828^post14 == 0 /\ k5^0-k5^post14 == 0 /\ k2^0-k2^post14 == 0 /\ -i___01313^post14+i___01313^0 == 0 /\ ResourceIrp^0-ResourceIrp^post14 == 0 /\ __rho_99_^0-__rho_99_^post14 == 0 /\ -Irp^post14+Irp^0 == 0 /\ -__rho_2_^post14+__rho_2_^0 == 0 /\ i___02020^0-i___02020^post14 == 0 /\ k4^0-k4^post14 == 0 /\ -__rho_4_^post14+__rho_4_^0 == 0 /\ -ret_IoSetDeviceInterfaceState44^post14+ret_IoSetDeviceInterfaceState44^0 == 0 /\ -__rho_10_^post14+k3^post14 == 0 /\ -a4444^post14+a4444^0 == 0 /\ -a2525^post14+a2525^0 == 0 /\ b2626^0-b2626^post14 == 0 /\ -b22^post14+b22^0 == 0 /\ __rho_7_^0-__rho_7_^post14 == 0 /\ keA^20 == 0 /\ -a3434^post14+a3434^0 == 0 /\ -b3535^post14+b3535^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post14 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post14 == 0), cost: 1
New rule:
l10 -> l11 : keA^0'=0, k3^0'=k3^post14, __rho_10_^0'=k3^post14, 0 == 0, cost: 1

Applied preprocessing
Original rule:
l12 -> l7 : i___01717^0'=i___01717^post15, IsochDetachData^0'=IsochDetachData^post15, ntStatus^0'=ntStatus^post15, __rho_6_^0'=__rho_6_^post15, k5^0'=k5^post15, __rho_2_^0'=__rho_2_^post15, a3838^0'=a3838^post15, a2828^0'=a2828^post15, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post15, b3535^0'=b3535^post15, CromData^0'=CromData^post15, b2626^0'=b2626^post15, __rho_4_^0'=__rho_4_^post15, k2^0'=k2^post15, __rho_12_^0'=__rho_12_^post15, i___02424^0'=i___02424^post15, a11^0'=a11^post15, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post15, __rho_8_^0'=__rho_8_^post15, keR^0'=keR^post15, a4444^0'=a4444^post15, a3232^0'=a3232^post15, ResourceIrp^0'=ResourceIrp^post15, i___01313^0'=i___01313^post15, Irql^0'=Irql^post15, b3333^0'=b3333^post15, __rho_5_^0'=__rho_5_^post15, k4^0'=k4^post15, __rho_1_^0'=__rho_1_^post15, i___04646^0'=i___04646^post15, a2525^0'=a2525^post15, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post15, __rho_9_^0'=__rho_9_^post15, AsyncAddressData^0'=AsyncAddressData^post15, b22^0'=b22^post15, a3737^0'=a3737^post15, k1^0'=k1^post15, __rho_11_^0'=__rho_11_^post15, i___02020^0'=i___02020^post15, IsochResourceData^0'=IsochResourceData^post15, pIrb^0'=pIrb^post15, __rho_7_^0'=__rho_7_^post15, keA^0'=keA^post15, __rho_3_^0'=__rho_3_^post15, a4343^0'=a4343^post15, a3131^0'=a3131^post15, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post15, i^0'=i^post15, Irp^0'=Irp^post15, b2929^0'=b2929^post15, __rho_56_^0'=__rho_56_^post15, k3^0'=k3^post15, __rho_13_^0'=__rho_13_^post15, i___04040^0'=i___04040^post15, a1818^0'=a1818^post15, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post15, __rho_99_^0'=__rho_99_^post15, a77^0'=a77^post15, a3434^0'=a3434^post15, i___099^0'=i___099^post15, __rho_10_^0'=__rho_10_^post15, (-ret_t1394Diag_PnpStopDevice33^post15+ret_t1394Diag_PnpStopDevice33^0 == 0 /\ a3737^0-a3737^post15 == 0 /\ __rho_8_^0-__rho_8_^post15 == 0 /\ __rho_13_^0-__rho_13_^post15 == 0 /\ -i___01313^post15+i___01313^0 == 0 /\ k5^0-k5^post15 == 0 /\ -AsyncAddressData^post15+AsyncAddressData^0 == 0 /\ ret_t1394_SubmitIrpSynch3636^0-ret_t1394_SubmitIrpSynch3636^post15 == 0 /\ b3333^0-b3333^post15 == 0 /\ -k1^post15+k1^0 == 0 /\ i^0-i^post15 == 0 /\ -CromData^post15+CromData^0 == 0 /\ -i___099^post15+i___099^0 == 0 /\ -ret_IoSetDeviceInterfaceState44^post15+ret_IoSetDeviceInterfaceState44^0 == 0 /\ a2525^0-a2525^post15 == 0 /\ IsochDetachData^0-IsochDetachData^post15 == 0 /\ -i___04040^post15+i___04040^0 == 0 /\ -a3434^post15+a3434^0 == 0 /\ -Irp^post15+Irp^0 == 0 /\ -__rho_10_^post15+__rho_10_^0 == 0 /\ a2828^0-a2828^post15 == 0 /\ -__rho_5_^post15+__rho_5_^0 == 0 /\ -__rho_99_^post15+__rho_99_^0 == 0 /\ -b2929^post15+b2929^0 == 0 /\ ResourceIrp^0-ResourceIrp^post15 == 0 /\ a3838^0-a3838^post15 == 0 /\ -i___02020^post15+i___02020^0 == 0 /\ a4444^0-a4444^post15 == 0 /\ a11^0-a11^post15 == 0 /\ ntStatus^0-ntStatus^post15 == 0 /\ -__rho_56_^post15+__rho_56_^0 == 0 /\ keR^0-keR^post15 == 0 /\ -__rho_7_^post15+__rho_7_^0 == 0 /\ -a1818^post15+a1818^0 == 0 /\ -pIrb^post15+pIrb^0 == 0 /\ b3535^0-b3535^post15 == 0 /\ __rho_3_^0-__rho_3_^post15 == 0 /\ -__rho_11_^post15+__rho_11_^0 == 0 /\ -a3131^post15+a3131^0 == 0 /\ b2626^0-b2626^post15 == 0 /\ -k4^post15+k4^0 == 0 /\ i___02424^0-i___02424^post15 == 0 /\ __rho_4_^0-__rho_4_^post15 == 0 /\ __rho_2_^0-__rho_2_^post15 == 0 /\ -IsochResourceData^post15+IsochResourceData^0 == 0 /\ __rho_9_^0-__rho_9_^post15 == 0 /\ a3232^0-a3232^post15 == 0 /\ ret_IoAllocateIrp2727^0-ret_IoAllocateIrp2727^post15 == 0 /\ -a4343^post15+a4343^0 == 0 /\ -__rho_12_^post15+__rho_12_^0 == 0 /\ -k3^post15+k3^0 == 0 /\ i___01717^0-i___01717^post15 == 0 /\ i___04646^0-i___04646^post15 == 0 /\ -__rho_1_^post15+__rho_1_^0 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post15 == 0 /\ k2^0-k2^post15 == 0 /\ __rho_6_^0-__rho_6_^post15 == 0 /\ b22^0-b22^post15 == 0 /\ -Irql^post15+Irql^0 == 0 /\ a77^post15-CromData^0 == 0 /\ -keA^post15+keA^0 == 0), cost: 1
New rule:
l12 -> l7 : a77^0'=CromData^0, TRUE, cost: 1

Applied preprocessing
Original rule:
l13 -> l12 : i___01717^0'=i___01717^post16, IsochDetachData^0'=IsochDetachData^post16, ntStatus^0'=ntStatus^post16, __rho_6_^0'=__rho_6_^post16, k5^0'=k5^post16, __rho_2_^0'=__rho_2_^post16, a3838^0'=a3838^post16, a2828^0'=a2828^post16, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post16, b3535^0'=b3535^post16, CromData^0'=CromData^post16, b2626^0'=b2626^post16, __rho_4_^0'=__rho_4_^post16, k2^0'=k2^post16, __rho_12_^0'=__rho_12_^post16, i___02424^0'=i___02424^post16, a11^0'=a11^post16, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post16, __rho_8_^0'=__rho_8_^post16, keR^0'=keR^post16, a4444^0'=a4444^post16, a3232^0'=a3232^post16, ResourceIrp^0'=ResourceIrp^post16, i___01313^0'=i___01313^post16, Irql^0'=Irql^post16, b3333^0'=b3333^post16, __rho_5_^0'=__rho_5_^post16, k4^0'=k4^post16, __rho_1_^0'=__rho_1_^post16, i___04646^0'=i___04646^post16, a2525^0'=a2525^post16, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post16, __rho_9_^0'=__rho_9_^post16, AsyncAddressData^0'=AsyncAddressData^post16, b22^0'=b22^post16, a3737^0'=a3737^post16, k1^0'=k1^post16, __rho_11_^0'=__rho_11_^post16, i___02020^0'=i___02020^post16, IsochResourceData^0'=IsochResourceData^post16, pIrb^0'=pIrb^post16, __rho_7_^0'=__rho_7_^post16, keA^0'=keA^post16, __rho_3_^0'=__rho_3_^post16, a4343^0'=a4343^post16, a3131^0'=a3131^post16, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post16, i^0'=i^post16, Irp^0'=Irp^post16, b2929^0'=b2929^post16, __rho_56_^0'=__rho_56_^post16, k3^0'=k3^post16, __rho_13_^0'=__rho_13_^post16, i___04040^0'=i___04040^post16, a1818^0'=a1818^post16, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post16, __rho_99_^0'=__rho_99_^post16, a77^0'=a77^post16, a3434^0'=a3434^post16, i___099^0'=i___099^post16, __rho_10_^0'=__rho_10_^post16, (-b22^post16+b22^0 == 0 /\ -ret_IoAllocateIrp2727^post16+ret_IoAllocateIrp2727^0 == 0 /\ -__rho_1_^post16+__rho_1_^0 == 0 /\ -a3434^post16+a3434^0 == 0 /\ -IsochResourceData^post16+IsochResourceData^0 == 0 /\ -__rho_3_^post16+__rho_3_^0 == 0 /\ __rho_11_^0-__rho_11_^post16 == 0 /\ a2525^0-a2525^post16 == 0 /\ -__rho_13_^post16+__rho_13_^0 == 0 /\ -k4^post16+k4^0 == 0 /\ -Irp^post16+Irp^0 == 0 /\ -ret_IoSetDeviceInterfaceState44^post16+ret_IoSetDeviceInterfaceState44^0 == 0 /\ a4444^0-a4444^post16 == 0 /\ -a4343^post16+a4343^0 == 0 /\ a3737^0-a3737^post16 == 0 /\ ResourceIrp^0-ResourceIrp^post16 == 0 /\ i___04646^0-i___04646^post16 == 0 /\ -__rho_99_^post16+__rho_99_^0 == 0 /\ a11^0-a11^post16 == 0 /\ k5^0-k5^post16 == 0 /\ -k2^post16+k2^0 == 0 /\ b3535^0-b3535^post16 == 0 /\ b2929^0-b2929^post16 == 0 /\ ntStatus^0-ntStatus^post16 == 0 /\ __rho_5_^0 <= 0 /\ a2828^0-a2828^post16 == 0 /\ -k3^post16+k3^0 == 0 /\ -__rho_8_^post16+__rho_8_^0 == 0 /\ IsochDetachData^0-IsochDetachData^post16 == 0 /\ -__rho_12_^post16+__rho_12_^0 == 0 /\ -__rho_7_^post16+__rho_7_^0 == 0 /\ -__rho_5_^post16+__rho_5_^0 == 0 /\ __rho_4_^0-__rho_4_^post16 == 0 /\ __rho_2_^0-__rho_2_^post16 == 0 /\ -CromData^post16+CromData^0 == 0 /\ pIrb^0-pIrb^post16 == 0 /\ -i^post16+i^0 == 0 /\ a3838^0-a3838^post16 == 0 /\ -__rho_56_^post16+__rho_56_^0 == 0 /\ -Irql^post16+Irql^0 == 0 /\ a77^0-a77^post16 == 0 /\ i___01717^0-i___01717^post16 == 0 /\ __rho_9_^0-__rho_9_^post16 == 0 /\ i___02424^0-i___02424^post16 == 0 /\ -k1^post16+k1^0 == 0 /\ -a3131^post16+a3131^0 == 0 /\ b3333^0-b3333^post16 == 0 /\ __rho_6_^0-__rho_6_^post16 == 0 /\ -i___02020^post16+i___02020^0 == 0 /\ -ret_t1394Diag_PnpStopDevice33^post16+ret_t1394Diag_PnpStopDevice33^0 == 0 /\ -i___099^post16+i___099^0 == 0 /\ b2626^0-b2626^post16 == 0 /\ i___01313^0-i___01313^post16 == 0 /\ a3232^0-a3232^post16 == 0 /\ -i___04040^post16+i___04040^0 == 0 /\ -__rho_10_^post16+__rho_10_^0 == 0 /\ -keA^post16+keA^0 == 0 /\ -AsyncAddressData^post16+AsyncAddressData^0 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post16 == 0 /\ keR^0-keR^post16 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post16+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ a1818^0-a1818^post16 == 0), cost: 1
New rule:
l13 -> l12 : __rho_5_^0 <= 0, cost: 1

Applied preprocessing
Original rule:
l13 -> l12 : i___01717^0'=i___01717^post17, IsochDetachData^0'=IsochDetachData^post17, ntStatus^0'=ntStatus^post17, __rho_6_^0'=__rho_6_^post17, k5^0'=k5^post17, __rho_2_^0'=__rho_2_^post17, a3838^0'=a3838^post17, a2828^0'=a2828^post17, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post17, b3535^0'=b3535^post17, CromData^0'=CromData^post17, b2626^0'=b2626^post17, __rho_4_^0'=__rho_4_^post17, k2^0'=k2^post17, __rho_12_^0'=__rho_12_^post17, i___02424^0'=i___02424^post17, a11^0'=a11^post17, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post17, __rho_8_^0'=__rho_8_^post17, keR^0'=keR^post17, a4444^0'=a4444^post17, a3232^0'=a3232^post17, ResourceIrp^0'=ResourceIrp^post17, i___01313^0'=i___01313^post17, Irql^0'=Irql^post17, b3333^0'=b3333^post17, __rho_5_^0'=__rho_5_^post17, k4^0'=k4^post17, __rho_1_^0'=__rho_1_^post17, i___04646^0'=i___04646^post17, a2525^0'=a2525^post17, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post17, __rho_9_^0'=__rho_9_^post17, AsyncAddressData^0'=AsyncAddressData^post17, b22^0'=b22^post17, a3737^0'=a3737^post17, k1^0'=k1^post17, __rho_11_^0'=__rho_11_^post17, i___02020^0'=i___02020^post17, IsochResourceData^0'=IsochResourceData^post17, pIrb^0'=pIrb^post17, __rho_7_^0'=__rho_7_^post17, keA^0'=keA^post17, __rho_3_^0'=__rho_3_^post17, a4343^0'=a4343^post17, a3131^0'=a3131^post17, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post17, i^0'=i^post17, Irp^0'=Irp^post17, b2929^0'=b2929^post17, __rho_56_^0'=__rho_56_^post17, k3^0'=k3^post17, __rho_13_^0'=__rho_13_^post17, i___04040^0'=i___04040^post17, a1818^0'=a1818^post17, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post17, __rho_99_^0'=__rho_99_^post17, a77^0'=a77^post17, a3434^0'=a3434^post17, i___099^0'=i___099^post17, __rho_10_^0'=__rho_10_^post17, (b2929^0-b2929^post17 == 0 /\ -ret_IoSetDeviceInterfaceState44^post17+ret_IoSetDeviceInterfaceState44^0 == 0 /\ ntStatus^0-ntStatus^post17 == 0 /\ i___04646^0-i___04646^post17 == 0 /\ __rho_6_^0-__rho_6_^post17 == 0 /\ -i___04040^post17+i___04040^0 == 0 /\ a3838^0-a3838^post17 == 0 /\ -b2626^post17+b2626^0 == 0 /\ 1-__rho_5_^0 <= 0 /\ -a4343^post17+a4343^0 == 0 /\ keR^0-keR^post17 == 0 /\ -a3434^post17+a3434^0 == 0 /\ k1^0-k1^post17 == 0 /\ IsochDetachData^0-IsochDetachData^post17 == 0 /\ a3232^0-a3232^post17 == 0 /\ -__rho_99_^post17+__rho_99_^0 == 0 /\ __rho_11_^0-__rho_11_^post17 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post17+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ -__rho_13_^post17+__rho_13_^0 == 0 /\ a4444^0-a4444^post17 == 0 /\ -b22^post17+b22^0 == 0 /\ -__rho_5_^post17+__rho_5_^0 == 0 /\ -a3131^post17+a3131^0 == 0 /\ -k4^post17+k4^0 == 0 /\ -Irp^post17+Irp^0 == 0 /\ -i___099^post17+i___099^0 == 0 /\ pIrb^0-pIrb^post17 == 0 /\ -Irql^post17+Irql^0 == 0 /\ -keA^post17+keA^0 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post17 == 0 /\ CromData^0-CromData^post17 == 0 /\ -__rho_10_^post17+__rho_10_^0 == 0 /\ -k3^post17+k3^0 == 0 /\ a3737^0-a3737^post17 == 0 /\ i___01717^0-i___01717^post17 == 0 /\ -a11^post17+a11^0 == 0 /\ -__rho_1_^post17+__rho_1_^0 == 0 /\ k5^0-k5^post17 == 0 /\ -i___02020^post17+i___02020^0 == 0 /\ a2828^0-a2828^post17 == 0 /\ i___01313^0-i___01313^post17 == 0 /\ a77^0-a77^post17 == 0 /\ -__rho_3_^post17+__rho_3_^0 == 0 /\ __rho_7_^0-__rho_7_^post17 == 0 /\ -__rho_8_^post17+__rho_8_^0 == 0 /\ -__rho_9_^post17+__rho_9_^0 == 0 /\ ResourceIrp^0-ResourceIrp^post17 == 0 /\ b3333^0-b3333^post17 == 0 /\ __rho_4_^0-__rho_4_^post17 == 0 /\ a2525^0-a2525^post17 == 0 /\ -AsyncAddressData^post17+AsyncAddressData^0 == 0 /\ -i___02424^post17+i___02424^0 == 0 /\ -b3535^post17+b3535^0 == 0 /\ -i^post17+i^0 == 0 /\ -__rho_2_^post17+__rho_2_^0 == 0 /\ -IsochResourceData^post17+IsochResourceData^0 == 0 /\ a1818^0-a1818^post17 == 0 /\ -ret_IoAllocateIrp2727^post17+ret_IoAllocateIrp2727^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post17 == 0 /\ -k2^post17+k2^0 == 0 /\ -__rho_56_^post17+__rho_56_^0 == 0 /\ __rho_12_^0-__rho_12_^post17 == 0), cost: 1
New rule:
l13 -> l12 : -1+__rho_5_^0 >= 0, cost: 1

Applied preprocessing
Original rule:
l14 -> l13 : i___01717^0'=i___01717^post18, IsochDetachData^0'=IsochDetachData^post18, ntStatus^0'=ntStatus^post18, __rho_6_^0'=__rho_6_^post18, k5^0'=k5^post18, __rho_2_^0'=__rho_2_^post18, a3838^0'=a3838^post18, a2828^0'=a2828^post18, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post18, b3535^0'=b3535^post18, CromData^0'=CromData^post18, b2626^0'=b2626^post18, __rho_4_^0'=__rho_4_^post18, k2^0'=k2^post18, __rho_12_^0'=__rho_12_^post18, i___02424^0'=i___02424^post18, a11^0'=a11^post18, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post18, __rho_8_^0'=__rho_8_^post18, keR^0'=keR^post18, a4444^0'=a4444^post18, a3232^0'=a3232^post18, ResourceIrp^0'=ResourceIrp^post18, i___01313^0'=i___01313^post18, Irql^0'=Irql^post18, b3333^0'=b3333^post18, __rho_5_^0'=__rho_5_^post18, k4^0'=k4^post18, __rho_1_^0'=__rho_1_^post18, i___04646^0'=i___04646^post18, a2525^0'=a2525^post18, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post18, __rho_9_^0'=__rho_9_^post18, AsyncAddressData^0'=AsyncAddressData^post18, b22^0'=b22^post18, a3737^0'=a3737^post18, k1^0'=k1^post18, __rho_11_^0'=__rho_11_^post18, i___02020^0'=i___02020^post18, IsochResourceData^0'=IsochResourceData^post18, pIrb^0'=pIrb^post18, __rho_7_^0'=__rho_7_^post18, keA^0'=keA^post18, __rho_3_^0'=__rho_3_^post18, a4343^0'=a4343^post18, a3131^0'=a3131^post18, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post18, i^0'=i^post18, Irp^0'=Irp^post18, b2929^0'=b2929^post18, __rho_56_^0'=__rho_56_^post18, k3^0'=k3^post18, __rho_13_^0'=__rho_13_^post18, i___04040^0'=i___04040^post18, a1818^0'=a1818^post18, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post18, __rho_99_^0'=__rho_99_^post18, a77^0'=a77^post18, a3434^0'=a3434^post18, i___099^0'=i___099^post18, __rho_10_^0'=__rho_10_^post18, (0 == 0 /\ -i___099^post18+i___099^0 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post18 == 0 /\ CromData^0-CromData^post18 == 0 /\ -__rho_9_^post18+__rho_9_^0 == 0 /\ -a3232^post18+a3232^0 == 0 /\ -a77^post18+a77^0 == 0 /\ i___04040^0-i___04040^post18 == 0 /\ -b3333^post18+b3333^0 == 0 /\ -keA^post18+keA^0 == 0 /\ -k3^post18+k3^0 == 0 /\ -__rho_10_^post18+__rho_10_^0 == 0 /\ -keR^post18+keR^0 == 0 /\ k5^0-k5^post18 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post18+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ __rho_8_^0-__rho_8_^post18 == 0 /\ AsyncAddressData^0-AsyncAddressData^post18 == 0 /\ __rho_11_^0-__rho_11_^post18 == 0 /\ -ret_IoAllocateIrp2727^post18+ret_IoAllocateIrp2727^0 == 0 /\ a2828^0-a2828^post18 == 0 /\ -a3434^post18+a3434^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post18 == 0 /\ i___01717^0-i___01717^post18 == 0 /\ -i^post18+i^0 == 0 /\ __rho_2_^0-__rho_2_^post18 == 0 /\ -IsochResourceData^post18+IsochResourceData^0 == 0 /\ -Irp^post18+Irp^0 == 0 /\ k1^0-k1^post18 == 0 /\ -__rho_3_^post18+__rho_3_^0 == 0 /\ -__rho_56_^post18+__rho_56_^0 == 0 /\ -ret_IoSetDeviceInterfaceState44^post18+ret_IoSetDeviceInterfaceState44^0 == 0 /\ a11^0-a11^post18 == 0 /\ pIrb^0-pIrb^post18 == 0 /\ -a2525^post18+a2525^0 == 0 /\ __rho_6_^0-__rho_6_^post18 == 0 /\ __rho_12_^0-__rho_12_^post18 == 0 /\ i___04646^0-i___04646^post18 == 0 /\ k4^0-k4^post18 == 0 /\ a3838^0-a3838^post18 == 0 /\ b2626^0-b2626^post18 == 0 /\ -__rho_99_^post18+__rho_99_^0 == 0 /\ -ResourceIrp^post18+ResourceIrp^0 == 0 /\ __rho_7_^0-__rho_7_^post18 == 0 /\ __rho_4_^0-__rho_4_^post18 == 0 /\ -b3535^post18+b3535^0 == 0 /\ -a4343^post18+a4343^0 == 0 /\ -a3737^post18+a3737^0 == 0 /\ -a1818^post18+a1818^0 == 0 /\ -b2929^post18+b2929^0 == 0 /\ -b22^post18+b22^0 == 0 /\ ntStatus^0-ntStatus^post18 == 0 /\ i___02020^0-i___02020^post18 == 0 /\ i___02424^0-i___02424^post18 == 0 /\ IsochDetachData^0-IsochDetachData^post18 == 0 /\ -__rho_1_^post18+__rho_1_^0 == 0 /\ Irql^0-Irql^post18 == 0 /\ -__rho_13_^post18+__rho_13_^0 == 0 /\ a4444^0-a4444^post18 == 0 /\ i___01313^0-i___01313^post18 == 0 /\ k2^0-k2^post18 == 0 /\ -a3131^post18+a3131^0 == 0), cost: 1
New rule:
l14 -> l13 : __rho_5_^0'=__rho_5_^post18, 0 == 0, cost: 1

Applied preprocessing
Original rule:
l15 -> l16 : i___01717^0'=i___01717^post19, IsochDetachData^0'=IsochDetachData^post19, ntStatus^0'=ntStatus^post19, __rho_6_^0'=__rho_6_^post19, k5^0'=k5^post19, __rho_2_^0'=__rho_2_^post19, a3838^0'=a3838^post19, a2828^0'=a2828^post19, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post19, b3535^0'=b3535^post19, CromData^0'=CromData^post19, b2626^0'=b2626^post19, __rho_4_^0'=__rho_4_^post19, k2^0'=k2^post19, __rho_12_^0'=__rho_12_^post19, i___02424^0'=i___02424^post19, a11^0'=a11^post19, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post19, __rho_8_^0'=__rho_8_^post19, keR^0'=keR^post19, a4444^0'=a4444^post19, a3232^0'=a3232^post19, ResourceIrp^0'=ResourceIrp^post19, i___01313^0'=i___01313^post19, Irql^0'=Irql^post19, b3333^0'=b3333^post19, __rho_5_^0'=__rho_5_^post19, k4^0'=k4^post19, __rho_1_^0'=__rho_1_^post19, i___04646^0'=i___04646^post19, a2525^0'=a2525^post19, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post19, __rho_9_^0'=__rho_9_^post19, AsyncAddressData^0'=AsyncAddressData^post19, b22^0'=b22^post19, a3737^0'=a3737^post19, k1^0'=k1^post19, __rho_11_^0'=__rho_11_^post19, i___02020^0'=i___02020^post19, IsochResourceData^0'=IsochResourceData^post19, pIrb^0'=pIrb^post19, __rho_7_^0'=__rho_7_^post19, keA^0'=keA^post19, __rho_3_^0'=__rho_3_^post19, a4343^0'=a4343^post19, a3131^0'=a3131^post19, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post19, i^0'=i^post19, Irp^0'=Irp^post19, b2929^0'=b2929^post19, __rho_56_^0'=__rho_56_^post19, k3^0'=k3^post19, __rho_13_^0'=__rho_13_^post19, i___04040^0'=i___04040^post19, a1818^0'=a1818^post19, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post19, __rho_99_^0'=__rho_99_^post19, a77^0'=a77^post19, a3434^0'=a3434^post19, i___099^0'=i___099^post19, __rho_10_^0'=__rho_10_^post19, (-pIrb^post19+pIrb^0 == 0 /\ -__rho_13_^post19+__rho_13_^0 == 0 /\ -a77^post19+a77^0 == 0 /\ a2828^0-a2828^post19 == 0 /\ keA^210 == 0 /\ keA^post19 == 0 /\ -__rho_3_^post19+__rho_3_^0 == 0 /\ ResourceIrp^0-ResourceIrp^post19 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post19+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ a2525^0-a2525^post19 == 0 /\ -k3^post19+k3^0 == 0 /\ a4444^0-a4444^post19 == 0 /\ i___04040^0-i___04040^post19 == 0 /\ -IsochResourceData^post19+IsochResourceData^0 == 0 /\ -ret_IoAllocateIrp2727^post19+ret_IoAllocateIrp2727^0 == 0 /\ i___01717^0-i___01717^post19 == 0 /\ -__rho_8_^post19+__rho_8_^0 == 0 /\ -ret_IoSetDeviceInterfaceState44^post19+ret_IoSetDeviceInterfaceState44^0 == 0 /\ -i___02424^post19+i___02424^0 == 0 /\ a11^0-a11^post19 == 0 /\ -a3434^post19+a3434^0 == 0 /\ AsyncAddressData^0-AsyncAddressData^post19 == 0 /\ __rho_11_^0-__rho_11_^post19 == 0 /\ i___04646^0-i___04646^post19 == 0 /\ -__rho_99_^post19+__rho_99_^0 == 0 /\ b3333^0-b3333^post19 == 0 /\ -k2^post19+k2^0 == 0 /\ __rho_2_^0-__rho_2_^post19 == 0 /\ -1+keA^310 == 0 /\ -Irql^post19+Irql^0 == 0 /\ -__rho_9_^post19+__rho_9_^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post19 == 0 /\ -__rho_56_^post19+__rho_56_^0 == 0 /\ -b2929^post19+b2929^0 == 0 /\ __rho_4_^0-__rho_4_^post19 == 0 /\ -a3131^post19+a3131^0 == 0 /\ -CromData^post19+CromData^0 == 0 /\ -b3535^post19+b3535^0 == 0 /\ k4^0-k4^post19 == 0 /\ k1^0-k1^post19 == 0 /\ __rho_7_^0-__rho_7_^post19 == 0 /\ i___01313^0-i___01313^post19 == 0 /\ -a1818^post19+a1818^0 == 0 /\ __rho_5_^0-__rho_5_^post19 == 0 /\ -i___099^post19+i___099^0 == 0 /\ -a3737^post19+a3737^0 == 0 /\ -a4343^post19+a4343^0 == 0 /\ __rho_12_^0-__rho_12_^post19 == 0 /\ -i^post19+i^0 == 0 /\ __rho_6_^0-__rho_6_^post19 == 0 /\ -__rho_10_^post19+__rho_10_^0 == 0 /\ i___02020^0-i___02020^post19 == 0 /\ IsochDetachData^0-IsochDetachData^post19 == 0 /\ -1+keA^11 == 0 /\ b2626^0-b2626^post19 == 0 /\ k5^0-k5^post19 == 0 /\ -Irp^post19+Irp^0 == 0 /\ a3838^0-a3838^post19 == 0 /\ -__rho_1_^post19+__rho_1_^0 == 0 /\ -b22^post19+b22^0 == 0 /\ a3232^0-a3232^post19 == 0 /\ keR^0-keR^post19 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post19 == 0 /\ ntStatus^0-ntStatus^post19 == 0), cost: 1
New rule:
l15 -> l16 : keA^0'=0, TRUE, cost: 1

Applied preprocessing
Original rule:
l17 -> l14 : i___01717^0'=i___01717^post20, IsochDetachData^0'=IsochDetachData^post20, ntStatus^0'=ntStatus^post20, __rho_6_^0'=__rho_6_^post20, k5^0'=k5^post20, __rho_2_^0'=__rho_2_^post20, a3838^0'=a3838^post20, a2828^0'=a2828^post20, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post20, b3535^0'=b3535^post20, CromData^0'=CromData^post20, b2626^0'=b2626^post20, __rho_4_^0'=__rho_4_^post20, k2^0'=k2^post20, __rho_12_^0'=__rho_12_^post20, i___02424^0'=i___02424^post20, a11^0'=a11^post20, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post20, __rho_8_^0'=__rho_8_^post20, keR^0'=keR^post20, a4444^0'=a4444^post20, a3232^0'=a3232^post20, ResourceIrp^0'=ResourceIrp^post20, i___01313^0'=i___01313^post20, Irql^0'=Irql^post20, b3333^0'=b3333^post20, __rho_5_^0'=__rho_5_^post20, k4^0'=k4^post20, __rho_1_^0'=__rho_1_^post20, i___04646^0'=i___04646^post20, a2525^0'=a2525^post20, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post20, __rho_9_^0'=__rho_9_^post20, AsyncAddressData^0'=AsyncAddressData^post20, b22^0'=b22^post20, a3737^0'=a3737^post20, k1^0'=k1^post20, __rho_11_^0'=__rho_11_^post20, i___02020^0'=i___02020^post20, IsochResourceData^0'=IsochResourceData^post20, pIrb^0'=pIrb^post20, __rho_7_^0'=__rho_7_^post20, keA^0'=keA^post20, __rho_3_^0'=__rho_3_^post20, a4343^0'=a4343^post20, a3131^0'=a3131^post20, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post20, i^0'=i^post20, Irp^0'=Irp^post20, b2929^0'=b2929^post20, __rho_56_^0'=__rho_56_^post20, k3^0'=k3^post20, __rho_13_^0'=__rho_13_^post20, i___04040^0'=i___04040^post20, a1818^0'=a1818^post20, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post20, __rho_99_^0'=__rho_99_^post20, a77^0'=a77^post20, a3434^0'=a3434^post20, i___099^0'=i___099^post20, __rho_10_^0'=__rho_10_^post20, (ntStatus^0-ntStatus^post20 == 0 /\ -__rho_99_^post20+__rho_99_^0 == 0 /\ -a4343^post20+a4343^0 == 0 /\ ResourceIrp^0-ResourceIrp^post20 == 0 /\ a2525^0-a2525^post20 == 0 /\ __rho_11_^0-__rho_11_^post20 == 0 /\ -k2^post20+k2^0 == 0 /\ -k4^post20+k4^0 == 0 /\ a3232^0-a3232^post20 == 0 /\ keR^0-keR^post20 == 0 /\ IsochDetachData^0-IsochDetachData^post20 == 0 /\ -i___04040^post20+i___04040^0 == 0 /\ -__rho_8_^post20+__rho_8_^0 == 0 /\ k1^0-k1^post20 == 0 /\ __rho_4_^0-__rho_4_^post20 == 0 /\ -a3434^post20+a3434^0 == 0 /\ i___04646^0-i___04646^post20 == 0 /\ __rho_4_^0 <= 0 /\ a11^0-a11^post20 == 0 /\ __rho_6_^0-__rho_6_^post20 == 0 /\ -__rho_1_^post20+__rho_1_^0 == 0 /\ -a1818^post20+a1818^0 == 0 /\ b3535^0-b3535^post20 == 0 /\ -b22^post20+b22^0 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post20+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ k5^0-k5^post20 == 0 /\ -__rho_5_^post20+__rho_5_^0 == 0 /\ -__rho_13_^post20+__rho_13_^0 == 0 /\ -AsyncAddressData^post20+AsyncAddressData^0 == 0 /\ -a3131^post20+a3131^0 == 0 /\ -i___02424^post20+i___02424^0 == 0 /\ a2828^0-a2828^post20 == 0 /\ -k3^post20+k3^0 == 0 /\ -Irql^post20+Irql^0 == 0 /\ __rho_9_^0-__rho_9_^post20 == 0 /\ -i___099^post20+i___099^0 == 0 /\ -__rho_10_^post20+__rho_10_^0 == 0 /\ -i___02020^post20+i___02020^0 == 0 /\ -ret_t1394Diag_PnpStopDevice33^post20+ret_t1394Diag_PnpStopDevice33^0 == 0 /\ a4444^0-a4444^post20 == 0 /\ -b2929^post20+b2929^0 == 0 /\ __rho_12_^0-__rho_12_^post20 == 0 /\ i___01717^0-i___01717^post20 == 0 /\ a3737^0-a3737^post20 == 0 /\ i___01313^0-i___01313^post20 == 0 /\ -keA^post20+keA^0 == 0 /\ a3838^0-a3838^post20 == 0 /\ b2626^0-b2626^post20 == 0 /\ b3333^0-b3333^post20 == 0 /\ __rho_7_^0-__rho_7_^post20 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post20 == 0 /\ -i^post20+i^0 == 0 /\ CromData^0-CromData^post20 == 0 /\ -ret_IoAllocateIrp2727^post20+ret_IoAllocateIrp2727^0 == 0 /\ -ret_IoSetDeviceInterfaceState44^post20+ret_IoSetDeviceInterfaceState44^0 == 0 /\ -__rho_56_^post20+__rho_56_^0 == 0 /\ -a77^post20+a77^0 == 0 /\ -IsochResourceData^post20+IsochResourceData^0 == 0 /\ __rho_2_^0-__rho_2_^post20 == 0 /\ -Irp^post20+Irp^0 == 0 /\ pIrb^0-pIrb^post20 == 0 /\ -__rho_3_^post20+__rho_3_^0 == 0), cost: 1
New rule:
l17 -> l14 : __rho_4_^0 <= 0, cost: 1

Applied preprocessing
Original rule:
l17 -> l14 : i___01717^0'=i___01717^post21, IsochDetachData^0'=IsochDetachData^post21, ntStatus^0'=ntStatus^post21, __rho_6_^0'=__rho_6_^post21, k5^0'=k5^post21, __rho_2_^0'=__rho_2_^post21, a3838^0'=a3838^post21, a2828^0'=a2828^post21, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post21, b3535^0'=b3535^post21, CromData^0'=CromData^post21, b2626^0'=b2626^post21, __rho_4_^0'=__rho_4_^post21, k2^0'=k2^post21, __rho_12_^0'=__rho_12_^post21, i___02424^0'=i___02424^post21, a11^0'=a11^post21, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post21, __rho_8_^0'=__rho_8_^post21, keR^0'=keR^post21, a4444^0'=a4444^post21, a3232^0'=a3232^post21, ResourceIrp^0'=ResourceIrp^post21, i___01313^0'=i___01313^post21, Irql^0'=Irql^post21, b3333^0'=b3333^post21, __rho_5_^0'=__rho_5_^post21, k4^0'=k4^post21, __rho_1_^0'=__rho_1_^post21, i___04646^0'=i___04646^post21, a2525^0'=a2525^post21, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post21, __rho_9_^0'=__rho_9_^post21, AsyncAddressData^0'=AsyncAddressData^post21, b22^0'=b22^post21, a3737^0'=a3737^post21, k1^0'=k1^post21, __rho_11_^0'=__rho_11_^post21, i___02020^0'=i___02020^post21, IsochResourceData^0'=IsochResourceData^post21, pIrb^0'=pIrb^post21, __rho_7_^0'=__rho_7_^post21, keA^0'=keA^post21, __rho_3_^0'=__rho_3_^post21, a4343^0'=a4343^post21, a3131^0'=a3131^post21, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post21, i^0'=i^post21, Irp^0'=Irp^post21, b2929^0'=b2929^post21, __rho_56_^0'=__rho_56_^post21, k3^0'=k3^post21, __rho_13_^0'=__rho_13_^post21, i___04040^0'=i___04040^post21, a1818^0'=a1818^post21, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post21, __rho_99_^0'=__rho_99_^post21, a77^0'=a77^post21, a3434^0'=a3434^post21, i___099^0'=i___099^post21, __rho_10_^0'=__rho_10_^post21, (IsochDetachData^0-IsochDetachData^post21 == 0 /\ -__rho_56_^post21+__rho_56_^0 == 0 /\ __rho_12_^0-__rho_12_^post21 == 0 /\ __rho_11_^0-__rho_11_^post21 == 0 /\ -b22^post21+b22^0 == 0 /\ -a1818^post21+a1818^0 == 0 /\ -b3535^post21+b3535^0 == 0 /\ -a3131^post21+a3131^0 == 0 /\ __rho_6_^0-__rho_6_^post21 == 0 /\ -k3^post21+k3^0 == 0 /\ i___04646^0-i___04646^post21 == 0 /\ a3838^0-a3838^post21 == 0 /\ -i^post21+i^0 == 0 /\ ntStatus^0-ntStatus^post21 == 0 /\ -k4^post21+k4^0 == 0 /\ i___01313^0-i___01313^post21 == 0 /\ __rho_8_^0-__rho_8_^post21 == 0 /\ a3737^0-a3737^post21 == 0 /\ -keR^post21+keR^0 == 0 /\ -__rho_10_^post21+__rho_10_^0 == 0 /\ -Irql^post21+Irql^0 == 0 /\ -keA^post21+keA^0 == 0 /\ -i___04040^post21+i___04040^0 == 0 /\ k5^0-k5^post21 == 0 /\ k1^0-k1^post21 == 0 /\ -ResourceIrp^post21+ResourceIrp^0 == 0 /\ __rho_4_^0-__rho_4_^post21 == 0 /\ -__rho_1_^post21+__rho_1_^0 == 0 /\ -__rho_3_^post21+__rho_3_^0 == 0 /\ i___01717^0-i___01717^post21 == 0 /\ -b3333^post21+b3333^0 == 0 /\ -a11^post21+a11^0 == 0 /\ -b2929^post21+b2929^0 == 0 /\ -AsyncAddressData^post21+AsyncAddressData^0 == 0 /\ a2525^0-a2525^post21 == 0 /\ 1-__rho_4_^0 <= 0 /\ -i___02424^post21+i___02424^0 == 0 /\ -__rho_5_^post21+__rho_5_^0 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post21 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post21+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ pIrb^0-pIrb^post21 == 0 /\ -ret_IoAllocateIrp2727^post21+ret_IoAllocateIrp2727^0 == 0 /\ -a3232^post21+a3232^0 == 0 /\ -a4343^post21+a4343^0 == 0 /\ a2828^0-a2828^post21 == 0 /\ -__rho_2_^post21+__rho_2_^0 == 0 /\ CromData^0-CromData^post21 == 0 /\ k2^0-k2^post21 == 0 /\ -a77^post21+a77^0 == 0 /\ a4444^0-a4444^post21 == 0 /\ __rho_9_^0-__rho_9_^post21 == 0 /\ -i___099^post21+i___099^0 == 0 /\ -IsochResourceData^post21+IsochResourceData^0 == 0 /\ -Irp^post21+Irp^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post21 == 0 /\ -ret_IoSetDeviceInterfaceState44^post21+ret_IoSetDeviceInterfaceState44^0 == 0 /\ __rho_99_^0-__rho_99_^post21 == 0 /\ -b2626^post21+b2626^0 == 0 /\ __rho_7_^0-__rho_7_^post21 == 0 /\ -a3434^post21+a3434^0 == 0 /\ -__rho_13_^post21+__rho_13_^0 == 0 /\ i___02020^0-i___02020^post21 == 0), cost: 1
New rule:
l17 -> l14 : -1+__rho_4_^0 >= 0, cost: 1

Applied preprocessing
Original rule:
l18 -> l7 : i___01717^0'=i___01717^post22, IsochDetachData^0'=IsochDetachData^post22, ntStatus^0'=ntStatus^post22, __rho_6_^0'=__rho_6_^post22, k5^0'=k5^post22, __rho_2_^0'=__rho_2_^post22, a3838^0'=a3838^post22, a2828^0'=a2828^post22, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post22, b3535^0'=b3535^post22, CromData^0'=CromData^post22, b2626^0'=b2626^post22, __rho_4_^0'=__rho_4_^post22, k2^0'=k2^post22, __rho_12_^0'=__rho_12_^post22, i___02424^0'=i___02424^post22, a11^0'=a11^post22, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post22, __rho_8_^0'=__rho_8_^post22, keR^0'=keR^post22, a4444^0'=a4444^post22, a3232^0'=a3232^post22, ResourceIrp^0'=ResourceIrp^post22, i___01313^0'=i___01313^post22, Irql^0'=Irql^post22, b3333^0'=b3333^post22, __rho_5_^0'=__rho_5_^post22, k4^0'=k4^post22, __rho_1_^0'=__rho_1_^post22, i___04646^0'=i___04646^post22, a2525^0'=a2525^post22, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post22, __rho_9_^0'=__rho_9_^post22, AsyncAddressData^0'=AsyncAddressData^post22, b22^0'=b22^post22, a3737^0'=a3737^post22, k1^0'=k1^post22, __rho_11_^0'=__rho_11_^post22, i___02020^0'=i___02020^post22, IsochResourceData^0'=IsochResourceData^post22, pIrb^0'=pIrb^post22, __rho_7_^0'=__rho_7_^post22, keA^0'=keA^post22, __rho_3_^0'=__rho_3_^post22, a4343^0'=a4343^post22, a3131^0'=a3131^post22, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post22, i^0'=i^post22, Irp^0'=Irp^post22, b2929^0'=b2929^post22, __rho_56_^0'=__rho_56_^post22, k3^0'=k3^post22, __rho_13_^0'=__rho_13_^post22, i___04040^0'=i___04040^post22, a1818^0'=a1818^post22, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post22, __rho_99_^0'=__rho_99_^post22, a77^0'=a77^post22, a3434^0'=a3434^post22, i___099^0'=i___099^post22, __rho_10_^0'=__rho_10_^post22, (-ret_t1394_SubmitIrpSynch3636^post22+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ -i^post22+i^0 == 0 /\ __rho_2_^0-__rho_2_^post22 == 0 /\ a3232^0-a3232^post22 == 0 /\ -__rho_3_^post22+__rho_3_^0 == 0 /\ -a77^post22+a77^0 == 0 /\ k2^0-k2^post22 == 0 /\ CromData^0-CromData^post22 == 0 /\ CromData^0 <= 0 /\ i___01717^0-i___01717^post22 == 0 /\ -__rho_5_^post22+__rho_5_^0 == 0 /\ pIrb^0-pIrb^post22 == 0 /\ -i___04040^post22+i___04040^0 == 0 /\ -__rho_99_^post22+__rho_99_^0 == 0 /\ __rho_6_^0-__rho_6_^post22 == 0 /\ -__rho_10_^post22+__rho_10_^0 == 0 /\ AsyncAddressData^0-AsyncAddressData^post22 == 0 /\ -ResourceIrp^post22+ResourceIrp^0 == 0 /\ __rho_11_^0-__rho_11_^post22 == 0 /\ -b2929^post22+b2929^0 == 0 /\ -__rho_9_^post22+__rho_9_^0 == 0 /\ -a3434^post22+a3434^0 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post22 == 0 /\ -keR^post22+keR^0 == 0 /\ -a1818^post22+a1818^0 == 0 /\ -IsochResourceData^post22+IsochResourceData^0 == 0 /\ -__rho_1_^post22+__rho_1_^0 == 0 /\ k1^0-k1^post22 == 0 /\ a3737^0-a3737^post22 == 0 /\ -__rho_13_^post22+__rho_13_^0 == 0 /\ i___04646^0-i___04646^post22 == 0 /\ __rho_12_^0-__rho_12_^post22 == 0 /\ -__rho_56_^post22+__rho_56_^0 == 0 /\ -ret_IoSetDeviceInterfaceState44^post22+ret_IoSetDeviceInterfaceState44^0 == 0 /\ -ret_IoAllocateIrp2727^post22+ret_IoAllocateIrp2727^0 == 0 /\ -Irp^post22+Irp^0 == 0 /\ __rho_7_^0-__rho_7_^post22 == 0 /\ a3838^0-a3838^post22 == 0 /\ -a3131^post22+a3131^0 == 0 /\ -b22^post22+b22^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post22 == 0 /\ a4444^0-a4444^post22 == 0 /\ Irql^0-Irql^post22 == 0 /\ -k3^post22+k3^0 == 0 /\ i___01313^0-i___01313^post22 == 0 /\ -a2525^post22+a2525^0 == 0 /\ -a11^post22+a11^0 == 0 /\ -i___099^post22+i___099^0 == 0 /\ __rho_8_^0-__rho_8_^post22 == 0 /\ b3535^0-b3535^post22 == 0 /\ -b3333^post22+b3333^0 == 0 /\ a4343^0-a4343^post22 == 0 /\ k5^0-k5^post22 == 0 /\ k4^0-k4^post22 == 0 /\ a2828^0-a2828^post22 == 0 /\ i___02424^0-i___02424^post22 == 0 /\ i___02020^0-i___02020^post22 == 0 /\ ntStatus^0-ntStatus^post22 == 0 /\ -keA^post22+keA^0 == 0 /\ __rho_4_^0-__rho_4_^post22 == 0 /\ IsochDetachData^0-IsochDetachData^post22 == 0 /\ b2626^0-b2626^post22 == 0), cost: 1
New rule:
l18 -> l7 : CromData^0 <= 0, cost: 1

Applied preprocessing
Original rule:
l18 -> l17 : i___01717^0'=i___01717^post23, IsochDetachData^0'=IsochDetachData^post23, ntStatus^0'=ntStatus^post23, __rho_6_^0'=__rho_6_^post23, k5^0'=k5^post23, __rho_2_^0'=__rho_2_^post23, a3838^0'=a3838^post23, a2828^0'=a2828^post23, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post23, b3535^0'=b3535^post23, CromData^0'=CromData^post23, b2626^0'=b2626^post23, __rho_4_^0'=__rho_4_^post23, k2^0'=k2^post23, __rho_12_^0'=__rho_12_^post23, i___02424^0'=i___02424^post23, a11^0'=a11^post23, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post23, __rho_8_^0'=__rho_8_^post23, keR^0'=keR^post23, a4444^0'=a4444^post23, a3232^0'=a3232^post23, ResourceIrp^0'=ResourceIrp^post23, i___01313^0'=i___01313^post23, Irql^0'=Irql^post23, b3333^0'=b3333^post23, __rho_5_^0'=__rho_5_^post23, k4^0'=k4^post23, __rho_1_^0'=__rho_1_^post23, i___04646^0'=i___04646^post23, a2525^0'=a2525^post23, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post23, __rho_9_^0'=__rho_9_^post23, AsyncAddressData^0'=AsyncAddressData^post23, b22^0'=b22^post23, a3737^0'=a3737^post23, k1^0'=k1^post23, __rho_11_^0'=__rho_11_^post23, i___02020^0'=i___02020^post23, IsochResourceData^0'=IsochResourceData^post23, pIrb^0'=pIrb^post23, __rho_7_^0'=__rho_7_^post23, keA^0'=keA^post23, __rho_3_^0'=__rho_3_^post23, a4343^0'=a4343^post23, a3131^0'=a3131^post23, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post23, i^0'=i^post23, Irp^0'=Irp^post23, b2929^0'=b2929^post23, __rho_56_^0'=__rho_56_^post23, k3^0'=k3^post23, __rho_13_^0'=__rho_13_^post23, i___04040^0'=i___04040^post23, a1818^0'=a1818^post23, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post23, __rho_99_^0'=__rho_99_^post23, a77^0'=a77^post23, a3434^0'=a3434^post23, i___099^0'=i___099^post23, __rho_10_^0'=__rho_10_^post23, (0 == 0 /\ Irql^0-Irql^post23 == 0 /\ k3^0-k3^post23 == 0 /\ -i___01313^post23+i___01313^0 == 0 /\ -i^post23+i^0 == 0 /\ a3131^0-a3131^post23 == 0 /\ -a3434^post23+a3434^0 == 0 /\ -__rho_7_^post23+__rho_7_^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post23 == 0 /\ -__rho_56_^post23+__rho_56_^0 == 0 /\ ntStatus^0-ntStatus^post23 == 0 /\ ret_IoSetDeviceInterfaceState44^0-ret_IoSetDeviceInterfaceState44^post23 == 0 /\ -k1^post23+k1^0 == 0 /\ CromData^0-CromData^post23 == 0 /\ i___02424^0-i___02424^post23 == 0 /\ -__rho_9_^post23+__rho_9_^0 == 0 /\ -pIrb^post23+pIrb^0 == 0 /\ Irp^0-Irp^post23 == 0 /\ -__rho_3_^post23+__rho_3_^0 == 0 /\ a11^0-a11^post23 == 0 /\ -i___04040^post23+i___04040^0 == 0 /\ i___02020^0-i___02020^post23 == 0 /\ k4^0-k4^post23 == 0 /\ -a3737^post23+a3737^0 == 0 /\ -__rho_10_^post23+__rho_10_^0 == 0 /\ k5^0-k5^post23 == 0 /\ b3535^0-b3535^post23 == 0 /\ a3232^0-a3232^post23 == 0 /\ -b2929^post23+b2929^0 == 0 /\ a2828^0-a2828^post23 == 0 /\ -a1818^post23+a1818^0 == 0 /\ keR^0-keR^post23 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post23+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ IsochDetachData^0-IsochDetachData^post23 == 0 /\ __rho_2_^0-__rho_2_^post23 == 0 /\ -IsochResourceData^post23+IsochResourceData^0 == 0 /\ -ret_IoAllocateIrp2727^post23+ret_IoAllocateIrp2727^0 == 0 /\ __rho_8_^0-__rho_8_^post23 == 0 /\ keA^0-keA^post23 == 0 /\ -__rho_13_^post23+__rho_13_^0 == 0 /\ -ret_ExAllocatePool3030^post23+ret_ExAllocatePool3030^0 == 0 /\ k2^0-k2^post23 == 0 /\ a3838^0-a3838^post23 == 0 /\ 1-CromData^0 <= 0 /\ __rho_1_^0-__rho_1_^post23 == 0 /\ -b22^post23+b22^0 == 0 /\ -a2525^post23+a2525^0 == 0 /\ i___01717^0-i___01717^post23 == 0 /\ -a4343^post23+a4343^0 == 0 /\ __rho_12_^0-__rho_12_^post23 == 0 /\ __rho_5_^0-__rho_5_^post23 == 0 /\ -__rho_99_^post23+__rho_99_^0 == 0 /\ -__rho_6_^post23+__rho_6_^0 == 0 /\ -a77^post23+a77^0 == 0 /\ -i___04646^post23+i___04646^0 == 0 /\ -a4444^post23+a4444^0 == 0 /\ -__rho_11_^post23+__rho_11_^0 == 0 /\ -i___099^post23+i___099^0 == 0 /\ ResourceIrp^0-ResourceIrp^post23 == 0 /\ AsyncAddressData^0-AsyncAddressData^post23 == 0 /\ b2626^0-b2626^post23 == 0 /\ b3333^0-b3333^post23 == 0), cost: 1
New rule:
l18 -> l17 : __rho_4_^0'=__rho_4_^post23, -1+CromData^0 >= 0, cost: 1

Applied preprocessing
Original rule:
l8 -> l18 : i___01717^0'=i___01717^post24, IsochDetachData^0'=IsochDetachData^post24, ntStatus^0'=ntStatus^post24, __rho_6_^0'=__rho_6_^post24, k5^0'=k5^post24, __rho_2_^0'=__rho_2_^post24, a3838^0'=a3838^post24, a2828^0'=a2828^post24, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post24, b3535^0'=b3535^post24, CromData^0'=CromData^post24, b2626^0'=b2626^post24, __rho_4_^0'=__rho_4_^post24, k2^0'=k2^post24, __rho_12_^0'=__rho_12_^post24, i___02424^0'=i___02424^post24, a11^0'=a11^post24, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post24, __rho_8_^0'=__rho_8_^post24, keR^0'=keR^post24, a4444^0'=a4444^post24, a3232^0'=a3232^post24, ResourceIrp^0'=ResourceIrp^post24, i___01313^0'=i___01313^post24, Irql^0'=Irql^post24, b3333^0'=b3333^post24, __rho_5_^0'=__rho_5_^post24, k4^0'=k4^post24, __rho_1_^0'=__rho_1_^post24, i___04646^0'=i___04646^post24, a2525^0'=a2525^post24, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post24, __rho_9_^0'=__rho_9_^post24, AsyncAddressData^0'=AsyncAddressData^post24, b22^0'=b22^post24, a3737^0'=a3737^post24, k1^0'=k1^post24, __rho_11_^0'=__rho_11_^post24, i___02020^0'=i___02020^post24, IsochResourceData^0'=IsochResourceData^post24, pIrb^0'=pIrb^post24, __rho_7_^0'=__rho_7_^post24, keA^0'=keA^post24, __rho_3_^0'=__rho_3_^post24, a4343^0'=a4343^post24, a3131^0'=a3131^post24, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post24, i^0'=i^post24, Irp^0'=Irp^post24, b2929^0'=b2929^post24, __rho_56_^0'=__rho_56_^post24, k3^0'=k3^post24, __rho_13_^0'=__rho_13_^post24, i___04040^0'=i___04040^post24, a1818^0'=a1818^post24, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post24, __rho_99_^0'=__rho_99_^post24, a77^0'=a77^post24, a3434^0'=a3434^post24, i___099^0'=i___099^post24, __rho_10_^0'=__rho_10_^post24, (0 == 0 /\ Irp^0-Irp^post24 == 0 /\ __rho_56_^0-__rho_56_^post24 == 0 /\ __rho_6_^0-__rho_6_^post24 == 0 /\ b22^0-b22^post24 == 0 /\ a3838^0-a3838^post24 == 0 /\ -a3434^post24+a3434^0 == 0 /\ b2626^0-b2626^post24 == 0 /\ -a3737^post24+a3737^0 == 0 /\ -__rho_3_^post24+CromData^post24 == 0 /\ IsochDetachData^0-IsochDetachData^post24 == 0 /\ -__rho_99_^post24+__rho_99_^0 == 0 /\ __rho_1_^0-__rho_1_^post24 == 0 /\ b3535^0-b3535^post24 == 0 /\ -__rho_4_^post24+__rho_4_^0 == 0 /\ i___01717^0-i___01717^post24 == 0 /\ -__rho_13_^post24+__rho_13_^0 == 0 /\ 1+k1^post24-k1^0 == 0 /\ b3333^0-b3333^post24 == 0 /\ i___02424^0-i___02424^post24 == 0 /\ -k4^post24+k4^0 == 0 /\ -a4444^post24+a4444^0 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post24+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ -k3^post24+k3^0 == 0 /\ -a3131^post24+a3131^0 == 0 /\ keR^0-keR^post24 == 0 /\ a3232^0-a3232^post24 == 0 /\ __rho_5_^0-__rho_5_^post24 == 0 /\ -ret_ExAllocatePool3030^post24+ret_ExAllocatePool3030^0 == 0 /\ -__rho_11_^post24+__rho_11_^0 == 0 /\ -i___099^post24+i___099^0 == 0 /\ -a4343^post24+a4343^0 == 0 /\ -__rho_7_^post24+__rho_7_^0 == 0 /\ -a2525^post24+a2525^0 == 0 /\ k2^0-k2^post24 == 0 /\ i___04646^0-i___04646^post24 == 0 /\ ntStatus^0-ntStatus^post24 == 0 /\ -pIrb^post24+pIrb^0 == 0 /\ IsochResourceData^0-IsochResourceData^post24 == 0 /\ k5^0-k5^post24 == 0 /\ -i___02020^post24+i___02020^0 == 0 /\ a2828^0-a2828^post24 == 0 /\ __rho_8_^0-__rho_8_^post24 == 0 /\ -AsyncAddressData^post24+AsyncAddressData^0 == 0 /\ 1-k1^0 <= 0 /\ -b2929^post24+b2929^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post24 == 0 /\ -__rho_9_^post24+__rho_9_^0 == 0 /\ ResourceIrp^0-ResourceIrp^post24 == 0 /\ -i___01313^post24+i___01313^0 == 0 /\ __rho_2_^0-__rho_2_^post24 == 0 /\ keA^0-keA^post24 == 0 /\ -a77^post24+a77^0 == 0 /\ -a1818^post24+a1818^0 == 0 /\ -i^post24+i^0 == 0 /\ ret_IoAllocateIrp2727^0-ret_IoAllocateIrp2727^post24 == 0 /\ a11^0-a11^post24 == 0 /\ Irql^0-Irql^post24 == 0 /\ ret_IoSetDeviceInterfaceState44^0-ret_IoSetDeviceInterfaceState44^post24 == 0 /\ -__rho_10_^post24+__rho_10_^0 == 0 /\ -i___04040^post24+i___04040^0 == 0 /\ __rho_12_^0-__rho_12_^post24 == 0), cost: 1
New rule:
l8 -> l18 : CromData^0'=CromData^post24, k1^0'=-1+k1^0, __rho_3_^0'=CromData^post24, -1+k1^0 >= 0, cost: 1

Applied preprocessing
Original rule:
l8 -> l1 : i___01717^0'=i___01717^post25, IsochDetachData^0'=IsochDetachData^post25, ntStatus^0'=ntStatus^post25, __rho_6_^0'=__rho_6_^post25, k5^0'=k5^post25, __rho_2_^0'=__rho_2_^post25, a3838^0'=a3838^post25, a2828^0'=a2828^post25, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post25, b3535^0'=b3535^post25, CromData^0'=CromData^post25, b2626^0'=b2626^post25, __rho_4_^0'=__rho_4_^post25, k2^0'=k2^post25, __rho_12_^0'=__rho_12_^post25, i___02424^0'=i___02424^post25, a11^0'=a11^post25, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post25, __rho_8_^0'=__rho_8_^post25, keR^0'=keR^post25, a4444^0'=a4444^post25, a3232^0'=a3232^post25, ResourceIrp^0'=ResourceIrp^post25, i___01313^0'=i___01313^post25, Irql^0'=Irql^post25, b3333^0'=b3333^post25, __rho_5_^0'=__rho_5_^post25, k4^0'=k4^post25, __rho_1_^0'=__rho_1_^post25, i___04646^0'=i___04646^post25, a2525^0'=a2525^post25, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post25, __rho_9_^0'=__rho_9_^post25, AsyncAddressData^0'=AsyncAddressData^post25, b22^0'=b22^post25, a3737^0'=a3737^post25, k1^0'=k1^post25, __rho_11_^0'=__rho_11_^post25, i___02020^0'=i___02020^post25, IsochResourceData^0'=IsochResourceData^post25, pIrb^0'=pIrb^post25, __rho_7_^0'=__rho_7_^post25, keA^0'=keA^post25, __rho_3_^0'=__rho_3_^post25, a4343^0'=a4343^post25, a3131^0'=a3131^post25, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post25, i^0'=i^post25, Irp^0'=Irp^post25, b2929^0'=b2929^post25, __rho_56_^0'=__rho_56_^post25, k3^0'=k3^post25, __rho_13_^0'=__rho_13_^post25, i___04040^0'=i___04040^post25, a1818^0'=a1818^post25, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post25, __rho_99_^0'=__rho_99_^post25, a77^0'=a77^post25, a3434^0'=a3434^post25, i___099^0'=i___099^post25, __rho_10_^0'=__rho_10_^post25, (0 == 0 /\ __rho_9_^0-__rho_9_^post25 == 0 /\ a11^0-a11^post25 == 0 /\ -b2929^post25+b2929^0 == 0 /\ keR^210 == 0 /\ -__rho_11_^post25+__rho_11_^0 == 0 /\ a3838^0-a3838^post25 == 0 /\ k5^0-k5^post25 == 0 /\ -a77^post25+a77^0 == 0 /\ -k4^post25+k4^0 == 0 /\ -i___04040^post25+i___04040^0 == 0 /\ -__rho_10_^post25+__rho_10_^0 == 0 /\ -Irp^post25+Irp^0 == 0 /\ i___01717^0-i___01717^post25 == 0 /\ IsochResourceData^0-IsochResourceData^post25 == 0 /\ __rho_1_^0-__rho_1_^post25 == 0 /\ -1+keA^12 == 0 /\ -k1^post25+k1^0 == 0 /\ k2^post25-__rho_6_^post25 == 0 /\ -a1818^post25+a1818^0 == 0 /\ -__rho_12_^post25+__rho_12_^0 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post25+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ __rho_8_^0-__rho_8_^post25 == 0 /\ -a3131^post25+a3131^0 == 0 /\ -1+keR^110 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post25 == 0 /\ i^0-i^post25 == 0 /\ i___02424^0-i___02424^post25 == 0 /\ -a3434^post25+a3434^0 == 0 /\ -__rho_13_^post25+__rho_13_^0 == 0 /\ b2626^0-b2626^post25 == 0 /\ a3232^0-a3232^post25 == 0 /\ -i___01313^post25+i___01313^0 == 0 /\ -1+keR^310 == 0 /\ keA^post25 == 0 /\ __rho_3_^0-__rho_3_^post25 == 0 /\ k1^0 <= 0 /\ -__rho_5_^post25+__rho_5_^0 == 0 /\ a4343^0-a4343^post25 == 0 /\ __rho_2_^0-__rho_2_^post25 == 0 /\ a2828^0-a2828^post25 == 0 /\ CromData^0-CromData^post25 == 0 /\ -k3^post25+k3^0 == 0 /\ i___04646^0-i___04646^post25 == 0 /\ b22^0-b22^post25 == 0 /\ -__rho_56_^post25+__rho_56_^0 == 0 /\ ResourceIrp^0-ResourceIrp^post25 == 0 /\ -__rho_7_^post25+__rho_7_^0 == 0 /\ -ret_IoAllocateIrp2727^post25+ret_IoAllocateIrp2727^0 == 0 /\ b3535^0-b3535^post25 == 0 /\ keR^post25 == 0 /\ a4444^0-a4444^post25 == 0 /\ -ret_IoSetDeviceInterfaceState44^post25+ret_IoSetDeviceInterfaceState44^0 == 0 /\ -a2525^post25+a2525^0 == 0 /\ -IsochDetachData^post25+IsochDetachData^0 == 0 /\ -a3737^post25+a3737^0 == 0 /\ -Irql^0+i___099^post25 == 0 /\ -1+keA^320 == 0 /\ -__rho_99_^post25+__rho_99_^0 == 0 /\ -pIrb^post25+pIrb^0 == 0 /\ -b3333^post25+b3333^0 == 0 /\ AsyncAddressData^0-AsyncAddressData^post25 == 0 /\ -i___02020^post25+i___02020^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post25 == 0 /\ keA^220 == 0 /\ ntStatus^0-ntStatus^post25 == 0 /\ Irql^0-Irql^post25 == 0 /\ -__rho_4_^post25+__rho_4_^0 == 0), cost: 1
New rule:
l8 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=__rho_6_^post25, keR^0'=0, keA^0'=0, i___099^0'=Irql^0, k1^0 <= 0, cost: 1

Applied preprocessing
Original rule:
l19 -> l20 : i___01717^0'=i___01717^post26, IsochDetachData^0'=IsochDetachData^post26, ntStatus^0'=ntStatus^post26, __rho_6_^0'=__rho_6_^post26, k5^0'=k5^post26, __rho_2_^0'=__rho_2_^post26, a3838^0'=a3838^post26, a2828^0'=a2828^post26, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post26, b3535^0'=b3535^post26, CromData^0'=CromData^post26, b2626^0'=b2626^post26, __rho_4_^0'=__rho_4_^post26, k2^0'=k2^post26, __rho_12_^0'=__rho_12_^post26, i___02424^0'=i___02424^post26, a11^0'=a11^post26, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post26, __rho_8_^0'=__rho_8_^post26, keR^0'=keR^post26, a4444^0'=a4444^post26, a3232^0'=a3232^post26, ResourceIrp^0'=ResourceIrp^post26, i___01313^0'=i___01313^post26, Irql^0'=Irql^post26, b3333^0'=b3333^post26, __rho_5_^0'=__rho_5_^post26, k4^0'=k4^post26, __rho_1_^0'=__rho_1_^post26, i___04646^0'=i___04646^post26, a2525^0'=a2525^post26, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post26, __rho_9_^0'=__rho_9_^post26, AsyncAddressData^0'=AsyncAddressData^post26, b22^0'=b22^post26, a3737^0'=a3737^post26, k1^0'=k1^post26, __rho_11_^0'=__rho_11_^post26, i___02020^0'=i___02020^post26, IsochResourceData^0'=IsochResourceData^post26, pIrb^0'=pIrb^post26, __rho_7_^0'=__rho_7_^post26, keA^0'=keA^post26, __rho_3_^0'=__rho_3_^post26, a4343^0'=a4343^post26, a3131^0'=a3131^post26, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post26, i^0'=i^post26, Irp^0'=Irp^post26, b2929^0'=b2929^post26, __rho_56_^0'=__rho_56_^post26, k3^0'=k3^post26, __rho_13_^0'=__rho_13_^post26, i___04040^0'=i___04040^post26, a1818^0'=a1818^post26, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post26, __rho_99_^0'=__rho_99_^post26, a77^0'=a77^post26, a3434^0'=a3434^post26, i___099^0'=i___099^post26, __rho_10_^0'=__rho_10_^post26, (-__rho_9_^post26+__rho_9_^0 == 0 /\ -__rho_99_^post26+__rho_99_^0 == 0 /\ k5^0-k5^post26 == 0 /\ k4^0-k4^post26 == 0 /\ -k1^post26+k1^0 == 0 /\ -a4343^post26+a4343^0 == 0 /\ -i___04646^post26+i___04646^0 == 0 /\ a3838^0-a3838^post26 == 0 /\ b2626^0-b2626^post26 == 0 /\ CromData^0-CromData^post26 == 0 /\ -a77^post26+a77^0 == 0 /\ -__rho_7_^post26+__rho_7_^0 == 0 /\ -a3737^post26+a3737^0 == 0 /\ -i___04040^post26+i___04040^0 == 0 /\ -i___099^post26+i___099^0 == 0 /\ k3^0-k3^post26 == 0 /\ -b3333^post26+b3333^0 == 0 /\ -__rho_4_^post26+__rho_4_^0 == 0 /\ -b2929^post26+b2929^0 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post26+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ -i^post26+i^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post26 == 0 /\ -a3434^post26+a3434^0 == 0 /\ -ret_ExAllocatePool3030^post26+ret_ExAllocatePool3030^0 == 0 /\ IsochDetachData^0-IsochDetachData^post26 == 0 /\ a2828^0-a2828^post26 == 0 /\ i___02424^0-i___02424^post26 == 0 /\ ret_IoSetDeviceInterfaceState44^0-ret_IoSetDeviceInterfaceState44^post26 == 0 /\ Irql^0-Irql^post26 == 0 /\ keR^0-keR^post26 == 0 /\ -__rho_13_^post26+__rho_13_^0 == 0 /\ a4444^0-a4444^post26 == 0 /\ a3232^0-a3232^post26 == 0 /\ -__rho_3_^post26+__rho_3_^0 == 0 /\ -b22^post26+b22^0 == 0 /\ ntStatus^0-ntStatus^post26 == 0 /\ a11^0-a11^post26 == 0 /\ -Irp^post26+Irp^0 == 0 /\ k2^0-k2^post26 == 0 /\ -pIrb^post26+pIrb^0 == 0 /\ i___02020^0-i___02020^post26 == 0 /\ b3535^0-b3535^post26 == 0 /\ keA^0-keA^post26 == 0 /\ -__rho_56_^post26+__rho_56_^0 == 0 /\ __rho_1_^0-__rho_1_^post26 == 0 /\ -__rho_11_^post26+__rho_11_^0 == 0 /\ -__rho_10_^post26+__rho_10_^0 == 0 /\ -a1818^post26+a1818^0 == 0 /\ __rho_2_^0-__rho_2_^post26 == 0 /\ __rho_8_^0-__rho_8_^post26 == 0 /\ AsyncAddressData^0-AsyncAddressData^post26 == 0 /\ -IsochResourceData^post26+IsochResourceData^0 == 0 /\ ResourceIrp^0-ResourceIrp^post26 == 0 /\ i___01717^0-i___01717^post26 == 0 /\ -ret_IoAllocateIrp2727^post26+ret_IoAllocateIrp2727^0 == 0 /\ -i___01313^post26+i___01313^0 == 0 /\ __rho_12_^0-__rho_12_^post26 == 0 /\ __rho_5_^0-__rho_5_^post26 == 0 /\ a3131^0-a3131^post26 == 0 /\ __rho_6_^0-__rho_6_^post26 == 0 /\ -a2525^post26+a2525^0 == 0), cost: 1
New rule:
l19 -> l20 : TRUE, cost: 1

Applied preprocessing
Original rule:
l23 -> l19 : i___01717^0'=i___01717^post28, IsochDetachData^0'=IsochDetachData^post28, ntStatus^0'=ntStatus^post28, __rho_6_^0'=__rho_6_^post28, k5^0'=k5^post28, __rho_2_^0'=__rho_2_^post28, a3838^0'=a3838^post28, a2828^0'=a2828^post28, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post28, b3535^0'=b3535^post28, CromData^0'=CromData^post28, b2626^0'=b2626^post28, __rho_4_^0'=__rho_4_^post28, k2^0'=k2^post28, __rho_12_^0'=__rho_12_^post28, i___02424^0'=i___02424^post28, a11^0'=a11^post28, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post28, __rho_8_^0'=__rho_8_^post28, keR^0'=keR^post28, a4444^0'=a4444^post28, a3232^0'=a3232^post28, ResourceIrp^0'=ResourceIrp^post28, i___01313^0'=i___01313^post28, Irql^0'=Irql^post28, b3333^0'=b3333^post28, __rho_5_^0'=__rho_5_^post28, k4^0'=k4^post28, __rho_1_^0'=__rho_1_^post28, i___04646^0'=i___04646^post28, a2525^0'=a2525^post28, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post28, __rho_9_^0'=__rho_9_^post28, AsyncAddressData^0'=AsyncAddressData^post28, b22^0'=b22^post28, a3737^0'=a3737^post28, k1^0'=k1^post28, __rho_11_^0'=__rho_11_^post28, i___02020^0'=i___02020^post28, IsochResourceData^0'=IsochResourceData^post28, pIrb^0'=pIrb^post28, __rho_7_^0'=__rho_7_^post28, keA^0'=keA^post28, __rho_3_^0'=__rho_3_^post28, a4343^0'=a4343^post28, a3131^0'=a3131^post28, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post28, i^0'=i^post28, Irp^0'=Irp^post28, b2929^0'=b2929^post28, __rho_56_^0'=__rho_56_^post28, k3^0'=k3^post28, __rho_13_^0'=__rho_13_^post28, i___04040^0'=i___04040^post28, a1818^0'=a1818^post28, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post28, __rho_99_^0'=__rho_99_^post28, a77^0'=a77^post28, a3434^0'=a3434^post28, i___099^0'=i___099^post28, __rho_10_^0'=__rho_10_^post28, (-a77^post28+a77^0 == 0 /\ -i___01313^post28+i___01313^0 == 0 /\ a2828^0-a2828^post28 == 0 /\ ret_t1394_SubmitIrpSynch3636^0-ret_t1394_SubmitIrpSynch3636^post28 == 0 /\ k5^0-k5^post28 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post28 == 0 /\ -ret_IoSetDeviceInterfaceState44^post28+ret_IoSetDeviceInterfaceState44^0 == 0 /\ __rho_9_^0-__rho_9_^post28 == 0 /\ -ret_IoAllocateIrp2727^post28+ret_IoAllocateIrp2727^0 == 0 /\ -CromData^post28+CromData^0 == 0 /\ -k1^post28+k1^0 == 0 /\ b3333^0-b3333^post28 == 0 /\ keR^0-keR^post28 == 0 /\ __rho_2_^0-__rho_2_^post28 == 0 /\ -i___099^post28+i___099^0 == 0 /\ IsochDetachData^0-IsochDetachData^post28 == 0 /\ IsochResourceData^0-IsochResourceData^post28 == 0 /\ -1+a4444^post28 == 0 /\ -k3^post28+k3^0 == 0 /\ __rho_8_^0-__rho_8_^post28 == 0 /\ b2929^0-b2929^post28 == 0 /\ __rho_13_^0-__rho_13_^post28 == 0 /\ -a3434^post28+a3434^0 == 0 /\ ResourceIrp^0-ResourceIrp^post28 == 0 /\ a3838^0-a3838^post28 == 0 /\ i^0-i^post28 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post28 == 0 /\ ntStatus^0-ntStatus^post28 == 0 /\ -__rho_99_^post28+__rho_99_^0 == 0 /\ a11^0-a11^post28 == 0 /\ -a1818^post28+a1818^0 == 0 /\ -__rho_7_^post28+__rho_7_^0 == 0 /\ a3232^0-a3232^post28 == 0 /\ -__rho_56_^post28+__rho_56_^0 == 0 /\ -2+a4343^post28 == 0 /\ -__rho_5_^post28+__rho_5_^0 == 0 /\ -AsyncAddressData^post28+AsyncAddressData^0 == 0 /\ __rho_3_^0-__rho_3_^post28 == 0 /\ __rho_6_^0-__rho_6_^post28 == 0 /\ k2^0-k2^post28 == 0 /\ i___02424^0-i___02424^post28 == 0 /\ -a3131^post28+a3131^0 == 0 /\ -__rho_11_^post28+__rho_11_^0 == 0 /\ b2626^0-b2626^post28 == 0 /\ -k4^post28+k4^0 == 0 /\ b22^0-b22^post28 == 0 /\ i___01717^0-i___01717^post28 == 0 /\ -a2525^post28+a2525^0 == 0 /\ -i___04040^post28+i___04040^0 == 0 /\ -a3737^post28+a3737^0 == 0 /\ -__rho_10_^post28+__rho_10_^0 == 0 /\ b3535^0-b3535^post28 == 0 /\ -Irp^post28+Irp^0 == 0 /\ -__rho_4_^post28+__rho_4_^0 == 0 /\ -__rho_1_^post28+__rho_1_^0 == 0 /\ -pIrb^post28+pIrb^0 == 0 /\ -i___02020^post28+i___02020^0 == 0 /\ i___04646^0-i___04646^post28 == 0 /\ -__rho_12_^post28+__rho_12_^0 == 0 /\ -keA^post28+keA^0 == 0 /\ -Irql^post28+Irql^0 == 0), cost: 1
New rule:
l23 -> l19 : a4444^0'=1, a4343^0'=2, TRUE, cost: 1

Applied preprocessing
Original rule:
l24 -> l23 : i___01717^0'=i___01717^post29, IsochDetachData^0'=IsochDetachData^post29, ntStatus^0'=ntStatus^post29, __rho_6_^0'=__rho_6_^post29, k5^0'=k5^post29, __rho_2_^0'=__rho_2_^post29, a3838^0'=a3838^post29, a2828^0'=a2828^post29, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post29, b3535^0'=b3535^post29, CromData^0'=CromData^post29, b2626^0'=b2626^post29, __rho_4_^0'=__rho_4_^post29, k2^0'=k2^post29, __rho_12_^0'=__rho_12_^post29, i___02424^0'=i___02424^post29, a11^0'=a11^post29, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post29, __rho_8_^0'=__rho_8_^post29, keR^0'=keR^post29, a4444^0'=a4444^post29, a3232^0'=a3232^post29, ResourceIrp^0'=ResourceIrp^post29, i___01313^0'=i___01313^post29, Irql^0'=Irql^post29, b3333^0'=b3333^post29, __rho_5_^0'=__rho_5_^post29, k4^0'=k4^post29, __rho_1_^0'=__rho_1_^post29, i___04646^0'=i___04646^post29, a2525^0'=a2525^post29, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post29, __rho_9_^0'=__rho_9_^post29, AsyncAddressData^0'=AsyncAddressData^post29, b22^0'=b22^post29, a3737^0'=a3737^post29, k1^0'=k1^post29, __rho_11_^0'=__rho_11_^post29, i___02020^0'=i___02020^post29, IsochResourceData^0'=IsochResourceData^post29, pIrb^0'=pIrb^post29, __rho_7_^0'=__rho_7_^post29, keA^0'=keA^post29, __rho_3_^0'=__rho_3_^post29, a4343^0'=a4343^post29, a3131^0'=a3131^post29, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post29, i^0'=i^post29, Irp^0'=Irp^post29, b2929^0'=b2929^post29, __rho_56_^0'=__rho_56_^post29, k3^0'=k3^post29, __rho_13_^0'=__rho_13_^post29, i___04040^0'=i___04040^post29, a1818^0'=a1818^post29, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post29, __rho_99_^0'=__rho_99_^post29, a77^0'=a77^post29, a3434^0'=a3434^post29, i___099^0'=i___099^post29, __rho_10_^0'=__rho_10_^post29, (a4444^0-a4444^post29 == 0 /\ Irp^0-Irp^post29 == 0 /\ -__rho_12_^post29+__rho_12_^0 == 0 /\ b3333^0-b3333^post29 == 0 /\ __rho_13_^0-__rho_13_^post29 == 0 /\ __rho_2_^0-__rho_2_^post29 == 0 /\ -keA^post29+keA^0 == 0 /\ k2^0-k2^post29 == 0 /\ k5^0-k5^post29 == 0 /\ -__rho_56_^post29+__rho_56_^0 == 0 /\ -ret_IoSetDeviceInterfaceState44^post29+ret_IoSetDeviceInterfaceState44^0 == 0 /\ -Irql^post29+Irql^0 == 0 /\ __rho_9_^0-__rho_9_^post29 == 0 /\ a2525^0-a2525^post29 == 0 /\ -i___02020^post29+i___02020^0 == 0 /\ __rho_5_^0-__rho_5_^post29 == 0 /\ ret_t1394_SubmitIrpSynch3636^0-ret_t1394_SubmitIrpSynch3636^post29 == 0 /\ -__rho_11_^post29+__rho_11_^0 == 0 /\ a3838^0-a3838^post29 == 0 /\ -i___01313^post29+i___01313^0 == 0 /\ IsochResourceData^0-IsochResourceData^post29 == 0 /\ __rho_8_^0-__rho_8_^post29 == 0 /\ b2626^0-b2626^post29 == 0 /\ -__rho_10_^post29+__rho_10_^0 == 0 /\ -i___04040^post29+i___04040^0 == 0 /\ b22^0-b22^post29 == 0 /\ -a3737^post29+a3737^0 == 0 /\ -i^post29+i^0 == 0 /\ __rho_1_^0-__rho_1_^post29 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post29 == 0 /\ i___02424^0-i___02424^post29 == 0 /\ -ret_IoAllocateIrp2727^post29+ret_IoAllocateIrp2727^0 == 0 /\ -a3434^post29+a3434^0 == 0 /\ -__rho_4_^post29+__rho_4_^0 == 0 /\ __rho_6_^0-__rho_6_^post29 == 0 /\ ResourceIrp^0-ResourceIrp^post29 == 0 /\ __rho_3_^0-__rho_3_^post29 == 0 /\ b3535^0-b3535^post29 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post29 == 0 /\ -a77^post29+a77^0 == 0 /\ ntStatus^0-ntStatus^post29 == 0 /\ keR^0-keR^post29 == 0 /\ CromData^0-CromData^post29 == 0 /\ IsochDetachData^0-IsochDetachData^post29 == 0 /\ -AsyncAddressData^post29+AsyncAddressData^0 == 0 /\ -a4343^post29+a4343^0 == 0 /\ -pIrb^post29+pIrb^0 == 0 /\ -b2929^post29+b2929^0 == 0 /\ a11^0-a11^post29 == 0 /\ __rho_56_^0 <= 0 /\ -a3131^post29+a3131^0 == 0 /\ -__rho_99_^post29+__rho_99_^0 == 0 /\ -k4^post29+k4^0 == 0 /\ -k1^post29+k1^0 == 0 /\ i___04646^0-i___04646^post29 == 0 /\ -a1818^post29+a1818^0 == 0 /\ -i___099^post29+i___099^0 == 0 /\ -a2828^post29+a2828^0 == 0 /\ -__rho_7_^post29+__rho_7_^0 == 0 /\ i___01717^0-i___01717^post29 == 0 /\ -k3^post29+k3^0 == 0 /\ a3232^0-a3232^post29 == 0), cost: 1
New rule:
l24 -> l23 : __rho_56_^0 <= 0, cost: 1

Applied preprocessing
Original rule:
l24 -> l23 : i___01717^0'=i___01717^post30, IsochDetachData^0'=IsochDetachData^post30, ntStatus^0'=ntStatus^post30, __rho_6_^0'=__rho_6_^post30, k5^0'=k5^post30, __rho_2_^0'=__rho_2_^post30, a3838^0'=a3838^post30, a2828^0'=a2828^post30, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post30, b3535^0'=b3535^post30, CromData^0'=CromData^post30, b2626^0'=b2626^post30, __rho_4_^0'=__rho_4_^post30, k2^0'=k2^post30, __rho_12_^0'=__rho_12_^post30, i___02424^0'=i___02424^post30, a11^0'=a11^post30, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post30, __rho_8_^0'=__rho_8_^post30, keR^0'=keR^post30, a4444^0'=a4444^post30, a3232^0'=a3232^post30, ResourceIrp^0'=ResourceIrp^post30, i___01313^0'=i___01313^post30, Irql^0'=Irql^post30, b3333^0'=b3333^post30, __rho_5_^0'=__rho_5_^post30, k4^0'=k4^post30, __rho_1_^0'=__rho_1_^post30, i___04646^0'=i___04646^post30, a2525^0'=a2525^post30, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post30, __rho_9_^0'=__rho_9_^post30, AsyncAddressData^0'=AsyncAddressData^post30, b22^0'=b22^post30, a3737^0'=a3737^post30, k1^0'=k1^post30, __rho_11_^0'=__rho_11_^post30, i___02020^0'=i___02020^post30, IsochResourceData^0'=IsochResourceData^post30, pIrb^0'=pIrb^post30, __rho_7_^0'=__rho_7_^post30, keA^0'=keA^post30, __rho_3_^0'=__rho_3_^post30, a4343^0'=a4343^post30, a3131^0'=a3131^post30, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post30, i^0'=i^post30, Irp^0'=Irp^post30, b2929^0'=b2929^post30, __rho_56_^0'=__rho_56_^post30, k3^0'=k3^post30, __rho_13_^0'=__rho_13_^post30, i___04040^0'=i___04040^post30, a1818^0'=a1818^post30, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post30, __rho_99_^0'=__rho_99_^post30, a77^0'=a77^post30, a3434^0'=a3434^post30, i___099^0'=i___099^post30, __rho_10_^0'=__rho_10_^post30, (i___04646^0-i___04646^post30 == 0 /\ -i___04040^post30+i___04040^0 == 0 /\ ret_t1394_SubmitIrpSynch3636^0-ret_t1394_SubmitIrpSynch3636^post30 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post30 == 0 /\ -a3434^post30+a3434^0 == 0 /\ -k3^post30+k3^0 == 0 /\ ntStatus^0-ntStatus^post30 == 0 /\ -__rho_99_^post30+__rho_99_^0 == 0 /\ -__rho_5_^post30+__rho_5_^0 == 0 /\ a2525^0-a2525^post30 == 0 /\ 1-k5^0+k5^post30 == 0 /\ __rho_13_^0-__rho_13_^post30 == 0 /\ b2929^0-b2929^post30 == 0 /\ -a1818^post30+a1818^0 == 0 /\ -__rho_7_^post30+__rho_7_^0 == 0 /\ ResourceIrp^0-ResourceIrp^post30 == 0 /\ -__rho_8_^post30+__rho_8_^0 == 0 /\ i^0-i^post30 == 0 /\ a4444^0-a4444^post30 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post30 == 0 /\ 1-__rho_56_^0 <= 0 /\ -AsyncAddressData^post30+AsyncAddressData^0 == 0 /\ -k1^post30+k1^0 == 0 /\ a3737^0-a3737^post30 == 0 /\ IsochDetachData^0-IsochDetachData^post30 == 0 /\ a11^0-a11^post30 == 0 /\ -k2^post30+k2^0 == 0 /\ -a3131^post30+a3131^0 == 0 /\ -k4^post30+k4^0 == 0 /\ b3535^0-b3535^post30 == 0 /\ a2828^0-a2828^post30 == 0 /\ -__rho_10_^post30+__rho_10_^0 == 0 /\ -ret_IoSetDeviceInterfaceState44^post30+ret_IoSetDeviceInterfaceState44^0 == 0 /\ a3838^0-a3838^post30 == 0 /\ -a4343^post30+a4343^0 == 0 /\ -__rho_12_^post30+__rho_12_^0 == 0 /\ -Irp^post30+Irp^0 == 0 /\ b2626^0-b2626^post30 == 0 /\ __rho_4_^0-__rho_4_^post30 == 0 /\ __rho_2_^0-__rho_2_^post30 == 0 /\ -__rho_1_^post30+__rho_1_^0 == 0 /\ a77^0-a77^post30 == 0 /\ -i___02020^post30+i___02020^0 == 0 /\ -Irql^post30+Irql^0 == 0 /\ -keA^post30+keA^0 == 0 /\ i___01717^0-i___01717^post30 == 0 /\ b3333^0-b3333^post30 == 0 /\ pIrb^0-pIrb^post30 == 0 /\ -__rho_56_^post30+__rho_56_^0 == 0 /\ __rho_6_^0-__rho_6_^post30 == 0 /\ i___02424^0-i___02424^post30 == 0 /\ -b22^post30+b22^0 == 0 /\ keR^0-keR^post30 == 0 /\ __rho_9_^0-__rho_9_^post30 == 0 /\ a3232^0-a3232^post30 == 0 /\ -IsochResourceData^post30+IsochResourceData^0 == 0 /\ -__rho_11_^post30+__rho_11_^0 == 0 /\ -i___099^post30+i___099^0 == 0 /\ -CromData^post30+CromData^0 == 0 /\ -ret_IoAllocateIrp2727^post30+ret_IoAllocateIrp2727^0 == 0 /\ __rho_3_^0-__rho_3_^post30 == 0 /\ i___01313^0-i___01313^post30 == 0), cost: 1
New rule:
l24 -> l23 : k5^0'=-1+k5^0, -1+__rho_56_^0 >= 0, cost: 1

Applied preprocessing
Original rule:
l20 -> l24 : i___01717^0'=i___01717^post31, IsochDetachData^0'=IsochDetachData^post31, ntStatus^0'=ntStatus^post31, __rho_6_^0'=__rho_6_^post31, k5^0'=k5^post31, __rho_2_^0'=__rho_2_^post31, a3838^0'=a3838^post31, a2828^0'=a2828^post31, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post31, b3535^0'=b3535^post31, CromData^0'=CromData^post31, b2626^0'=b2626^post31, __rho_4_^0'=__rho_4_^post31, k2^0'=k2^post31, __rho_12_^0'=__rho_12_^post31, i___02424^0'=i___02424^post31, a11^0'=a11^post31, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post31, __rho_8_^0'=__rho_8_^post31, keR^0'=keR^post31, a4444^0'=a4444^post31, a3232^0'=a3232^post31, ResourceIrp^0'=ResourceIrp^post31, i___01313^0'=i___01313^post31, Irql^0'=Irql^post31, b3333^0'=b3333^post31, __rho_5_^0'=__rho_5_^post31, k4^0'=k4^post31, __rho_1_^0'=__rho_1_^post31, i___04646^0'=i___04646^post31, a2525^0'=a2525^post31, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post31, __rho_9_^0'=__rho_9_^post31, AsyncAddressData^0'=AsyncAddressData^post31, b22^0'=b22^post31, a3737^0'=a3737^post31, k1^0'=k1^post31, __rho_11_^0'=__rho_11_^post31, i___02020^0'=i___02020^post31, IsochResourceData^0'=IsochResourceData^post31, pIrb^0'=pIrb^post31, __rho_7_^0'=__rho_7_^post31, keA^0'=keA^post31, __rho_3_^0'=__rho_3_^post31, a4343^0'=a4343^post31, a3131^0'=a3131^post31, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post31, i^0'=i^post31, Irp^0'=Irp^post31, b2929^0'=b2929^post31, __rho_56_^0'=__rho_56_^post31, k3^0'=k3^post31, __rho_13_^0'=__rho_13_^post31, i___04040^0'=i___04040^post31, a1818^0'=a1818^post31, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post31, __rho_99_^0'=__rho_99_^post31, a77^0'=a77^post31, a3434^0'=a3434^post31, i___099^0'=i___099^post31, __rho_10_^0'=__rho_10_^post31, (0 == 0 /\ i___04040^0-i___04040^post31 == 0 /\ -k3^post31+k3^0 == 0 /\ a2828^0-a2828^post31 == 0 /\ a3838^0-a3838^post31 == 0 /\ -__rho_10_^post31+__rho_10_^0 == 0 /\ __rho_4_^0-__rho_4_^post31 == 0 /\ __rho_2_^0-__rho_2_^post31 == 0 /\ i___01717^0-i___01717^post31 == 0 /\ -a3434^post31+a3434^0 == 0 /\ k1^0-k1^post31 == 0 /\ -b2626^post31+b2626^0 == 0 /\ -__rho_99_^post31+__rho_99_^0 == 0 /\ -a11^post31+a11^0 == 0 /\ -a1818^post31+a1818^0 == 0 /\ __rho_6_^0-__rho_6_^post31 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post31 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post31+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ -ret_IoAllocateIrp2727^post31+ret_IoAllocateIrp2727^0 == 0 /\ -__rho_8_^post31+__rho_8_^0 == 0 /\ -IsochResourceData^post31+IsochResourceData^0 == 0 /\ keR^0-keR^post31 == 0 /\ -i^post31+i^0 == 0 /\ __rho_11_^0-__rho_11_^post31 == 0 /\ i___01313^0-i___01313^post31 == 0 /\ -a3131^post31+a3131^0 == 0 /\ pIrb^0-pIrb^post31 == 0 /\ CromData^0-CromData^post31 == 0 /\ -a3232^post31+a3232^0 == 0 /\ -ret_IoSetDeviceInterfaceState44^post31+ret_IoSetDeviceInterfaceState44^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post31 == 0 /\ -a4343^post31+a4343^0 == 0 /\ ntStatus^0-ntStatus^post31 == 0 /\ a2525^0-a2525^post31 == 0 /\ -AsyncAddressData^post31+AsyncAddressData^0 == 0 /\ -__rho_9_^post31+__rho_9_^0 == 0 /\ -b2929^post31+b2929^0 == 0 /\ -keA^post31+keA^0 == 0 /\ __rho_5_^0-__rho_5_^post31 == 0 /\ -__rho_1_^post31+__rho_1_^0 == 0 /\ k2^0-k2^post31 == 0 /\ -b3333^post31+b3333^0 == 0 /\ ResourceIrp^0-ResourceIrp^post31 == 0 /\ i___02020^0-i___02020^post31 == 0 /\ __rho_7_^0-__rho_7_^post31 == 0 /\ -b22^post31+b22^0 == 0 /\ a4444^0-a4444^post31 == 0 /\ 1-k5^0 <= 0 /\ -__rho_13_^post31+__rho_13_^0 == 0 /\ -__rho_3_^post31+__rho_3_^0 == 0 /\ a3737^0-a3737^post31 == 0 /\ __rho_12_^0-__rho_12_^post31 == 0 /\ -Irp^post31+Irp^0 == 0 /\ Irql^0-Irql^post31 == 0 /\ IsochDetachData^0-IsochDetachData^post31 == 0 /\ -i___02424^post31+i___02424^0 == 0 /\ k5^0-k5^post31 == 0 /\ -a77^post31+a77^0 == 0 /\ b3535^0-b3535^post31 == 0 /\ -i___04646^post31+i___04646^0 == 0 /\ k4^0-k4^post31 == 0 /\ -i___099^post31+i___099^0 == 0), cost: 1
New rule:
l20 -> l24 : __rho_56_^0'=__rho_56_^post31, -1+k5^0 >= 0, cost: 1

Applied preprocessing
Original rule:
l20 -> l25 : i___01717^0'=i___01717^post32, IsochDetachData^0'=IsochDetachData^post32, ntStatus^0'=ntStatus^post32, __rho_6_^0'=__rho_6_^post32, k5^0'=k5^post32, __rho_2_^0'=__rho_2_^post32, a3838^0'=a3838^post32, a2828^0'=a2828^post32, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post32, b3535^0'=b3535^post32, CromData^0'=CromData^post32, b2626^0'=b2626^post32, __rho_4_^0'=__rho_4_^post32, k2^0'=k2^post32, __rho_12_^0'=__rho_12_^post32, i___02424^0'=i___02424^post32, a11^0'=a11^post32, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post32, __rho_8_^0'=__rho_8_^post32, keR^0'=keR^post32, a4444^0'=a4444^post32, a3232^0'=a3232^post32, ResourceIrp^0'=ResourceIrp^post32, i___01313^0'=i___01313^post32, Irql^0'=Irql^post32, b3333^0'=b3333^post32, __rho_5_^0'=__rho_5_^post32, k4^0'=k4^post32, __rho_1_^0'=__rho_1_^post32, i___04646^0'=i___04646^post32, a2525^0'=a2525^post32, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post32, __rho_9_^0'=__rho_9_^post32, AsyncAddressData^0'=AsyncAddressData^post32, b22^0'=b22^post32, a3737^0'=a3737^post32, k1^0'=k1^post32, __rho_11_^0'=__rho_11_^post32, i___02020^0'=i___02020^post32, IsochResourceData^0'=IsochResourceData^post32, pIrb^0'=pIrb^post32, __rho_7_^0'=__rho_7_^post32, keA^0'=keA^post32, __rho_3_^0'=__rho_3_^post32, a4343^0'=a4343^post32, a3131^0'=a3131^post32, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post32, i^0'=i^post32, Irp^0'=Irp^post32, b2929^0'=b2929^post32, __rho_56_^0'=__rho_56_^post32, k3^0'=k3^post32, __rho_13_^0'=__rho_13_^post32, i___04040^0'=i___04040^post32, a1818^0'=a1818^post32, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post32, __rho_99_^0'=__rho_99_^post32, a77^0'=a77^post32, a3434^0'=a3434^post32, i___099^0'=i___099^post32, __rho_10_^0'=__rho_10_^post32, (-a3434^post32+a3434^0 == 0 /\ -__rho_10_^post32+__rho_10_^0 == 0 /\ -i^post32+i^0 == 0 /\ __rho_9_^0-__rho_9_^post32 == 0 /\ -pIrb^post32+pIrb^0 == 0 /\ CromData^0-CromData^post32 == 0 /\ k5^0 <= 0 /\ -1+keR^111 == 0 /\ -__rho_11_^post32+__rho_11_^0 == 0 /\ -k4^post32+k4^0 == 0 /\ -a3232^post32+a3232^0 == 0 /\ a4444^0-a4444^post32 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post32 == 0 /\ __rho_4_^0-__rho_4_^post32 == 0 /\ -__rho_8_^post32+__rho_8_^0 == 0 /\ __rho_7_^0-__rho_7_^post32 == 0 /\ b22^0-b22^post32 == 0 /\ -b2929^post32+b2929^0 == 0 /\ __rho_1_^0-__rho_1_^post32 == 0 /\ -__rho_99_^post32+__rho_99_^0 == 0 /\ -a1818^post32+a1818^0 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post32+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ a11^0-a11^post32 == 0 /\ i___02020^0-i___02020^post32 == 0 /\ k5^0-k5^post32 == 0 /\ keR^post32 == 0 /\ -a3737^post32+a3737^0 == 0 /\ ntStatus^0-ntStatus^post32 == 0 /\ b3333^0-b3333^post32 == 0 /\ b3535^0-b3535^post32 == 0 /\ IsochDetachData^0-IsochDetachData^post32 == 0 /\ -ret_IoAllocateIrp2727^post32+ret_IoAllocateIrp2727^0 == 0 /\ AsyncAddressData^0-AsyncAddressData^post32 == 0 /\ __rho_12_^0-__rho_12_^post32 == 0 /\ a2828^0-a2828^post32 == 0 /\ keR^220 == 0 /\ -i___04040^post32+i___04040^0 == 0 /\ a3131^0-a3131^post32 == 0 /\ ret_IoSetDeviceInterfaceState44^0-ret_IoSetDeviceInterfaceState44^post32 == 0 /\ -ret_ExAllocatePool3030^post32+ret_ExAllocatePool3030^0 == 0 /\ i___01313^0-i___01313^post32 == 0 /\ -Irp^post32+Irp^0 == 0 /\ -keA^post32+keA^0 == 0 /\ __rho_2_^0-__rho_2_^post32 == 0 /\ -IsochResourceData^post32+IsochResourceData^0 == 0 /\ a3838^0-a3838^post32 == 0 /\ b2626^0-b2626^post32 == 0 /\ -k2^post32+k2^0 == 0 /\ __rho_5_^0-__rho_5_^post32 == 0 /\ -ResourceIrp^post32+ResourceIrp^0 == 0 /\ -__rho_13_^post32+__rho_13_^0 == 0 /\ -Irql^0+i___04646^post32 == 0 /\ i___01717^0-i___01717^post32 == 0 /\ k1^0-k1^post32 == 0 /\ i___02424^0-i___02424^post32 == 0 /\ -__rho_3_^post32+__rho_3_^0 == 0 /\ -__rho_6_^post32+__rho_6_^0 == 0 /\ a2525^0-a2525^post32 == 0 /\ -__rho_56_^post32+__rho_56_^0 == 0 /\ Irql^0-Irql^post32 == 0 /\ -a77^post32+a77^0 == 0 /\ -1+keR^320 == 0 /\ -i___099^post32+i___099^0 == 0 /\ -k3^post32+k3^0 == 0 /\ a4343^0-a4343^post32 == 0), cost: 1
New rule:
l20 -> l25 : keR^0'=0, i___04646^0'=Irql^0, k5^0 <= 0, cost: 1

Applied preprocessing
Original rule:
l25 -> l26 : i___01717^0'=i___01717^post33, IsochDetachData^0'=IsochDetachData^post33, ntStatus^0'=ntStatus^post33, __rho_6_^0'=__rho_6_^post33, k5^0'=k5^post33, __rho_2_^0'=__rho_2_^post33, a3838^0'=a3838^post33, a2828^0'=a2828^post33, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post33, b3535^0'=b3535^post33, CromData^0'=CromData^post33, b2626^0'=b2626^post33, __rho_4_^0'=__rho_4_^post33, k2^0'=k2^post33, __rho_12_^0'=__rho_12_^post33, i___02424^0'=i___02424^post33, a11^0'=a11^post33, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post33, __rho_8_^0'=__rho_8_^post33, keR^0'=keR^post33, a4444^0'=a4444^post33, a3232^0'=a3232^post33, ResourceIrp^0'=ResourceIrp^post33, i___01313^0'=i___01313^post33, Irql^0'=Irql^post33, b3333^0'=b3333^post33, __rho_5_^0'=__rho_5_^post33, k4^0'=k4^post33, __rho_1_^0'=__rho_1_^post33, i___04646^0'=i___04646^post33, a2525^0'=a2525^post33, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post33, __rho_9_^0'=__rho_9_^post33, AsyncAddressData^0'=AsyncAddressData^post33, b22^0'=b22^post33, a3737^0'=a3737^post33, k1^0'=k1^post33, __rho_11_^0'=__rho_11_^post33, i___02020^0'=i___02020^post33, IsochResourceData^0'=IsochResourceData^post33, pIrb^0'=pIrb^post33, __rho_7_^0'=__rho_7_^post33, keA^0'=keA^post33, __rho_3_^0'=__rho_3_^post33, a4343^0'=a4343^post33, a3131^0'=a3131^post33, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post33, i^0'=i^post33, Irp^0'=Irp^post33, b2929^0'=b2929^post33, __rho_56_^0'=__rho_56_^post33, k3^0'=k3^post33, __rho_13_^0'=__rho_13_^post33, i___04040^0'=i___04040^post33, a1818^0'=a1818^post33, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post33, __rho_99_^0'=__rho_99_^post33, a77^0'=a77^post33, a3434^0'=a3434^post33, i___099^0'=i___099^post33, __rho_10_^0'=__rho_10_^post33, (-k1^post33+k1^0 == 0 /\ -b2929^post33+b2929^0 == 0 /\ __rho_8_^0-__rho_8_^post33 == 0 /\ k5^0-k5^post33 == 0 /\ b3333^0-b3333^post33 == 0 /\ -i___099^post33+i___099^0 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post33 == 0 /\ -__rho_99_^post33+__rho_99_^0 == 0 /\ -Irql^post33+Irql^0 == 0 /\ -i___04040^post33+i___04040^0 == 0 /\ -a4343^post33+a4343^0 == 0 /\ ret_t1394_SubmitIrpSynch3636^0-ret_t1394_SubmitIrpSynch3636^post33 == 0 /\ -__rho_12_^post33+__rho_12_^0 == 0 /\ a3737^0-a3737^post33 == 0 /\ -i___01313^post33+i___01313^0 == 0 /\ -AsyncAddressData^post33+AsyncAddressData^0 == 0 /\ a3838^0-a3838^post33 == 0 /\ ntStatus^0-ntStatus^post33 == 0 /\ b2626^0-b2626^post33 == 0 /\ -__rho_5_^post33+__rho_5_^0 == 0 /\ a2828^0-a2828^post33 == 0 /\ i^0-i^post33 == 0 /\ -__rho_7_^post33+__rho_7_^0 == 0 /\ a2525^0-a2525^post33 == 0 /\ IsochDetachData^0-IsochDetachData^post33 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post33 == 0 /\ -ret_IoSetDeviceInterfaceState44^post33+ret_IoSetDeviceInterfaceState44^0 == 0 /\ -__rho_56_^post33+__rho_56_^0 == 0 /\ -__rho_13_^post33+__rho_13_^0 == 0 /\ a4444^0-a4444^post33 == 0 /\ -a77^post33+a77^0 == 0 /\ a11^0-a11^post33 == 0 /\ -Irp^post33+Irp^0 == 0 /\ ResourceIrp^0-ResourceIrp^post33 == 0 /\ b22^0-b22^post33 == 0 /\ b3535^0-b3535^post33 == 0 /\ __rho_3_^0-__rho_3_^post33 == 0 /\ -__rho_11_^post33+__rho_11_^0 == 0 /\ -a3131^post33+a3131^0 == 0 /\ -i___02020^post33+i___02020^0 == 0 /\ -k4^post33+k4^0 == 0 /\ keR^0-keR^post33 == 0 /\ __rho_1_^0-__rho_1_^post33 == 0 /\ i___02424^0-i___02424^post33 == 0 /\ -a1818^post33+a1818^0 == 0 /\ __rho_2_^0-__rho_2_^post33 == 0 /\ __rho_4_^0-__rho_4_^post33 == 0 /\ -pIrb^post33+pIrb^0 == 0 /\ -a3434^post33+a3434^0 == 0 /\ -__rho_10_^post33+__rho_10_^0 == 0 /\ -k3^post33+k3^0 == 0 /\ -CromData^post33+CromData^0 == 0 /\ __rho_9_^0-__rho_9_^post33 == 0 /\ a3232^0-a3232^post33 == 0 /\ -keA^post33+keA^0 == 0 /\ -IsochResourceData^post33+IsochResourceData^0 == 0 /\ i___01717^0-i___01717^post33 == 0 /\ i___04646^0-i___04646^post33 == 0 /\ k2^0-k2^post33 == 0 /\ ret_IoAllocateIrp2727^0-ret_IoAllocateIrp2727^post33 == 0 /\ __rho_6_^0-__rho_6_^post33 == 0), cost: 1
New rule:
l25 -> l26 : TRUE, cost: 1

Applied preprocessing
Original rule:
l26 -> l25 : i___01717^0'=i___01717^post34, IsochDetachData^0'=IsochDetachData^post34, ntStatus^0'=ntStatus^post34, __rho_6_^0'=__rho_6_^post34, k5^0'=k5^post34, __rho_2_^0'=__rho_2_^post34, a3838^0'=a3838^post34, a2828^0'=a2828^post34, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post34, b3535^0'=b3535^post34, CromData^0'=CromData^post34, b2626^0'=b2626^post34, __rho_4_^0'=__rho_4_^post34, k2^0'=k2^post34, __rho_12_^0'=__rho_12_^post34, i___02424^0'=i___02424^post34, a11^0'=a11^post34, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post34, __rho_8_^0'=__rho_8_^post34, keR^0'=keR^post34, a4444^0'=a4444^post34, a3232^0'=a3232^post34, ResourceIrp^0'=ResourceIrp^post34, i___01313^0'=i___01313^post34, Irql^0'=Irql^post34, b3333^0'=b3333^post34, __rho_5_^0'=__rho_5_^post34, k4^0'=k4^post34, __rho_1_^0'=__rho_1_^post34, i___04646^0'=i___04646^post34, a2525^0'=a2525^post34, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post34, __rho_9_^0'=__rho_9_^post34, AsyncAddressData^0'=AsyncAddressData^post34, b22^0'=b22^post34, a3737^0'=a3737^post34, k1^0'=k1^post34, __rho_11_^0'=__rho_11_^post34, i___02020^0'=i___02020^post34, IsochResourceData^0'=IsochResourceData^post34, pIrb^0'=pIrb^post34, __rho_7_^0'=__rho_7_^post34, keA^0'=keA^post34, __rho_3_^0'=__rho_3_^post34, a4343^0'=a4343^post34, a3131^0'=a3131^post34, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post34, i^0'=i^post34, Irp^0'=Irp^post34, b2929^0'=b2929^post34, __rho_56_^0'=__rho_56_^post34, k3^0'=k3^post34, __rho_13_^0'=__rho_13_^post34, i___04040^0'=i___04040^post34, a1818^0'=a1818^post34, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post34, __rho_99_^0'=__rho_99_^post34, a77^0'=a77^post34, a3434^0'=a3434^post34, i___099^0'=i___099^post34, __rho_10_^0'=__rho_10_^post34, (-__rho_3_^post34+__rho_3_^0 == 0 /\ a2525^0-a2525^post34 == 0 /\ -a77^post34+a77^0 == 0 /\ -a1818^post34+a1818^0 == 0 /\ a3232^0-a3232^post34 == 0 /\ IsochDetachData^0-IsochDetachData^post34 == 0 /\ __rho_11_^0-__rho_11_^post34 == 0 /\ k1^0-k1^post34 == 0 /\ i___04646^0-i___04646^post34 == 0 /\ -ret_IoAllocateIrp2727^post34+ret_IoAllocateIrp2727^0 == 0 /\ __rho_6_^0-__rho_6_^post34 == 0 /\ -a3131^post34+a3131^0 == 0 /\ a11^0-a11^post34 == 0 /\ -IsochResourceData^post34+IsochResourceData^0 == 0 /\ ResourceIrp^0-ResourceIrp^post34 == 0 /\ b2626^0-b2626^post34 == 0 /\ -k2^post34+k2^0 == 0 /\ b3333^0-b3333^post34 == 0 /\ b3535^0-b3535^post34 == 0 /\ -k3^post34+k3^0 == 0 /\ k5^0-k5^post34 == 0 /\ b2929^0-b2929^post34 == 0 /\ __rho_13_^0-__rho_13_^post34 == 0 /\ -__rho_1_^post34+__rho_1_^0 == 0 /\ a4444^0-a4444^post34 == 0 /\ a3737^0-a3737^post34 == 0 /\ ntStatus^0-ntStatus^post34 == 0 /\ -__rho_99_^post34+__rho_99_^0 == 0 /\ -__rho_8_^post34+__rho_8_^0 == 0 /\ __rho_9_^0-__rho_9_^post34 == 0 /\ -__rho_56_^post34+__rho_56_^0 == 0 /\ -ret_t1394Diag_PnpStopDevice33^post34+ret_t1394Diag_PnpStopDevice33^0 == 0 /\ -AsyncAddressData^post34+AsyncAddressData^0 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post34+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ i___01717^0-i___01717^post34 == 0 /\ a2828^0-a2828^post34 == 0 /\ -__rho_7_^post34+__rho_7_^0 == 0 /\ -a4343^post34+a4343^0 == 0 /\ -i___099^post34+i___099^0 == 0 /\ -k4^post34+k4^0 == 0 /\ -i^post34+i^0 == 0 /\ -__rho_2_^post34+__rho_2_^0 == 0 /\ -i___04040^post34+i___04040^0 == 0 /\ -Irql^post34+Irql^0 == 0 /\ -__rho_10_^post34+__rho_10_^0 == 0 /\ keR^0-keR^post34 == 0 /\ -keA^post34+keA^0 == 0 /\ __rho_12_^0-__rho_12_^post34 == 0 /\ CromData^0-CromData^post34 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post34 == 0 /\ -Irp^post34+Irp^0 == 0 /\ i___01313^0-i___01313^post34 == 0 /\ -a3434^post34+a3434^0 == 0 /\ -ret_IoSetDeviceInterfaceState44^post34+ret_IoSetDeviceInterfaceState44^0 == 0 /\ pIrb^0-pIrb^post34 == 0 /\ -b22^post34+b22^0 == 0 /\ -__rho_5_^post34+__rho_5_^0 == 0 /\ i___02424^0-i___02424^post34 == 0 /\ __rho_4_^0-__rho_4_^post34 == 0 /\ -i___02020^post34+i___02020^0 == 0 /\ a3838^0-a3838^post34 == 0), cost: 1
New rule:
l26 -> l25 : TRUE, cost: 1

Applied preprocessing
Original rule:
l27 -> l15 : i___01717^0'=i___01717^post35, IsochDetachData^0'=IsochDetachData^post35, ntStatus^0'=ntStatus^post35, __rho_6_^0'=__rho_6_^post35, k5^0'=k5^post35, __rho_2_^0'=__rho_2_^post35, a3838^0'=a3838^post35, a2828^0'=a2828^post35, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post35, b3535^0'=b3535^post35, CromData^0'=CromData^post35, b2626^0'=b2626^post35, __rho_4_^0'=__rho_4_^post35, k2^0'=k2^post35, __rho_12_^0'=__rho_12_^post35, i___02424^0'=i___02424^post35, a11^0'=a11^post35, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post35, __rho_8_^0'=__rho_8_^post35, keR^0'=keR^post35, a4444^0'=a4444^post35, a3232^0'=a3232^post35, ResourceIrp^0'=ResourceIrp^post35, i___01313^0'=i___01313^post35, Irql^0'=Irql^post35, b3333^0'=b3333^post35, __rho_5_^0'=__rho_5_^post35, k4^0'=k4^post35, __rho_1_^0'=__rho_1_^post35, i___04646^0'=i___04646^post35, a2525^0'=a2525^post35, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post35, __rho_9_^0'=__rho_9_^post35, AsyncAddressData^0'=AsyncAddressData^post35, b22^0'=b22^post35, a3737^0'=a3737^post35, k1^0'=k1^post35, __rho_11_^0'=__rho_11_^post35, i___02020^0'=i___02020^post35, IsochResourceData^0'=IsochResourceData^post35, pIrb^0'=pIrb^post35, __rho_7_^0'=__rho_7_^post35, keA^0'=keA^post35, __rho_3_^0'=__rho_3_^post35, a4343^0'=a4343^post35, a3131^0'=a3131^post35, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post35, i^0'=i^post35, Irp^0'=Irp^post35, b2929^0'=b2929^post35, __rho_56_^0'=__rho_56_^post35, k3^0'=k3^post35, __rho_13_^0'=__rho_13_^post35, i___04040^0'=i___04040^post35, a1818^0'=a1818^post35, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post35, __rho_99_^0'=__rho_99_^post35, a77^0'=a77^post35, a3434^0'=a3434^post35, i___099^0'=i___099^post35, __rho_10_^0'=__rho_10_^post35, (-__rho_1_^post35+__rho_1_^0 == 0 /\ i___01313^0-i___01313^post35 == 0 /\ -__rho_13_^post35+__rho_13_^0 == 0 /\ -__rho_3_^post35+__rho_3_^0 == 0 /\ a3434^post35-ResourceIrp^0 == 0 /\ -pIrb^post35+pIrb^0 == 0 /\ a3232^post35-pIrb^0 == 0 /\ a2828^0-a2828^post35 == 0 /\ -b22^post35+b22^0 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post35 == 0 /\ __rho_11_^0-__rho_11_^post35 == 0 /\ i___04040^0-i___04040^post35 == 0 /\ -ret_IoAllocateIrp2727^post35+ret_IoAllocateIrp2727^0 == 0 /\ -a77^post35+a77^0 == 0 /\ -IsochResourceData^post35+IsochResourceData^0 == 0 /\ -a2525^post35+a2525^0 == 0 /\ i___01717^0-i___01717^post35 == 0 /\ i___04646^0-i___04646^post35 == 0 /\ -Irql^post35+Irql^0 == 0 /\ ret_t1394_SubmitIrpSynch3636^post35 == 0 /\ __rho_8_^0-__rho_8_^post35 == 0 /\ __rho_12_^0-__rho_12_^post35 == 0 /\ -k3^post35+k3^0 == 0 /\ b3333^post35 == 0 /\ -keR^post35+keR^0 == 0 /\ CromData^0-CromData^post35 == 0 /\ -__rho_99_^post35+__rho_99_^0 == 0 /\ -a11^post35+a11^0 == 0 /\ a3838^post35-ResourceIrp^0 == 0 /\ __rho_4_^0-__rho_4_^post35 == 0 /\ __rho_2_^0-__rho_2_^post35 == 0 /\ a4444^0-a4444^post35 == 0 /\ k1^0-k1^post35 == 0 /\ ntStatus^post35-ret_t1394_SubmitIrpSynch3636^post35 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post35 == 0 /\ -__rho_9_^post35+__rho_9_^0 == 0 /\ -a1818^post35+a1818^0 == 0 /\ -AsyncAddressData^post35+AsyncAddressData^0 == 0 /\ k2^0-k2^post35 == 0 /\ -a3131^post35+a3131^0 == 0 /\ -i^post35+i^0 == 0 /\ a4343^0-a4343^post35 == 0 /\ 1-pIrb^0 <= 0 /\ __rho_6_^0-__rho_6_^post35 == 0 /\ i___02424^0-i___02424^post35 == 0 /\ __rho_7_^0-__rho_7_^post35 == 0 /\ k4^0-k4^post35 == 0 /\ -pIrb^0+b3535^post35 == 0 /\ __rho_5_^0-__rho_5_^post35 == 0 /\ -__rho_56_^post35+__rho_56_^0 == 0 /\ -i___099^post35+i___099^0 == 0 /\ b2626^0-b2626^post35 == 0 /\ i___02020^0-i___02020^post35 == 0 /\ IsochDetachData^0-IsochDetachData^post35 == 0 /\ -ret_IoSetDeviceInterfaceState44^post35+ret_IoSetDeviceInterfaceState44^0 == 0 /\ -keA^post35+keA^0 == 0 /\ -__rho_10_^post35+__rho_10_^0 == 0 /\ -Irp^post35+Irp^0 == 0 /\ k5^0-k5^post35 == 0 /\ -ResourceIrp^post35+ResourceIrp^0 == 0 /\ -b2929^post35+b2929^0 == 0 /\ a3737^post35-pIrb^0 == 0), cost: 1
New rule:
l27 -> l15 : ntStatus^0'=0, a3838^0'=ResourceIrp^0, b3535^0'=pIrb^0, a3232^0'=pIrb^0, b3333^0'=0, a3737^0'=pIrb^0, ret_t1394_SubmitIrpSynch3636^0'=0, a3434^0'=ResourceIrp^0, -1+pIrb^0 >= 0, cost: 1

Applied preprocessing
Original rule:
l27 -> l15 : i___01717^0'=i___01717^post36, IsochDetachData^0'=IsochDetachData^post36, ntStatus^0'=ntStatus^post36, __rho_6_^0'=__rho_6_^post36, k5^0'=k5^post36, __rho_2_^0'=__rho_2_^post36, a3838^0'=a3838^post36, a2828^0'=a2828^post36, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post36, b3535^0'=b3535^post36, CromData^0'=CromData^post36, b2626^0'=b2626^post36, __rho_4_^0'=__rho_4_^post36, k2^0'=k2^post36, __rho_12_^0'=__rho_12_^post36, i___02424^0'=i___02424^post36, a11^0'=a11^post36, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post36, __rho_8_^0'=__rho_8_^post36, keR^0'=keR^post36, a4444^0'=a4444^post36, a3232^0'=a3232^post36, ResourceIrp^0'=ResourceIrp^post36, i___01313^0'=i___01313^post36, Irql^0'=Irql^post36, b3333^0'=b3333^post36, __rho_5_^0'=__rho_5_^post36, k4^0'=k4^post36, __rho_1_^0'=__rho_1_^post36, i___04646^0'=i___04646^post36, a2525^0'=a2525^post36, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post36, __rho_9_^0'=__rho_9_^post36, AsyncAddressData^0'=AsyncAddressData^post36, b22^0'=b22^post36, a3737^0'=a3737^post36, k1^0'=k1^post36, __rho_11_^0'=__rho_11_^post36, i___02020^0'=i___02020^post36, IsochResourceData^0'=IsochResourceData^post36, pIrb^0'=pIrb^post36, __rho_7_^0'=__rho_7_^post36, keA^0'=keA^post36, __rho_3_^0'=__rho_3_^post36, a4343^0'=a4343^post36, a3131^0'=a3131^post36, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post36, i^0'=i^post36, Irp^0'=Irp^post36, b2929^0'=b2929^post36, __rho_56_^0'=__rho_56_^post36, k3^0'=k3^post36, __rho_13_^0'=__rho_13_^post36, i___04040^0'=i___04040^post36, a1818^0'=a1818^post36, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post36, __rho_99_^0'=__rho_99_^post36, a77^0'=a77^post36, a3434^0'=a3434^post36, i___099^0'=i___099^post36, __rho_10_^0'=__rho_10_^post36, (a4444^0-a4444^post36 == 0 /\ -__rho_7_^post36+__rho_7_^0 == 0 /\ k2^0-k2^post36 == 0 /\ -__rho_1_^post36+__rho_1_^0 == 0 /\ -i^post36+i^0 == 0 /\ k5^0-k5^post36 == 0 /\ AsyncAddressData^0-AsyncAddressData^post36 == 0 /\ -Irp^post36+Irp^0 == 0 /\ k4^0-k4^post36 == 0 /\ -__rho_56_^post36+__rho_56_^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post36 == 0 /\ CromData^0-CromData^post36 == 0 /\ a11^0-a11^post36 == 0 /\ -ResourceIrp^post36+ResourceIrp^0 == 0 /\ -a77^post36+a77^0 == 0 /\ -i___04646^post36+i___04646^0 == 0 /\ -a3232^post36+a3232^0 == 0 /\ ret_IoSetDeviceInterfaceState44^0-ret_IoSetDeviceInterfaceState44^post36 == 0 /\ -b3333^post36+b3333^0 == 0 /\ -keR^post36+keR^0 == 0 /\ -i___04040^post36+i___04040^0 == 0 /\ i___02020^0-i___02020^post36 == 0 /\ -__rho_10_^post36+__rho_10_^0 == 0 /\ a2828^0-a2828^post36 == 0 /\ -a3737^post36+a3737^0 == 0 /\ __rho_12_^0-__rho_12_^post36 == 0 /\ -b22^post36+b22^0 == 0 /\ -ret_IoAllocateIrp2727^post36+ret_IoAllocateIrp2727^0 == 0 /\ -i___01313^post36+i___01313^0 == 0 /\ -ResourceIrp^0+a3131^post36 == 0 /\ __rho_2_^0-__rho_2_^post36 == 0 /\ -a3434^post36+a3434^0 == 0 /\ -IsochResourceData^post36+IsochResourceData^0 == 0 /\ __rho_6_^0-__rho_6_^post36 == 0 /\ __rho_11_^0-__rho_11_^post36 == 0 /\ -a2525^post36+a2525^0 == 0 /\ b3535^0-b3535^post36 == 0 /\ -__rho_3_^post36+__rho_3_^0 == 0 /\ pIrb^0 <= 0 /\ -ret_ExAllocatePool3030^post36+ret_ExAllocatePool3030^0 == 0 /\ a3838^0-a3838^post36 == 0 /\ keA^0-keA^post36 == 0 /\ -__rho_13_^post36+__rho_13_^0 == 0 /\ -k1^post36+k1^0 == 0 /\ Irql^0-Irql^post36 == 0 /\ IsochDetachData^0-IsochDetachData^post36 == 0 /\ __rho_4_^0-__rho_4_^post36 == 0 /\ -__rho_9_^post36+__rho_9_^0 == 0 /\ -pIrb^post36+pIrb^0 == 0 /\ -i___099^post36+i___099^0 == 0 /\ __rho_8_^0-__rho_8_^post36 == 0 /\ -ntStatus^post36+ntStatus^0 == 0 /\ -__rho_99_^post36+__rho_99_^0 == 0 /\ __rho_5_^0-__rho_5_^post36 == 0 /\ -b2929^post36+b2929^0 == 0 /\ b2626^0-b2626^post36 == 0 /\ i___02424^0-i___02424^post36 == 0 /\ -k3^post36+k3^0 == 0 /\ i___01717^0-i___01717^post36 == 0 /\ a4343^0-a4343^post36 == 0 /\ -a1818^post36+a1818^0 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post36+ret_t1394_SubmitIrpSynch3636^0 == 0), cost: 1
New rule:
l27 -> l15 : a3131^0'=ResourceIrp^0, pIrb^0 <= 0, cost: 1

Applied preprocessing
Original rule:
l28 -> l7 : i___01717^0'=i___01717^post37, IsochDetachData^0'=IsochDetachData^post37, ntStatus^0'=ntStatus^post37, __rho_6_^0'=__rho_6_^post37, k5^0'=k5^post37, __rho_2_^0'=__rho_2_^post37, a3838^0'=a3838^post37, a2828^0'=a2828^post37, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post37, b3535^0'=b3535^post37, CromData^0'=CromData^post37, b2626^0'=b2626^post37, __rho_4_^0'=__rho_4_^post37, k2^0'=k2^post37, __rho_12_^0'=__rho_12_^post37, i___02424^0'=i___02424^post37, a11^0'=a11^post37, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post37, __rho_8_^0'=__rho_8_^post37, keR^0'=keR^post37, a4444^0'=a4444^post37, a3232^0'=a3232^post37, ResourceIrp^0'=ResourceIrp^post37, i___01313^0'=i___01313^post37, Irql^0'=Irql^post37, b3333^0'=b3333^post37, __rho_5_^0'=__rho_5_^post37, k4^0'=k4^post37, __rho_1_^0'=__rho_1_^post37, i___04646^0'=i___04646^post37, a2525^0'=a2525^post37, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post37, __rho_9_^0'=__rho_9_^post37, AsyncAddressData^0'=AsyncAddressData^post37, b22^0'=b22^post37, a3737^0'=a3737^post37, k1^0'=k1^post37, __rho_11_^0'=__rho_11_^post37, i___02020^0'=i___02020^post37, IsochResourceData^0'=IsochResourceData^post37, pIrb^0'=pIrb^post37, __rho_7_^0'=__rho_7_^post37, keA^0'=keA^post37, __rho_3_^0'=__rho_3_^post37, a4343^0'=a4343^post37, a3131^0'=a3131^post37, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post37, i^0'=i^post37, Irp^0'=Irp^post37, b2929^0'=b2929^post37, __rho_56_^0'=__rho_56_^post37, k3^0'=k3^post37, __rho_13_^0'=__rho_13_^post37, i___04040^0'=i___04040^post37, a1818^0'=a1818^post37, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post37, __rho_99_^0'=__rho_99_^post37, a77^0'=a77^post37, a3434^0'=a3434^post37, i___099^0'=i___099^post37, __rho_10_^0'=__rho_10_^post37, (0 == 0 /\ a2828^0-a2828^post37 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post37+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ -Irql^post37+Irql^0 == 0 /\ -ret_IoAllocateIrp2727^post37+ret_IoAllocateIrp2727^0 == 0 /\ -ResourceIrp^post37+ResourceIrp^0 == 0 /\ -__rho_13_^post37+__rho_13_^0 == 0 /\ __rho_5_^0-__rho_5_^post37 == 0 /\ a4444^0-a4444^post37 == 0 /\ b3333^0-b3333^post37 == 0 /\ -a11^post37+a11^0 == 0 /\ -a77^post37+a77^0 == 0 /\ __rho_12_^0-__rho_12_^post37 == 0 /\ a4343^0-a4343^post37 == 0 /\ a2525^0-a2525^post37 == 0 /\ b22^0-b22^post37 == 0 /\ -__rho_3_^post37+__rho_3_^0 == 0 /\ -__rho_11_^post37+__rho_11_^0 == 0 /\ i___01313^0-i___01313^post37 == 0 /\ CromData^0-CromData^post37 == 0 /\ -__rho_99_^post37+__rho_99_^0 == 0 /\ a3838^0-a3838^post37 == 0 /\ -k3^post37+k3^0 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post37 == 0 /\ Irp^0-Irp^post37 == 0 /\ k4^0-k4^post37 == 0 /\ keA^230 == 0 /\ __rho_4_^0-__rho_4_^post37 == 0 /\ -b2929^post37+b2929^0 == 0 /\ b3535^0-b3535^post37 == 0 /\ -a3434^post37+a3434^0 == 0 /\ __rho_8_^0-__rho_8_^post37 == 0 /\ IsochDetachData^0-IsochDetachData^post37 == 0 /\ -__rho_7_^post37+__rho_7_^0 == 0 /\ -a3232^post37+a3232^0 == 0 /\ -b2626^post37+b2626^0 == 0 /\ -a1818^post37+a1818^0 == 0 /\ -i___099^post37+i___099^0 == 0 /\ i___02424^0-i___02424^post37 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post37 == 0 /\ -1+keA^13 == 0 /\ -i^post37+i^0 == 0 /\ -__rho_56_^post37+__rho_56_^0 == 0 /\ -keR^post37+keR^0 == 0 /\ -i___04646^post37+i___04646^0 == 0 /\ k2^0-k2^post37 == 0 /\ ret_IoSetDeviceInterfaceState44^post37 == 0 /\ __rho_1_^0-__rho_1_^post37 == 0 /\ -a3737^post37+a3737^0 == 0 /\ k5^0-k5^post37 == 0 /\ IsochResourceData^0-IsochResourceData^post37 == 0 /\ i___01717^0-i___01717^post37 == 0 /\ keA^post37 == 0 /\ AsyncAddressData^0-AsyncAddressData^post37 == 0 /\ -__rho_6_^post37+__rho_6_^0 == 0 /\ -pIrb^post37+pIrb^0 == 0 /\ -__rho_10_^post37+__rho_10_^0 == 0 /\ -i___04040^post37+i___04040^0 == 0 /\ -i___02020^post37+i___02020^0 == 0 /\ k1^post37-__rho_2_^post37 == 0 /\ -1+keA^330 == 0 /\ -__rho_9_^post37+__rho_9_^0 == 0 /\ -ret_IoSetDeviceInterfaceState44^post37+ntStatus^post37 == 0 /\ a3131^0-a3131^post37 == 0), cost: 1
New rule:
l28 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=__rho_2_^post37, keA^0'=0, 0 == 0, cost: 1

Applied preprocessing
Original rule:
l29 -> l27 : i___01717^0'=i___01717^post38, IsochDetachData^0'=IsochDetachData^post38, ntStatus^0'=ntStatus^post38, __rho_6_^0'=__rho_6_^post38, k5^0'=k5^post38, __rho_2_^0'=__rho_2_^post38, a3838^0'=a3838^post38, a2828^0'=a2828^post38, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post38, b3535^0'=b3535^post38, CromData^0'=CromData^post38, b2626^0'=b2626^post38, __rho_4_^0'=__rho_4_^post38, k2^0'=k2^post38, __rho_12_^0'=__rho_12_^post38, i___02424^0'=i___02424^post38, a11^0'=a11^post38, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post38, __rho_8_^0'=__rho_8_^post38, keR^0'=keR^post38, a4444^0'=a4444^post38, a3232^0'=a3232^post38, ResourceIrp^0'=ResourceIrp^post38, i___01313^0'=i___01313^post38, Irql^0'=Irql^post38, b3333^0'=b3333^post38, __rho_5_^0'=__rho_5_^post38, k4^0'=k4^post38, __rho_1_^0'=__rho_1_^post38, i___04646^0'=i___04646^post38, a2525^0'=a2525^post38, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post38, __rho_9_^0'=__rho_9_^post38, AsyncAddressData^0'=AsyncAddressData^post38, b22^0'=b22^post38, a3737^0'=a3737^post38, k1^0'=k1^post38, __rho_11_^0'=__rho_11_^post38, i___02020^0'=i___02020^post38, IsochResourceData^0'=IsochResourceData^post38, pIrb^0'=pIrb^post38, __rho_7_^0'=__rho_7_^post38, keA^0'=keA^post38, __rho_3_^0'=__rho_3_^post38, a4343^0'=a4343^post38, a3131^0'=a3131^post38, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post38, i^0'=i^post38, Irp^0'=Irp^post38, b2929^0'=b2929^post38, __rho_56_^0'=__rho_56_^post38, k3^0'=k3^post38, __rho_13_^0'=__rho_13_^post38, i___04040^0'=i___04040^post38, a1818^0'=a1818^post38, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post38, __rho_99_^0'=__rho_99_^post38, a77^0'=a77^post38, a3434^0'=a3434^post38, i___099^0'=i___099^post38, __rho_10_^0'=__rho_10_^post38, (-i___04040^post38+i___04040^0 == 0 /\ i___04646^0-i___04646^post38 == 0 /\ __rho_4_^0-__rho_4_^post38 == 0 /\ -IsochResourceData^post38+IsochResourceData^0 == 0 /\ ntStatus^0-ntStatus^post38 == 0 /\ -a3434^post38+a3434^0 == 0 /\ -__rho_5_^post38+__rho_5_^0 == 0 /\ a3232^0-a3232^post38 == 0 /\ b2626^0-b2626^post38 == 0 /\ -__rho_99_^post38+__rho_99_^0 == 0 /\ -b22^post38+b22^0 == 0 /\ k1^0-k1^post38 == 0 /\ -__rho_13_^post38+__rho_13_^0 == 0 /\ -a3131^post38+a3131^0 == 0 /\ a4444^0-a4444^post38 == 0 /\ -a11^post38+a11^0 == 0 /\ a3737^0-a3737^post38 == 0 /\ -a1818^post38+a1818^0 == 0 /\ -i___099^post38+i___099^0 == 0 /\ -ret_ExAllocatePool3030^post38+pIrb^post38 == 0 /\ IsochDetachData^0-IsochDetachData^post38 == 0 /\ i___01313^0-i___01313^post38 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post38+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ -k3^post38+k3^0 == 0 /\ keR^0-keR^post38 == 0 /\ -__rho_8_^post38+__rho_8_^0 == 0 /\ -k4^post38+k4^0 == 0 /\ b3535^0-b3535^post38 == 0 /\ -AsyncAddressData^post38+AsyncAddressData^0 == 0 /\ k5^0-k5^post38 == 0 /\ -ret_IoSetDeviceInterfaceState44^post38+ret_IoSetDeviceInterfaceState44^0 == 0 /\ -__rho_10_^post38+__rho_10_^0 == 0 /\ -Irp^post38+Irp^0 == 0 /\ k2^0-k2^post38 == 0 /\ ret_ExAllocatePool3030^post38 == 0 /\ __rho_2_^0-__rho_2_^post38 == 0 /\ -keA^post38+keA^0 == 0 /\ a77^0-a77^post38 == 0 /\ -__rho_1_^post38+__rho_1_^0 == 0 /\ -Irql^post38+Irql^0 == 0 /\ -1+a2828^post38 == 0 /\ i___01717^0-i___01717^post38 == 0 /\ -i___02424^post38+i___02424^0 == 0 /\ -i___02020^post38+i___02020^0 == 0 /\ -__rho_56_^post38+__rho_56_^0 == 0 /\ b3333^0-b3333^post38 == 0 /\ __rho_7_^0-__rho_7_^post38 == 0 /\ b2929^post38 == 0 /\ __rho_6_^0-__rho_6_^post38 == 0 /\ ResourceIrp^0-ResourceIrp^post38 == 0 /\ -__rho_3_^post38+__rho_3_^0 == 0 /\ a3838^0-a3838^post38 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post38 == 0 /\ __rho_9_^0-__rho_9_^post38 == 0 /\ -__rho_11_^post38+__rho_11_^0 == 0 /\ a2525^0-a2525^post38 == 0 /\ __rho_12_^0-__rho_12_^post38 == 0 /\ CromData^0-CromData^post38 == 0 /\ -i^post38+i^0 == 0 /\ -a4343^post38+a4343^0 == 0 /\ -ret_IoAllocateIrp2727^post38+ret_IoAllocateIrp2727^0 == 0), cost: 1
New rule:
l29 -> l27 : a2828^0'=1, ret_ExAllocatePool3030^0'=0, pIrb^0'=0, b2929^0'=0, TRUE, cost: 1

Applied preprocessing
Original rule:
l30 -> l29 : i___01717^0'=i___01717^post39, IsochDetachData^0'=IsochDetachData^post39, ntStatus^0'=ntStatus^post39, __rho_6_^0'=__rho_6_^post39, k5^0'=k5^post39, __rho_2_^0'=__rho_2_^post39, a3838^0'=a3838^post39, a2828^0'=a2828^post39, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post39, b3535^0'=b3535^post39, CromData^0'=CromData^post39, b2626^0'=b2626^post39, __rho_4_^0'=__rho_4_^post39, k2^0'=k2^post39, __rho_12_^0'=__rho_12_^post39, i___02424^0'=i___02424^post39, a11^0'=a11^post39, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post39, __rho_8_^0'=__rho_8_^post39, keR^0'=keR^post39, a4444^0'=a4444^post39, a3232^0'=a3232^post39, ResourceIrp^0'=ResourceIrp^post39, i___01313^0'=i___01313^post39, Irql^0'=Irql^post39, b3333^0'=b3333^post39, __rho_5_^0'=__rho_5_^post39, k4^0'=k4^post39, __rho_1_^0'=__rho_1_^post39, i___04646^0'=i___04646^post39, a2525^0'=a2525^post39, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post39, __rho_9_^0'=__rho_9_^post39, AsyncAddressData^0'=AsyncAddressData^post39, b22^0'=b22^post39, a3737^0'=a3737^post39, k1^0'=k1^post39, __rho_11_^0'=__rho_11_^post39, i___02020^0'=i___02020^post39, IsochResourceData^0'=IsochResourceData^post39, pIrb^0'=pIrb^post39, __rho_7_^0'=__rho_7_^post39, keA^0'=keA^post39, __rho_3_^0'=__rho_3_^post39, a4343^0'=a4343^post39, a3131^0'=a3131^post39, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post39, i^0'=i^post39, Irp^0'=Irp^post39, b2929^0'=b2929^post39, __rho_56_^0'=__rho_56_^post39, k3^0'=k3^post39, __rho_13_^0'=__rho_13_^post39, i___04040^0'=i___04040^post39, a1818^0'=a1818^post39, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post39, __rho_99_^0'=__rho_99_^post39, a77^0'=a77^post39, a3434^0'=a3434^post39, i___099^0'=i___099^post39, __rho_10_^0'=__rho_10_^post39, (-keR^post39+keR^0 == 0 /\ k2^0-k2^post39 == 0 /\ -Irql^post39+Irql^0 == 0 /\ __rho_2_^0-__rho_2_^post39 == 0 /\ i___01717^0-i___01717^post39 == 0 /\ __rho_8_^0-__rho_8_^post39 == 0 /\ -__rho_9_^post39+__rho_9_^0 == 0 /\ -a3434^post39+a3434^0 == 0 /\ -__rho_99_^post39+__rho_99_^0 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post39 == 0 /\ 1-ResourceIrp^0 <= 0 /\ __rho_6_^0-__rho_6_^post39 == 0 /\ __rho_7_^0-__rho_7_^post39 == 0 /\ -b22^post39+b22^0 == 0 /\ -__rho_5_^post39+__rho_5_^0 == 0 /\ __rho_11_^0-__rho_11_^post39 == 0 /\ -b2929^post39+b2929^0 == 0 /\ -a11^post39+a11^0 == 0 /\ -b3333^post39+b3333^0 == 0 /\ -a1818^post39+a1818^0 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post39+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ -a3232^post39+a3232^0 == 0 /\ __rho_12_^0-__rho_12_^post39 == 0 /\ CromData^0-CromData^post39 == 0 /\ i___04646^0-i___04646^post39 == 0 /\ AsyncAddressData^0-AsyncAddressData^post39 == 0 /\ -i___04040^post39+i___04040^0 == 0 /\ -ret_IoSetDeviceInterfaceState44^post39+ret_IoSetDeviceInterfaceState44^0 == 0 /\ a3131^0-a3131^post39 == 0 /\ -Irp^post39+Irp^0 == 0 /\ -__rho_10_^post39+__rho_10_^0 == 0 /\ __rho_4_^0-__rho_4_^post39 == 0 /\ -keA^post39+keA^0 == 0 /\ -a2525^post39+a2525^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post39 == 0 /\ b2626^0-b2626^post39 == 0 /\ -i___02020^post39+i___02020^0 == 0 /\ ntStatus^0-ntStatus^post39 == 0 /\ a4444^0-a4444^post39 == 0 /\ a3838^0-a3838^post39 == 0 /\ a3737^0-a3737^post39 == 0 /\ -ResourceIrp^post39+ResourceIrp^0 == 0 /\ -__rho_13_^post39+__rho_13_^0 == 0 /\ k4^0-k4^post39 == 0 /\ pIrb^0-pIrb^post39 == 0 /\ k1^0-k1^post39 == 0 /\ i___02424^0-i___02424^post39 == 0 /\ -__rho_3_^post39+__rho_3_^0 == 0 /\ -__rho_56_^post39+__rho_56_^0 == 0 /\ -__rho_1_^post39+__rho_1_^0 == 0 /\ -a77^post39+a77^0 == 0 /\ -k3^post39+k3^0 == 0 /\ i___01313^0-i___01313^post39 == 0 /\ -ret_IoAllocateIrp2727^post39+ret_IoAllocateIrp2727^0 == 0 /\ IsochDetachData^0-IsochDetachData^post39 == 0 /\ -IsochResourceData^post39+IsochResourceData^0 == 0 /\ k5^0-k5^post39 == 0 /\ b3535^0-b3535^post39 == 0 /\ a2828^0-a2828^post39 == 0 /\ -i___099^post39+i___099^0 == 0 /\ a4343^0-a4343^post39 == 0 /\ -i^post39+i^0 == 0), cost: 1
New rule:
l30 -> l29 : -1+ResourceIrp^0 >= 0, cost: 1

Applied preprocessing
Original rule:
l30 -> l29 : i___01717^0'=i___01717^post40, IsochDetachData^0'=IsochDetachData^post40, ntStatus^0'=ntStatus^post40, __rho_6_^0'=__rho_6_^post40, k5^0'=k5^post40, __rho_2_^0'=__rho_2_^post40, a3838^0'=a3838^post40, a2828^0'=a2828^post40, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post40, b3535^0'=b3535^post40, CromData^0'=CromData^post40, b2626^0'=b2626^post40, __rho_4_^0'=__rho_4_^post40, k2^0'=k2^post40, __rho_12_^0'=__rho_12_^post40, i___02424^0'=i___02424^post40, a11^0'=a11^post40, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post40, __rho_8_^0'=__rho_8_^post40, keR^0'=keR^post40, a4444^0'=a4444^post40, a3232^0'=a3232^post40, ResourceIrp^0'=ResourceIrp^post40, i___01313^0'=i___01313^post40, Irql^0'=Irql^post40, b3333^0'=b3333^post40, __rho_5_^0'=__rho_5_^post40, k4^0'=k4^post40, __rho_1_^0'=__rho_1_^post40, i___04646^0'=i___04646^post40, a2525^0'=a2525^post40, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post40, __rho_9_^0'=__rho_9_^post40, AsyncAddressData^0'=AsyncAddressData^post40, b22^0'=b22^post40, a3737^0'=a3737^post40, k1^0'=k1^post40, __rho_11_^0'=__rho_11_^post40, i___02020^0'=i___02020^post40, IsochResourceData^0'=IsochResourceData^post40, pIrb^0'=pIrb^post40, __rho_7_^0'=__rho_7_^post40, keA^0'=keA^post40, __rho_3_^0'=__rho_3_^post40, a4343^0'=a4343^post40, a3131^0'=a3131^post40, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post40, i^0'=i^post40, Irp^0'=Irp^post40, b2929^0'=b2929^post40, __rho_56_^0'=__rho_56_^post40, k3^0'=k3^post40, __rho_13_^0'=__rho_13_^post40, i___04040^0'=i___04040^post40, a1818^0'=a1818^post40, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post40, __rho_99_^0'=__rho_99_^post40, a77^0'=a77^post40, a3434^0'=a3434^post40, i___099^0'=i___099^post40, __rho_10_^0'=__rho_10_^post40, (-i___04646^post40+i___04646^0 == 0 /\ k5^0-k5^post40 == 0 /\ -__rho_99_^post40+__rho_99_^0 == 0 /\ k4^0-k4^post40 == 0 /\ -ResourceIrp^post40+ResourceIrp^0 == 0 /\ -i___04040^post40+i___04040^0 == 0 /\ -i___099^post40+i___099^0 == 0 /\ i___02424^0-i___02424^post40 == 0 /\ CromData^0-CromData^post40 == 0 /\ -a4343^post40+a4343^0 == 0 /\ -b2929^post40+b2929^0 == 0 /\ keR^0-keR^post40 == 0 /\ k3^0-k3^post40 == 0 /\ -__rho_9_^post40+__rho_9_^0 == 0 /\ -a3737^post40+a3737^0 == 0 /\ AsyncAddressData^0-AsyncAddressData^post40 == 0 /\ ret_IoSetDeviceInterfaceState44^0-ret_IoSetDeviceInterfaceState44^post40 == 0 /\ k2^0-k2^post40 == 0 /\ a2828^0-a2828^post40 == 0 /\ ntStatus^0-ntStatus^post40 == 0 /\ a3232^0-a3232^post40 == 0 /\ -ret_ExAllocatePool3030^post40+ret_ExAllocatePool3030^0 == 0 /\ -__rho_13_^post40+__rho_13_^0 == 0 /\ IsochDetachData^0-IsochDetachData^post40 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post40 == 0 /\ __rho_7_^0-__rho_7_^post40 == 0 /\ -i___01313^post40+i___01313^0 == 0 /\ -b3333^post40+b3333^0 == 0 /\ a4444^0-a4444^post40 == 0 /\ a11^0-a11^post40 == 0 /\ -__rho_56_^post40+__rho_56_^0 == 0 /\ Irql^0-Irql^post40 == 0 /\ -a77^post40+a77^0 == 0 /\ -Irp^post40+Irp^0 == 0 /\ -a2525^post40+a2525^0 == 0 /\ -__rho_3_^post40+__rho_3_^0 == 0 /\ -b22^post40+b22^0 == 0 /\ keA^0-keA^post40 == 0 /\ b3535^0-b3535^post40 == 0 /\ i___02020^0-i___02020^post40 == 0 /\ -__rho_11_^post40+__rho_11_^0 == 0 /\ -__rho_10_^post40+__rho_10_^0 == 0 /\ __rho_1_^0-__rho_1_^post40 == 0 /\ __rho_12_^0-__rho_12_^post40 == 0 /\ -a3838^post40+a3838^0 == 0 /\ __rho_2_^0-__rho_2_^post40 == 0 /\ -pIrb^post40+pIrb^0 == 0 /\ -a3434^post40+a3434^0 == 0 /\ -a1818^post40+a1818^0 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post40+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ -i^post40+i^0 == 0 /\ a3131^0-a3131^post40 == 0 /\ b2626^0-b2626^post40 == 0 /\ -IsochResourceData^post40+IsochResourceData^0 == 0 /\ __rho_4_^0-__rho_4_^post40 == 0 /\ -ret_IoAllocateIrp2727^post40+ret_IoAllocateIrp2727^0 == 0 /\ i___01717^0-i___01717^post40 == 0 /\ __rho_8_^0-__rho_8_^post40 == 0 /\ -k1^post40+k1^0 == 0 /\ __rho_6_^0-__rho_6_^post40 == 0 /\ __rho_5_^0-__rho_5_^post40 == 0 /\ 1+ResourceIrp^0 <= 0), cost: 1
New rule:
l30 -> l29 : 1+ResourceIrp^0 <= 0, cost: 1

Applied preprocessing
Original rule:
l30 -> l15 : i___01717^0'=i___01717^post41, IsochDetachData^0'=IsochDetachData^post41, ntStatus^0'=ntStatus^post41, __rho_6_^0'=__rho_6_^post41, k5^0'=k5^post41, __rho_2_^0'=__rho_2_^post41, a3838^0'=a3838^post41, a2828^0'=a2828^post41, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post41, b3535^0'=b3535^post41, CromData^0'=CromData^post41, b2626^0'=b2626^post41, __rho_4_^0'=__rho_4_^post41, k2^0'=k2^post41, __rho_12_^0'=__rho_12_^post41, i___02424^0'=i___02424^post41, a11^0'=a11^post41, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post41, __rho_8_^0'=__rho_8_^post41, keR^0'=keR^post41, a4444^0'=a4444^post41, a3232^0'=a3232^post41, ResourceIrp^0'=ResourceIrp^post41, i___01313^0'=i___01313^post41, Irql^0'=Irql^post41, b3333^0'=b3333^post41, __rho_5_^0'=__rho_5_^post41, k4^0'=k4^post41, __rho_1_^0'=__rho_1_^post41, i___04646^0'=i___04646^post41, a2525^0'=a2525^post41, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post41, __rho_9_^0'=__rho_9_^post41, AsyncAddressData^0'=AsyncAddressData^post41, b22^0'=b22^post41, a3737^0'=a3737^post41, k1^0'=k1^post41, __rho_11_^0'=__rho_11_^post41, i___02020^0'=i___02020^post41, IsochResourceData^0'=IsochResourceData^post41, pIrb^0'=pIrb^post41, __rho_7_^0'=__rho_7_^post41, keA^0'=keA^post41, __rho_3_^0'=__rho_3_^post41, a4343^0'=a4343^post41, a3131^0'=a3131^post41, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post41, i^0'=i^post41, Irp^0'=Irp^post41, b2929^0'=b2929^post41, __rho_56_^0'=__rho_56_^post41, k3^0'=k3^post41, __rho_13_^0'=__rho_13_^post41, i___04040^0'=i___04040^post41, a1818^0'=a1818^post41, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post41, __rho_99_^0'=__rho_99_^post41, a77^0'=a77^post41, a3434^0'=a3434^post41, i___099^0'=i___099^post41, __rho_10_^0'=__rho_10_^post41, (-__rho_56_^post41+__rho_56_^0 == 0 /\ -__rho_3_^post41+__rho_3_^0 == 0 /\ keR^0-keR^post41 == 0 /\ -k1^post41+k1^0 == 0 /\ -b2929^post41+b2929^0 == 0 /\ k5^0-k5^post41 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post41+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ -a4444^post41+a4444^0 == 0 /\ -pIrb^post41+pIrb^0 == 0 /\ ret_IoSetDeviceInterfaceState44^0-ret_IoSetDeviceInterfaceState44^post41 == 0 /\ -ResourceIrp^0 <= 0 /\ -a4343^post41+a4343^0 == 0 /\ CromData^0-CromData^post41 == 0 /\ -i___01313^post41+i___01313^0 == 0 /\ -__rho_11_^post41+__rho_11_^0 == 0 /\ __rho_5_^0-__rho_5_^post41 == 0 /\ i___02424^0-i___02424^post41 == 0 /\ ntStatus^0-ntStatus^post41 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post41 == 0 /\ __rho_4_^0-__rho_4_^post41 == 0 /\ k3^0-k3^post41 == 0 /\ -i___099^post41+i___099^0 == 0 /\ -i___04040^post41+i___04040^0 == 0 /\ a3232^0-a3232^post41 == 0 /\ -Irp^post41+Irp^0 == 0 /\ -__rho_10_^post41+__rho_10_^0 == 0 /\ IsochDetachData^0-IsochDetachData^post41 == 0 /\ a11^0-a11^post41 == 0 /\ -a2525^post41+a2525^0 == 0 /\ ResourceIrp^0 <= 0 /\ a2828^0-a2828^post41 == 0 /\ -a3434^post41+a3434^0 == 0 /\ k2^0-k2^post41 == 0 /\ -__rho_13_^post41+__rho_13_^0 == 0 /\ __rho_8_^0-__rho_8_^post41 == 0 /\ -k4^post41+k4^0 == 0 /\ -a77^post41+a77^0 == 0 /\ -a1818^post41+a1818^0 == 0 /\ -__rho_9_^post41+__rho_9_^0 == 0 /\ __rho_12_^0-__rho_12_^post41 == 0 /\ b3535^0-b3535^post41 == 0 /\ b3333^0-b3333^post41 == 0 /\ -i___04646^post41+i___04646^0 == 0 /\ -__rho_7_^post41+__rho_7_^0 == 0 /\ -ret_IoAllocateIrp2727^post41+ret_IoAllocateIrp2727^0 == 0 /\ a3838^0-a3838^post41 == 0 /\ -ret_ExAllocatePool3030^post41+ret_ExAllocatePool3030^0 == 0 /\ __rho_2_^0-__rho_2_^post41 == 0 /\ -i^post41+i^0 == 0 /\ IsochResourceData^0-IsochResourceData^post41 == 0 /\ i___01717^0-i___01717^post41 == 0 /\ __rho_1_^0-__rho_1_^post41 == 0 /\ AsyncAddressData^0-AsyncAddressData^post41 == 0 /\ -a3737^post41+a3737^0 == 0 /\ Irql^0-Irql^post41 == 0 /\ a3131^0-a3131^post41 == 0 /\ __rho_6_^0-__rho_6_^post41 == 0 /\ -b22^post41+b22^0 == 0 /\ -__rho_99_^post41+__rho_99_^0 == 0 /\ ResourceIrp^0-ResourceIrp^post41 == 0 /\ b2626^0-b2626^post41 == 0 /\ -i___02020^post41+i___02020^0 == 0 /\ keA^0-keA^post41 == 0), cost: 1
New rule:
l30 -> l15 : ResourceIrp^0 == 0, cost: 1

Applied preprocessing
Original rule:
l31 -> l15 : i___01717^0'=i___01717^post42, IsochDetachData^0'=IsochDetachData^post42, ntStatus^0'=ntStatus^post42, __rho_6_^0'=__rho_6_^post42, k5^0'=k5^post42, __rho_2_^0'=__rho_2_^post42, a3838^0'=a3838^post42, a2828^0'=a2828^post42, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post42, b3535^0'=b3535^post42, CromData^0'=CromData^post42, b2626^0'=b2626^post42, __rho_4_^0'=__rho_4_^post42, k2^0'=k2^post42, __rho_12_^0'=__rho_12_^post42, i___02424^0'=i___02424^post42, a11^0'=a11^post42, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post42, __rho_8_^0'=__rho_8_^post42, keR^0'=keR^post42, a4444^0'=a4444^post42, a3232^0'=a3232^post42, ResourceIrp^0'=ResourceIrp^post42, i___01313^0'=i___01313^post42, Irql^0'=Irql^post42, b3333^0'=b3333^post42, __rho_5_^0'=__rho_5_^post42, k4^0'=k4^post42, __rho_1_^0'=__rho_1_^post42, i___04646^0'=i___04646^post42, a2525^0'=a2525^post42, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post42, __rho_9_^0'=__rho_9_^post42, AsyncAddressData^0'=AsyncAddressData^post42, b22^0'=b22^post42, a3737^0'=a3737^post42, k1^0'=k1^post42, __rho_11_^0'=__rho_11_^post42, i___02020^0'=i___02020^post42, IsochResourceData^0'=IsochResourceData^post42, pIrb^0'=pIrb^post42, __rho_7_^0'=__rho_7_^post42, keA^0'=keA^post42, __rho_3_^0'=__rho_3_^post42, a4343^0'=a4343^post42, a3131^0'=a3131^post42, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post42, i^0'=i^post42, Irp^0'=Irp^post42, b2929^0'=b2929^post42, __rho_56_^0'=__rho_56_^post42, k3^0'=k3^post42, __rho_13_^0'=__rho_13_^post42, i___04040^0'=i___04040^post42, a1818^0'=a1818^post42, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post42, __rho_99_^0'=__rho_99_^post42, a77^0'=a77^post42, a3434^0'=a3434^post42, i___099^0'=i___099^post42, __rho_10_^0'=__rho_10_^post42, (__rho_5_^0-__rho_5_^post42 == 0 /\ a3131^0-a3131^post42 == 0 /\ -ret_ExAllocatePool3030^post42+ret_ExAllocatePool3030^0 == 0 /\ Irp^0-Irp^post42 == 0 /\ -ret_IoAllocateIrp2727^post42+ret_IoAllocateIrp2727^0 == 0 /\ a11^0-a11^post42 == 0 /\ -__rho_13_^post42+__rho_13_^0 == 0 /\ __rho_6_^0-__rho_6_^post42 == 0 /\ b3535^0-b3535^post42 == 0 /\ b22^0-b22^post42 == 0 /\ -a4444^post42+a4444^0 == 0 /\ b2626^0-b2626^post42 == 0 /\ __rho_1_^0-__rho_1_^post42 == 0 /\ i___02424^0-i___02424^post42 == 0 /\ -a77^post42+a77^0 == 0 /\ __rho_56_^0-__rho_56_^post42 == 0 /\ keR^0-keR^post42 == 0 /\ -k3^post42+k3^0 == 0 /\ -__rho_99_^post42+__rho_99_^0 == 0 /\ i___01717^0-i___01717^post42 == 0 /\ -k1^post42+k1^0 == 0 /\ __rho_8_^0-__rho_8_^post42 == 0 /\ -i___099^post42+i___099^0 == 0 /\ -a4343^post42+a4343^0 == 0 /\ -a1818^post42+a1818^0 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post42+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ -a3434^post42+a3434^0 == 0 /\ a2525^0-a2525^post42 == 0 /\ -i^post42+i^0 == 0 /\ i___04646^0-i___04646^post42 == 0 /\ -__rho_7_^post42+__rho_7_^0 == 0 /\ k5^0-k5^post42 == 0 /\ IsochResourceData^0 <= 0 /\ a2828^0-a2828^post42 == 0 /\ -k4^post42+k4^0 == 0 /\ b3333^0-b3333^post42 == 0 /\ a3232^0-a3232^post42 == 0 /\ Irql^0-Irql^post42 == 0 /\ -__rho_11_^post42+__rho_11_^0 == 0 /\ IsochDetachData^0-IsochDetachData^post42 == 0 /\ -pIrb^post42+pIrb^0 == 0 /\ __rho_2_^0-__rho_2_^post42 == 0 /\ __rho_12_^0-__rho_12_^post42 == 0 /\ -__rho_3_^post42+__rho_3_^0 == 0 /\ -i___02020^post42+i___02020^0 == 0 /\ -__rho_10_^post42+__rho_10_^0 == 0 /\ -i___04040^post42+i___04040^0 == 0 /\ IsochResourceData^0-IsochResourceData^post42 == 0 /\ k2^0-k2^post42 == 0 /\ -AsyncAddressData^post42+AsyncAddressData^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post42 == 0 /\ ntStatus^0-ntStatus^post42 == 0 /\ ResourceIrp^0-ResourceIrp^post42 == 0 /\ ret_IoSetDeviceInterfaceState44^0-ret_IoSetDeviceInterfaceState44^post42 == 0 /\ -__rho_4_^post42+__rho_4_^0 == 0 /\ keA^0-keA^post42 == 0 /\ -b2929^post42+b2929^0 == 0 /\ -i___01313^post42+i___01313^0 == 0 /\ -__rho_9_^post42+__rho_9_^0 == 0 /\ -a3838^post42+a3838^0 == 0 /\ CromData^0-CromData^post42 == 0 /\ -a3737^post42+a3737^0 == 0), cost: 1
New rule:
l31 -> l15 : IsochResourceData^0 <= 0, cost: 1

Applied preprocessing
Original rule:
l31 -> l30 : i___01717^0'=i___01717^post43, IsochDetachData^0'=IsochDetachData^post43, ntStatus^0'=ntStatus^post43, __rho_6_^0'=__rho_6_^post43, k5^0'=k5^post43, __rho_2_^0'=__rho_2_^post43, a3838^0'=a3838^post43, a2828^0'=a2828^post43, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post43, b3535^0'=b3535^post43, CromData^0'=CromData^post43, b2626^0'=b2626^post43, __rho_4_^0'=__rho_4_^post43, k2^0'=k2^post43, __rho_12_^0'=__rho_12_^post43, i___02424^0'=i___02424^post43, a11^0'=a11^post43, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post43, __rho_8_^0'=__rho_8_^post43, keR^0'=keR^post43, a4444^0'=a4444^post43, a3232^0'=a3232^post43, ResourceIrp^0'=ResourceIrp^post43, i___01313^0'=i___01313^post43, Irql^0'=Irql^post43, b3333^0'=b3333^post43, __rho_5_^0'=__rho_5_^post43, k4^0'=k4^post43, __rho_1_^0'=__rho_1_^post43, i___04646^0'=i___04646^post43, a2525^0'=a2525^post43, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post43, __rho_9_^0'=__rho_9_^post43, AsyncAddressData^0'=AsyncAddressData^post43, b22^0'=b22^post43, a3737^0'=a3737^post43, k1^0'=k1^post43, __rho_11_^0'=__rho_11_^post43, i___02020^0'=i___02020^post43, IsochResourceData^0'=IsochResourceData^post43, pIrb^0'=pIrb^post43, __rho_7_^0'=__rho_7_^post43, keA^0'=keA^post43, __rho_3_^0'=__rho_3_^post43, a4343^0'=a4343^post43, a3131^0'=a3131^post43, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post43, i^0'=i^post43, Irp^0'=Irp^post43, b2929^0'=b2929^post43, __rho_56_^0'=__rho_56_^post43, k3^0'=k3^post43, __rho_13_^0'=__rho_13_^post43, i___04040^0'=i___04040^post43, a1818^0'=a1818^post43, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=__rho_99_^post43, a77^0'=a77^post43, a3434^0'=a3434^post43, i___099^0'=i___099^post43, __rho_10_^0'=__rho_10_^post43, (0 == 0 /\ ntStatus^0-ntStatus^post43 == 0 /\ b2929^0-b2929^post43 == 0 /\ k5^0-k5^post43 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post43 == 0 /\ -a3232^post43+a3232^0 == 0 /\ IsochDetachData^0-IsochDetachData^post43 == 0 /\ keR^0-keR^post43 == 0 /\ -k1^post43+k1^0 == 0 /\ -__rho_8_^post43+__rho_8_^0 == 0 /\ __rho_4_^0-__rho_4_^post43 == 0 /\ -i___04040^post43+i___04040^0 == 0 /\ -i___099^post43+i___099^0 == 0 /\ ret_t1394_SubmitIrpSynch3636^0-ret_t1394_SubmitIrpSynch3636^post43 == 0 /\ -AsyncAddressData^post43+AsyncAddressData^0 == 0 /\ -a4343^post43+a4343^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post43 == 0 /\ -b22^post43+b22^0 == 0 /\ -__rho_5_^post43+__rho_5_^0 == 0 /\ a2828^0-a2828^post43 == 0 /\ b2626^post43 == 0 /\ -__rho_13_^post43+__rho_13_^0 == 0 /\ a11^0-a11^post43 == 0 /\ -Irp^post43+Irp^0 == 0 /\ __rho_11_^0-__rho_11_^post43 == 0 /\ -keA^post43+keA^0 == 0 /\ b3535^0-b3535^post43 == 0 /\ -a1818^post43+a1818^0 == 0 /\ ResourceIrp^post43-ret_IoAllocateIrp2727^post43 == 0 /\ __rho_12_^0-__rho_12_^post43 == 0 /\ -a77^post43+a77^0 == 0 /\ i___01717^0-i___01717^post43 == 0 /\ -ret_IoSetDeviceInterfaceState44^post43+ret_IoSetDeviceInterfaceState44^0 == 0 /\ -k2^post43+k2^0 == 0 /\ a3737^0-a3737^post43 == 0 /\ -__rho_99_^post43+ret_IoAllocateIrp2727^post43 == 0 /\ -__rho_1_^post43+__rho_1_^0 == 0 /\ -a3131^post43+a3131^0 == 0 /\ -1+a2525^post43 == 0 /\ -k3^post43+k3^0 == 0 /\ 1-IsochResourceData^0 <= 0 /\ -__rho_10_^post43+__rho_10_^0 == 0 /\ -i___02020^post43+i___02020^0 == 0 /\ __rho_2_^0-__rho_2_^post43 == 0 /\ a3838^0-a3838^post43 == 0 /\ i___01313^0-i___01313^post43 == 0 /\ __rho_7_^0-__rho_7_^post43 == 0 /\ -a3434^post43+a3434^0 == 0 /\ a4444^0-a4444^post43 == 0 /\ -__rho_9_^post43+__rho_9_^0 == 0 /\ -CromData^post43+CromData^0 == 0 /\ -i^post43+i^0 == 0 /\ i___02424^0-i___02424^post43 == 0 /\ k4^0-k4^post43 == 0 /\ -IsochResourceData^post43+IsochResourceData^0 == 0 /\ __rho_6_^0-__rho_6_^post43 == 0 /\ -i___04646^post43+i___04646^0 == 0 /\ -__rho_56_^post43+__rho_56_^0 == 0 /\ -__rho_3_^post43+__rho_3_^0 == 0 /\ Irql^0-Irql^post43 == 0 /\ -b3333^post43+b3333^0 == 0), cost: 1
New rule:
l31 -> l30 : b2626^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, a2525^0'=1, pIrb^0'=pIrb^post43, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, -1+IsochResourceData^0 >= 0, cost: 1

Applied preprocessing
Original rule:
l16 -> l19 : i___01717^0'=i___01717^post44, IsochDetachData^0'=IsochDetachData^post44, ntStatus^0'=ntStatus^post44, __rho_6_^0'=__rho_6_^post44, k5^0'=k5^post44, __rho_2_^0'=__rho_2_^post44, a3838^0'=a3838^post44, a2828^0'=a2828^post44, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post44, b3535^0'=b3535^post44, CromData^0'=CromData^post44, b2626^0'=b2626^post44, __rho_4_^0'=__rho_4_^post44, k2^0'=k2^post44, __rho_12_^0'=__rho_12_^post44, i___02424^0'=i___02424^post44, a11^0'=a11^post44, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post44, __rho_8_^0'=__rho_8_^post44, keR^0'=keR^post44, a4444^0'=a4444^post44, a3232^0'=a3232^post44, ResourceIrp^0'=ResourceIrp^post44, i___01313^0'=i___01313^post44, Irql^0'=Irql^post44, b3333^0'=b3333^post44, __rho_5_^0'=__rho_5_^post44, k4^0'=k4^post44, __rho_1_^0'=__rho_1_^post44, i___04646^0'=i___04646^post44, a2525^0'=a2525^post44, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post44, __rho_9_^0'=__rho_9_^post44, AsyncAddressData^0'=AsyncAddressData^post44, b22^0'=b22^post44, a3737^0'=a3737^post44, k1^0'=k1^post44, __rho_11_^0'=__rho_11_^post44, i___02020^0'=i___02020^post44, IsochResourceData^0'=IsochResourceData^post44, pIrb^0'=pIrb^post44, __rho_7_^0'=__rho_7_^post44, keA^0'=keA^post44, __rho_3_^0'=__rho_3_^post44, a4343^0'=a4343^post44, a3131^0'=a3131^post44, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post44, i^0'=i^post44, Irp^0'=Irp^post44, b2929^0'=b2929^post44, __rho_56_^0'=__rho_56_^post44, k3^0'=k3^post44, __rho_13_^0'=__rho_13_^post44, i___04040^0'=i___04040^post44, a1818^0'=a1818^post44, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post44, __rho_99_^0'=__rho_99_^post44, a77^0'=a77^post44, a3434^0'=a3434^post44, i___099^0'=i___099^post44, __rho_10_^0'=__rho_10_^post44, (0 == 0 /\ -1+keA^340 == 0 /\ -a11^post44+a11^0 == 0 /\ __rho_4_^0-__rho_4_^post44 == 0 /\ -1+keR^120 == 0 /\ keR^230 == 0 /\ a2828^0-a2828^post44 == 0 /\ -1+keR^330 == 0 /\ i___01717^0-i___01717^post44 == 0 /\ -1+keA^14 == 0 /\ Irp^0-Irp^post44 == 0 /\ -ret_IoAllocateIrp2727^post44+ret_IoAllocateIrp2727^0 == 0 /\ Irql^0-Irql^post44 == 0 /\ -__rho_5_^post44+__rho_5_^0 == 0 /\ -__rho_99_^post44+__rho_99_^0 == 0 /\ pIrb^0-pIrb^post44 == 0 /\ -a4343^post44+a4343^0 == 0 /\ -k3^post44+k3^0 == 0 /\ -__rho_56_^post44+__rho_56_^0 == 0 /\ CromData^0-CromData^post44 == 0 /\ -a77^post44+a77^0 == 0 /\ a2525^0-a2525^post44 == 0 /\ -a3232^post44+a3232^0 == 0 /\ ret_t1394_SubmitIrpSynch3636^0-ret_t1394_SubmitIrpSynch3636^post44 == 0 /\ -__rho_7_^post44+__rho_7_^0 == 0 /\ keR^post44 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post44 == 0 /\ i^0-i^post44 == 0 /\ __rho_11_^0-__rho_11_^post44 == 0 /\ __rho_12_^0-__rho_12_^post44 == 0 /\ __rho_2_^0-__rho_2_^post44 == 0 /\ k4^0 <= 0 /\ -__rho_9_^post44+__rho_9_^0 == 0 /\ -a3434^post44+a3434^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post44 == 0 /\ a3838^0-a3838^post44 == 0 /\ -ResourceIrp^post44+ResourceIrp^0 == 0 /\ -i___02020^post44+i___02020^0 == 0 /\ b2626^0-b2626^post44 == 0 /\ IsochDetachData^0-IsochDetachData^post44 == 0 /\ a3737^0-a3737^post44 == 0 /\ b3333^0-b3333^post44 == 0 /\ k2^0-k2^post44 == 0 /\ keA^240 == 0 /\ -__rho_1_^post44+__rho_1_^0 == 0 /\ -i___099^post44+i___099^0 == 0 /\ -ret_IoSetDeviceInterfaceState44^post44+ret_IoSetDeviceInterfaceState44^0 == 0 /\ -__rho_3_^post44+__rho_3_^0 == 0 /\ -k1^post44+k1^0 == 0 /\ -__rho_13_^post44+k5^post44 == 0 /\ __rho_6_^0-__rho_6_^post44 == 0 /\ -b22^post44+b22^0 == 0 /\ -IsochResourceData^post44+IsochResourceData^0 == 0 /\ -a3131^post44+a3131^0 == 0 /\ i___04040^post44-Irql^0 == 0 /\ keA^post44 == 0 /\ b3535^0-b3535^post44 == 0 /\ __rho_8_^0-__rho_8_^post44 == 0 /\ k4^0-k4^post44 == 0 /\ i___02424^0-i___02424^post44 == 0 /\ -i___04646^post44+i___04646^0 == 0 /\ -a4444^post44+a4444^0 == 0 /\ -__rho_10_^post44+__rho_10_^0 == 0 /\ -AsyncAddressData^post44+AsyncAddressData^0 == 0 /\ ntStatus^0-ntStatus^post44 == 0 /\ -b2929^post44+b2929^0 == 0 /\ i___01313^0-i___01313^post44 == 0 /\ -a1818^post44+a1818^0 == 0), cost: 1
New rule:
l16 -> l19 : k5^0'=k5^post44, keR^0'=0, keA^0'=0, __rho_13_^0'=k5^post44, i___04040^0'=Irql^0, k4^0 <= 0, cost: 1

Applied preprocessing
Original rule:
l16 -> l31 : i___01717^0'=i___01717^post45, IsochDetachData^0'=IsochDetachData^post45, ntStatus^0'=ntStatus^post45, __rho_6_^0'=__rho_6_^post45, k5^0'=k5^post45, __rho_2_^0'=__rho_2_^post45, a3838^0'=a3838^post45, a2828^0'=a2828^post45, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post45, b3535^0'=b3535^post45, CromData^0'=CromData^post45, b2626^0'=b2626^post45, __rho_4_^0'=__rho_4_^post45, k2^0'=k2^post45, __rho_12_^0'=__rho_12_^post45, i___02424^0'=i___02424^post45, a11^0'=a11^post45, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post45, __rho_8_^0'=__rho_8_^post45, keR^0'=keR^post45, a4444^0'=a4444^post45, a3232^0'=a3232^post45, ResourceIrp^0'=ResourceIrp^post45, i___01313^0'=i___01313^post45, Irql^0'=Irql^post45, b3333^0'=b3333^post45, __rho_5_^0'=__rho_5_^post45, k4^0'=k4^post45, __rho_1_^0'=__rho_1_^post45, i___04646^0'=i___04646^post45, a2525^0'=a2525^post45, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post45, __rho_9_^0'=__rho_9_^post45, AsyncAddressData^0'=AsyncAddressData^post45, b22^0'=b22^post45, a3737^0'=a3737^post45, k1^0'=k1^post45, __rho_11_^0'=__rho_11_^post45, i___02020^0'=i___02020^post45, IsochResourceData^0'=IsochResourceData^post45, pIrb^0'=pIrb^post45, __rho_7_^0'=__rho_7_^post45, keA^0'=keA^post45, __rho_3_^0'=__rho_3_^post45, a4343^0'=a4343^post45, a3131^0'=a3131^post45, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post45, i^0'=i^post45, Irp^0'=Irp^post45, b2929^0'=b2929^post45, __rho_56_^0'=__rho_56_^post45, k3^0'=k3^post45, __rho_13_^0'=__rho_13_^post45, i___04040^0'=i___04040^post45, a1818^0'=a1818^post45, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post45, __rho_99_^0'=__rho_99_^post45, a77^0'=a77^post45, a3434^0'=a3434^post45, i___099^0'=i___099^post45, __rho_10_^0'=__rho_10_^post45, (0 == 0 /\ -__rho_5_^post45+__rho_5_^0 == 0 /\ a3838^0-a3838^post45 == 0 /\ 1-k4^0 <= 0 /\ -b3333^post45+b3333^0 == 0 /\ -a4343^post45+a4343^0 == 0 /\ i___02424^post45-Irql^0 == 0 /\ -i___04040^post45+i___04040^0 == 0 /\ IsochDetachData^0-IsochDetachData^post45 == 0 /\ -AsyncAddressData^post45+AsyncAddressData^0 == 0 /\ -b2929^post45+b2929^0 == 0 /\ -__rho_56_^post45+__rho_56_^0 == 0 /\ -keA^post45+keA^0 == 0 /\ Irp^0-Irp^post45 == 0 /\ -b2626^post45+b2626^0 == 0 /\ __rho_6_^0-__rho_6_^post45 == 0 /\ k5^0-k5^post45 == 0 /\ ret_t1394_SubmitIrpSynch3636^0-ret_t1394_SubmitIrpSynch3636^post45 == 0 /\ b3535^0-b3535^post45 == 0 /\ keR^post45 == 0 /\ -a77^post45+a77^0 == 0 /\ IsochResourceData^post45-__rho_12_^post45 == 0 /\ pIrb^0-pIrb^post45 == 0 /\ -ret_IoAllocateIrp2727^post45+ret_IoAllocateIrp2727^0 == 0 /\ -__rho_13_^post45+__rho_13_^0 == 0 /\ -i^post45+i^0 == 0 /\ -__rho_8_^post45+__rho_8_^0 == 0 /\ __rho_4_^0-__rho_4_^post45 == 0 /\ __rho_11_^0-__rho_11_^post45 == 0 /\ i___01313^0-i___01313^post45 == 0 /\ -__rho_9_^post45+__rho_9_^0 == 0 /\ -a3232^post45+a3232^0 == 0 /\ -1+keR^121 == 0 /\ -b22^post45+b22^0 == 0 /\ -k3^post45+k3^0 == 0 /\ -__rho_1_^post45+__rho_1_^0 == 0 /\ a3737^0-a3737^post45 == 0 /\ -a3434^post45+a3434^0 == 0 /\ a2525^0-a2525^post45 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post45 == 0 /\ a2828^0-a2828^post45 == 0 /\ i___04646^0-i___04646^post45 == 0 /\ i___01717^0-i___01717^post45 == 0 /\ -__rho_10_^post45+__rho_10_^0 == 0 /\ -i___02020^post45+i___02020^0 == 0 /\ CromData^0-CromData^post45 == 0 /\ -__rho_99_^post45+__rho_99_^0 == 0 /\ -i___099^post45+i___099^0 == 0 /\ -a11^post45+a11^0 == 0 /\ __rho_3_^0-__rho_3_^post45 == 0 /\ k2^0-k2^post45 == 0 /\ -ret_IoSetDeviceInterfaceState44^post45+ret_IoSetDeviceInterfaceState44^0 == 0 /\ -a1818^post45+a1818^0 == 0 /\ ResourceIrp^0-ResourceIrp^post45 == 0 /\ 1-k4^0+k4^post45 == 0 /\ Irql^0-Irql^post45 == 0 /\ -__rho_7_^post45+__rho_7_^0 == 0 /\ ntStatus^0-ntStatus^post45 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post45 == 0 /\ __rho_2_^0-__rho_2_^post45 == 0 /\ keR^240 == 0 /\ -k1^post45+k1^0 == 0 /\ -a3131^post45+a3131^0 == 0 /\ -1+keR^340 == 0 /\ a4444^0-a4444^post45 == 0), cost: 1
New rule:
l16 -> l31 : __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, k4^0'=-1+k4^0, IsochResourceData^0'=__rho_12_^post45, -1+k4^0 >= 0, cost: 1

Applied preprocessing
Original rule:
l32 -> l28 : i___01717^0'=i___01717^post46, IsochDetachData^0'=IsochDetachData^post46, ntStatus^0'=ntStatus^post46, __rho_6_^0'=__rho_6_^post46, k5^0'=k5^post46, __rho_2_^0'=__rho_2_^post46, a3838^0'=a3838^post46, a2828^0'=a2828^post46, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post46, b3535^0'=b3535^post46, CromData^0'=CromData^post46, b2626^0'=b2626^post46, __rho_4_^0'=__rho_4_^post46, k2^0'=k2^post46, __rho_12_^0'=__rho_12_^post46, i___02424^0'=i___02424^post46, a11^0'=a11^post46, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post46, __rho_8_^0'=__rho_8_^post46, keR^0'=keR^post46, a4444^0'=a4444^post46, a3232^0'=a3232^post46, ResourceIrp^0'=ResourceIrp^post46, i___01313^0'=i___01313^post46, Irql^0'=Irql^post46, b3333^0'=b3333^post46, __rho_5_^0'=__rho_5_^post46, k4^0'=k4^post46, __rho_1_^0'=__rho_1_^post46, i___04646^0'=i___04646^post46, a2525^0'=a2525^post46, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post46, __rho_9_^0'=__rho_9_^post46, AsyncAddressData^0'=AsyncAddressData^post46, b22^0'=b22^post46, a3737^0'=a3737^post46, k1^0'=k1^post46, __rho_11_^0'=__rho_11_^post46, i___02020^0'=i___02020^post46, IsochResourceData^0'=IsochResourceData^post46, pIrb^0'=pIrb^post46, __rho_7_^0'=__rho_7_^post46, keA^0'=keA^post46, __rho_3_^0'=__rho_3_^post46, a4343^0'=a4343^post46, a3131^0'=a3131^post46, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post46, i^0'=i^post46, Irp^0'=Irp^post46, b2929^0'=b2929^post46, __rho_56_^0'=__rho_56_^post46, k3^0'=k3^post46, __rho_13_^0'=__rho_13_^post46, i___04040^0'=i___04040^post46, a1818^0'=a1818^post46, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post46, __rho_99_^0'=__rho_99_^post46, a77^0'=a77^post46, a3434^0'=a3434^post46, i___099^0'=i___099^post46, __rho_10_^0'=__rho_10_^post46, (i___01313^0-i___01313^post46 == 0 /\ -__rho_3_^post46+__rho_3_^0 == 0 /\ -b3333^post46+b3333^0 == 0 /\ __rho_8_^0-__rho_8_^post46 == 0 /\ -b2929^post46+b2929^0 == 0 /\ -a77^post46+a77^0 == 0 /\ -__rho_9_^post46+__rho_9_^0 == 0 /\ -__rho_5_^post46+__rho_5_^0 == 0 /\ -i^post46+i^0 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post46+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ -a3232^post46+a3232^0 == 0 /\ __rho_2_^0-__rho_2_^post46 == 0 /\ -i___04040^post46+i___04040^0 == 0 /\ -i___099^post46+i___099^0 == 0 /\ i___01717^0-i___01717^post46 == 0 /\ -Irp^post46+Irp^0 == 0 /\ -ret_IoSetDeviceInterfaceState44^post46+ret_IoSetDeviceInterfaceState44^0 == 0 /\ __rho_12_^0-__rho_12_^post46 == 0 /\ CromData^0-CromData^post46 == 0 /\ -a2525^post46+a2525^0 == 0 /\ AsyncAddressData^0-AsyncAddressData^post46 == 0 /\ __rho_11_^0-__rho_11_^post46 == 0 /\ pIrb^0-pIrb^post46 == 0 /\ __rho_6_^0-__rho_6_^post46 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post46 == 0 /\ -a3434^post46+a3434^0 == 0 /\ i___04646^0-i___04646^post46 == 0 /\ __rho_1_^0 <= 0 /\ -__rho_99_^post46+__rho_99_^0 == 0 /\ a3838^0-a3838^post46 == 0 /\ -__rho_13_^post46+__rho_13_^0 == 0 /\ a3737^0-a3737^post46 == 0 /\ -__rho_56_^post46+__rho_56_^0 == 0 /\ k5^0-k5^post46 == 0 /\ -b22^post46+b22^0 == 0 /\ -b3535^post46+b3535^0 == 0 /\ k4^0-k4^post46 == 0 /\ -a3131^post46+a3131^0 == 0 /\ -a1818^post46+a1818^0 == 0 /\ a4343^0-a4343^post46 == 0 /\ k1^0-k1^post46 == 0 /\ -k3^post46+k3^0 == 0 /\ __rho_7_^0-__rho_7_^post46 == 0 /\ i___02424^0-i___02424^post46 == 0 /\ -IsochResourceData^post46+IsochResourceData^0 == 0 /\ __rho_4_^0-__rho_4_^post46 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post46 == 0 /\ -ret_IoAllocateIrp2727^post46+ret_IoAllocateIrp2727^0 == 0 /\ b2626^0-b2626^post46 == 0 /\ -__rho_10_^post46+__rho_10_^0 == 0 /\ -keR^post46+keR^0 == 0 /\ Irql^0-Irql^post46 == 0 /\ -keA^post46+keA^0 == 0 /\ IsochDetachData^0-IsochDetachData^post46 == 0 /\ a2828^0-a2828^post46 == 0 /\ -__rho_1_^post46+__rho_1_^0 == 0 /\ -ResourceIrp^post46+ResourceIrp^0 == 0 /\ k2^0-k2^post46 == 0 /\ -a11^post46+a11^0 == 0 /\ a4444^0-a4444^post46 == 0 /\ ntStatus^0-ntStatus^post46 == 0 /\ i___02020^0-i___02020^post46 == 0), cost: 1
New rule:
l32 -> l28 : __rho_1_^0 <= 0, cost: 1

Applied preprocessing
Original rule:
l32 -> l28 : i___01717^0'=i___01717^post47, IsochDetachData^0'=IsochDetachData^post47, ntStatus^0'=ntStatus^post47, __rho_6_^0'=__rho_6_^post47, k5^0'=k5^post47, __rho_2_^0'=__rho_2_^post47, a3838^0'=a3838^post47, a2828^0'=a2828^post47, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post47, b3535^0'=b3535^post47, CromData^0'=CromData^post47, b2626^0'=b2626^post47, __rho_4_^0'=__rho_4_^post47, k2^0'=k2^post47, __rho_12_^0'=__rho_12_^post47, i___02424^0'=i___02424^post47, a11^0'=a11^post47, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post47, __rho_8_^0'=__rho_8_^post47, keR^0'=keR^post47, a4444^0'=a4444^post47, a3232^0'=a3232^post47, ResourceIrp^0'=ResourceIrp^post47, i___01313^0'=i___01313^post47, Irql^0'=Irql^post47, b3333^0'=b3333^post47, __rho_5_^0'=__rho_5_^post47, k4^0'=k4^post47, __rho_1_^0'=__rho_1_^post47, i___04646^0'=i___04646^post47, a2525^0'=a2525^post47, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post47, __rho_9_^0'=__rho_9_^post47, AsyncAddressData^0'=AsyncAddressData^post47, b22^0'=b22^post47, a3737^0'=a3737^post47, k1^0'=k1^post47, __rho_11_^0'=__rho_11_^post47, i___02020^0'=i___02020^post47, IsochResourceData^0'=IsochResourceData^post47, pIrb^0'=pIrb^post47, __rho_7_^0'=__rho_7_^post47, keA^0'=keA^post47, __rho_3_^0'=__rho_3_^post47, a4343^0'=a4343^post47, a3131^0'=a3131^post47, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post47, i^0'=i^post47, Irp^0'=Irp^post47, b2929^0'=b2929^post47, __rho_56_^0'=__rho_56_^post47, k3^0'=k3^post47, __rho_13_^0'=__rho_13_^post47, i___04040^0'=i___04040^post47, a1818^0'=a1818^post47, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post47, __rho_99_^0'=__rho_99_^post47, a77^0'=a77^post47, a3434^0'=a3434^post47, i___099^0'=i___099^post47, __rho_10_^0'=__rho_10_^post47, (-__rho_1_^post47+__rho_1_^0 == 0 /\ -__rho_56_^post47+__rho_56_^0 == 0 /\ keR^0-keR^post47 == 0 /\ 1-__rho_1_^0 <= 0 /\ -b3333^post47+b3333^0 == 0 /\ -b2929^post47+b2929^0 == 0 /\ k5^0-k5^post47 == 0 /\ -IsochResourceData^post47+IsochResourceData^0 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post47+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ -a4444^post47+a4444^0 == 0 /\ CromData^0-CromData^post47 == 0 /\ -ret_t1394Diag_PnpStopDevice33^post47+ntStatus^post47 == 0 /\ -1+a11^post47 == 0 /\ -__rho_3_^post47+__rho_3_^0 == 0 /\ -a4343^post47+a4343^0 == 0 /\ i___02424^0-i___02424^post47 == 0 /\ -k1^post47+k1^0 == 0 /\ k4^0-k4^post47 == 0 /\ -i___01313^post47+i___01313^0 == 0 /\ -a77^post47+a77^0 == 0 /\ k3^0-k3^post47 == 0 /\ -i___04646^post47+i___04646^0 == 0 /\ a3232^0-a3232^post47 == 0 /\ -__rho_10_^post47+__rho_10_^0 == 0 /\ -i___04040^post47+i___04040^0 == 0 /\ IsochDetachData^0-IsochDetachData^post47 == 0 /\ -a2525^post47+a2525^0 == 0 /\ Irql^0-Irql^post47 == 0 /\ -Irp^post47+Irp^0 == 0 /\ ret_IoSetDeviceInterfaceState44^0-ret_IoSetDeviceInterfaceState44^post47 == 0 /\ -a3434^post47+a3434^0 == 0 /\ a2828^0-a2828^post47 == 0 /\ k2^0-k2^post47 == 0 /\ -__rho_4_^post47+__rho_4_^0 == 0 /\ -i^post47+i^0 == 0 /\ -__rho_13_^post47+__rho_13_^0 == 0 /\ i___099^0-i___099^post47 == 0 /\ -a1818^post47+a1818^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^post47 == 0 /\ __rho_8_^0-__rho_8_^post47 == 0 /\ b3535^0-b3535^post47 == 0 /\ __rho_5_^0-__rho_5_^post47 == 0 /\ -ret_ExAllocatePool3030^post47+ret_ExAllocatePool3030^0 == 0 /\ __rho_11_^0-__rho_11_^post47 == 0 /\ i___02020^0-i___02020^post47 == 0 /\ a3838^0-a3838^post47 == 0 /\ __rho_7_^0-__rho_7_^post47 == 0 /\ -ret_IoAllocateIrp2727^post47+ret_IoAllocateIrp2727^0 == 0 /\ __rho_2_^0-__rho_2_^post47 == 0 /\ i___01717^0-i___01717^post47 == 0 /\ b22^post47-Irp^0 == 0 /\ AsyncAddressData^0-AsyncAddressData^post47 == 0 /\ __rho_12_^0-__rho_12_^post47 == 0 /\ -__rho_99_^post47+__rho_99_^0 == 0 /\ __rho_6_^0-__rho_6_^post47 == 0 /\ -keA^post47+keA^0 == 0 /\ -a3737^post47+a3737^0 == 0 /\ -pIrb^post47+pIrb^0 == 0 /\ ResourceIrp^0-ResourceIrp^post47 == 0 /\ b2626^0-b2626^post47 == 0 /\ -__rho_9_^post47+__rho_9_^0 == 0 /\ a3131^0-a3131^post47 == 0), cost: 1
New rule:
l32 -> l28 : ntStatus^0'=0, ret_t1394Diag_PnpStopDevice33^0'=0, a11^0'=1, b22^0'=Irp^0, -1+__rho_1_^0 >= 0, cost: 1

Applied preprocessing
Original rule:
l11 -> l15 : i___01717^0'=i___01717^post48, IsochDetachData^0'=IsochDetachData^post48, ntStatus^0'=ntStatus^post48, __rho_6_^0'=__rho_6_^post48, k5^0'=k5^post48, __rho_2_^0'=__rho_2_^post48, a3838^0'=a3838^post48, a2828^0'=a2828^post48, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post48, b3535^0'=b3535^post48, CromData^0'=CromData^post48, b2626^0'=b2626^post48, __rho_4_^0'=__rho_4_^post48, k2^0'=k2^post48, __rho_12_^0'=__rho_12_^post48, i___02424^0'=i___02424^post48, a11^0'=a11^post48, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post48, __rho_8_^0'=__rho_8_^post48, keR^0'=keR^post48, a4444^0'=a4444^post48, a3232^0'=a3232^post48, ResourceIrp^0'=ResourceIrp^post48, i___01313^0'=i___01313^post48, Irql^0'=Irql^post48, b3333^0'=b3333^post48, __rho_5_^0'=__rho_5_^post48, k4^0'=k4^post48, __rho_1_^0'=__rho_1_^post48, i___04646^0'=i___04646^post48, a2525^0'=a2525^post48, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post48, __rho_9_^0'=__rho_9_^post48, AsyncAddressData^0'=AsyncAddressData^post48, b22^0'=b22^post48, a3737^0'=a3737^post48, k1^0'=k1^post48, __rho_11_^0'=__rho_11_^post48, i___02020^0'=i___02020^post48, IsochResourceData^0'=IsochResourceData^post48, pIrb^0'=pIrb^post48, __rho_7_^0'=__rho_7_^post48, keA^0'=keA^post48, __rho_3_^0'=__rho_3_^post48, a4343^0'=a4343^post48, a3131^0'=a3131^post48, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post48, i^0'=i^post48, Irp^0'=Irp^post48, b2929^0'=b2929^post48, __rho_56_^0'=__rho_56_^post48, k3^0'=k3^post48, __rho_13_^0'=__rho_13_^post48, i___04040^0'=i___04040^post48, a1818^0'=a1818^post48, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post48, __rho_99_^0'=__rho_99_^post48, a77^0'=a77^post48, a3434^0'=a3434^post48, i___099^0'=i___099^post48, __rho_10_^0'=__rho_10_^post48, (0 == 0 /\ a3838^0-a3838^post48 == 0 /\ i^0-i^post48 == 0 /\ keR^250 == 0 /\ __rho_56_^0-__rho_56_^post48 == 0 /\ i___04646^0-i___04646^post48 == 0 /\ -a77^post48+a77^0 == 0 /\ -keA^post48+keA^0 == 0 /\ a3737^0-a3737^post48 == 0 /\ -__rho_99_^post48+__rho_99_^0 == 0 /\ -i___04040^post48+i___04040^0 == 0 /\ -__rho_11_^post48+k4^post48 == 0 /\ -1+keR^122 == 0 /\ -b2626^post48+b2626^0 == 0 /\ __rho_3_^0-__rho_3_^post48 == 0 /\ -__rho_5_^post48+__rho_5_^0 == 0 /\ a2828^0-a2828^post48 == 0 /\ k5^0-k5^post48 == 0 /\ -a11^post48+a11^0 == 0 /\ -a3131^post48+a3131^0 == 0 /\ -a3434^post48+a3434^0 == 0 /\ __rho_8_^0-__rho_8_^post48 == 0 /\ keR^post48 == 0 /\ i___01313^0-i___01313^post48 == 0 /\ __rho_2_^0-__rho_2_^post48 == 0 /\ -Irql^post48+Irql^0 == 0 /\ -1+keR^350 == 0 /\ -b3333^post48+b3333^0 == 0 /\ -i___099^post48+i___099^0 == 0 /\ __rho_4_^0-__rho_4_^post48 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post48 == 0 /\ -AsyncAddressData^post48+AsyncAddressData^0 == 0 /\ -b2929^post48+b2929^0 == 0 /\ -a1818^post48+a1818^0 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post48+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ -ResourceIrp^post48+ResourceIrp^0 == 0 /\ a4444^0-a4444^post48 == 0 /\ -i___02424^post48+i___02424^0 == 0 /\ __rho_6_^0-__rho_6_^post48 == 0 /\ -IsochResourceData^post48+IsochResourceData^0 == 0 /\ ntStatus^0-ntStatus^post48 == 0 /\ -ret_IoSetDeviceInterfaceState44^post48+ret_IoSetDeviceInterfaceState44^0 == 0 /\ i___02020^post48-Irql^0 == 0 /\ -__rho_1_^post48+__rho_1_^0 == 0 /\ a2525^0-a2525^post48 == 0 /\ -a3232^post48+a3232^0 == 0 /\ -__rho_13_^post48+__rho_13_^0 == 0 /\ b3535^0-b3535^post48 == 0 /\ -__rho_10_^post48+__rho_10_^0 == 0 /\ k2^0-k2^post48 == 0 /\ IsochDetachData^0-IsochDetachData^post48 == 0 /\ -Irp^post48+Irp^0 == 0 /\ -k1^post48+k1^0 == 0 /\ pIrb^0-pIrb^post48 == 0 /\ -k3^post48+k3^0 == 0 /\ -a4343^post48+a4343^0 == 0 /\ k3^0 <= 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post48 == 0 /\ -__rho_7_^post48+__rho_7_^0 == 0 /\ b22^0-b22^post48 == 0 /\ __rho_12_^0-__rho_12_^post48 == 0 /\ __rho_9_^0-__rho_9_^post48 == 0 /\ CromData^0-CromData^post48 == 0 /\ ret_IoAllocateIrp2727^0-ret_IoAllocateIrp2727^post48 == 0 /\ i___01717^0-i___01717^post48 == 0), cost: 1
New rule:
l11 -> l15 : keR^0'=0, k4^0'=k4^post48, __rho_11_^0'=k4^post48, i___02020^0'=Irql^0, k3^0 <= 0, cost: 1

Applied preprocessing
Original rule:
l11 -> l10 : i___01717^0'=i___01717^post49, IsochDetachData^0'=IsochDetachData^post49, ntStatus^0'=ntStatus^post49, __rho_6_^0'=__rho_6_^post49, k5^0'=k5^post49, __rho_2_^0'=__rho_2_^post49, a3838^0'=a3838^post49, a2828^0'=a2828^post49, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post49, b3535^0'=b3535^post49, CromData^0'=CromData^post49, b2626^0'=b2626^post49, __rho_4_^0'=__rho_4_^post49, k2^0'=k2^post49, __rho_12_^0'=__rho_12_^post49, i___02424^0'=i___02424^post49, a11^0'=a11^post49, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post49, __rho_8_^0'=__rho_8_^post49, keR^0'=keR^post49, a4444^0'=a4444^post49, a3232^0'=a3232^post49, ResourceIrp^0'=ResourceIrp^post49, i___01313^0'=i___01313^post49, Irql^0'=Irql^post49, b3333^0'=b3333^post49, __rho_5_^0'=__rho_5_^post49, k4^0'=k4^post49, __rho_1_^0'=__rho_1_^post49, i___04646^0'=i___04646^post49, a2525^0'=a2525^post49, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post49, __rho_9_^0'=__rho_9_^post49, AsyncAddressData^0'=AsyncAddressData^post49, b22^0'=b22^post49, a3737^0'=a3737^post49, k1^0'=k1^post49, __rho_11_^0'=__rho_11_^post49, i___02020^0'=i___02020^post49, IsochResourceData^0'=IsochResourceData^post49, pIrb^0'=pIrb^post49, __rho_7_^0'=__rho_7_^post49, keA^0'=keA^post49, __rho_3_^0'=__rho_3_^post49, a4343^0'=a4343^post49, a3131^0'=a3131^post49, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post49, i^0'=i^post49, Irp^0'=Irp^post49, b2929^0'=b2929^post49, __rho_56_^0'=__rho_56_^post49, k3^0'=k3^post49, __rho_13_^0'=__rho_13_^post49, i___04040^0'=i___04040^post49, a1818^0'=a1818^post49, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post49, __rho_99_^0'=__rho_99_^post49, a77^0'=a77^post49, a3434^0'=a3434^post49, i___099^0'=i___099^post49, __rho_10_^0'=__rho_10_^post49, (0 == 0 /\ a1818^post49-IsochDetachData^post49 == 0 /\ -a77^post49+a77^0 == 0 /\ -__rho_12_^post49+__rho_12_^0 == 0 /\ keR^post49 == 0 /\ -IsochResourceData^post49+IsochResourceData^0 == 0 /\ __rho_1_^0-__rho_1_^post49 == 0 /\ k5^0-k5^post49 == 0 /\ -i___04646^post49+i___04646^0 == 0 /\ -a4444^post49+a4444^0 == 0 /\ k2^0-k2^post49 == 0 /\ -ret_IoAllocateIrp2727^post49+ret_IoAllocateIrp2727^0 == 0 /\ -Irql^0+i___01717^post49 == 0 /\ -i___099^post49+i___099^0 == 0 /\ -b22^post49+b22^0 == 0 /\ a11^0-a11^post49 == 0 /\ -a3232^post49+a3232^0 == 0 /\ -b2929^post49+b2929^0 == 0 /\ __rho_7_^0-__rho_7_^post49 == 0 /\ -a2525^post49+a2525^0 == 0 /\ 1-k3^0 <= 0 /\ -a3434^post49+a3434^0 == 0 /\ __rho_9_^0-__rho_9_^post49 == 0 /\ a2828^0-a2828^post49 == 0 /\ a3838^0-a3838^post49 == 0 /\ __rho_5_^0-__rho_5_^post49 == 0 /\ -1+keR^130 == 0 /\ -__rho_99_^post49+__rho_99_^0 == 0 /\ b2626^0-b2626^post49 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post49+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ AsyncAddressData^0-AsyncAddressData^post49 == 0 /\ -i___04040^post49+i___04040^0 == 0 /\ ntStatus^0-ntStatus^post49 == 0 /\ -ResourceIrp^post49+ResourceIrp^0 == 0 /\ -__rho_56_^post49+__rho_56_^0 == 0 /\ i___02424^0-i___02424^post49 == 0 /\ a3131^0-a3131^post49 == 0 /\ -pIrb^post49+pIrb^0 == 0 /\ -ret_t1394Diag_PnpStopDevice33^post49+ret_t1394Diag_PnpStopDevice33^0 == 0 /\ b3535^0-b3535^post49 == 0 /\ -__rho_11_^post49+__rho_11_^0 == 0 /\ -k4^post49+k4^0 == 0 /\ -keA^post49+keA^0 == 0 /\ -1+keR^360 == 0 /\ i___02020^0-i___02020^post49 == 0 /\ -__rho_13_^post49+__rho_13_^0 == 0 /\ 1+k3^post49-k3^0 == 0 /\ b3333^0-b3333^post49 == 0 /\ -Irp^post49+Irp^0 == 0 /\ k1^0-k1^post49 == 0 /\ __rho_2_^0-__rho_2_^post49 == 0 /\ -__rho_10_^post49+__rho_10_^0 == 0 /\ i___01313^0-i___01313^post49 == 0 /\ __rho_8_^0-__rho_8_^post49 == 0 /\ ret_IoSetDeviceInterfaceState44^0-ret_IoSetDeviceInterfaceState44^post49 == 0 /\ CromData^0-CromData^post49 == 0 /\ -__rho_3_^post49+__rho_3_^0 == 0 /\ Irql^0-Irql^post49 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post49 == 0 /\ keR^260 == 0 /\ __rho_6_^0-__rho_6_^post49 == 0 /\ __rho_4_^0-__rho_4_^post49 == 0 /\ a4343^0-a4343^post49 == 0 /\ -a3737^post49+a3737^0 == 0), cost: 1
New rule:
l11 -> l10 : i___01717^0'=Irql^0, IsochDetachData^0'=IsochDetachData^post49, keR^0'=0, i^0'=i^post49, k3^0'=-1+k3^0, a1818^0'=IsochDetachData^post49, -1+k3^0 >= 0, cost: 1

Applied preprocessing
Original rule:
l33 -> l32 : i___01717^0'=i___01717^post50, IsochDetachData^0'=IsochDetachData^post50, ntStatus^0'=ntStatus^post50, __rho_6_^0'=__rho_6_^post50, k5^0'=k5^post50, __rho_2_^0'=__rho_2_^post50, a3838^0'=a3838^post50, a2828^0'=a2828^post50, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post50, b3535^0'=b3535^post50, CromData^0'=CromData^post50, b2626^0'=b2626^post50, __rho_4_^0'=__rho_4_^post50, k2^0'=k2^post50, __rho_12_^0'=__rho_12_^post50, i___02424^0'=i___02424^post50, a11^0'=a11^post50, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post50, __rho_8_^0'=__rho_8_^post50, keR^0'=keR^post50, a4444^0'=a4444^post50, a3232^0'=a3232^post50, ResourceIrp^0'=ResourceIrp^post50, i___01313^0'=i___01313^post50, Irql^0'=Irql^post50, b3333^0'=b3333^post50, __rho_5_^0'=__rho_5_^post50, k4^0'=k4^post50, __rho_1_^0'=__rho_1_^post50, i___04646^0'=i___04646^post50, a2525^0'=a2525^post50, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post50, __rho_9_^0'=__rho_9_^post50, AsyncAddressData^0'=AsyncAddressData^post50, b22^0'=b22^post50, a3737^0'=a3737^post50, k1^0'=k1^post50, __rho_11_^0'=__rho_11_^post50, i___02020^0'=i___02020^post50, IsochResourceData^0'=IsochResourceData^post50, pIrb^0'=pIrb^post50, __rho_7_^0'=__rho_7_^post50, keA^0'=keA^post50, __rho_3_^0'=__rho_3_^post50, a4343^0'=a4343^post50, a3131^0'=a3131^post50, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post50, i^0'=i^post50, Irp^0'=Irp^post50, b2929^0'=b2929^post50, __rho_56_^0'=__rho_56_^post50, k3^0'=k3^post50, __rho_13_^0'=__rho_13_^post50, i___04040^0'=i___04040^post50, a1818^0'=a1818^post50, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post50, __rho_99_^0'=__rho_99_^post50, a77^0'=a77^post50, a3434^0'=a3434^post50, i___099^0'=i___099^post50, __rho_10_^0'=__rho_10_^post50, (0 == 0 /\ k3^0-k3^post50 == 0 /\ -ret_t1394_SubmitIrpSynch3636^post50+ret_t1394_SubmitIrpSynch3636^0 == 0 /\ a11^0-a11^post50 == 0 /\ -b3333^post50+b3333^0 == 0 /\ -ret_IoAllocateIrp2727^post50+ret_IoAllocateIrp2727^0 == 0 /\ -i___01313^post50+i___01313^0 == 0 /\ -k1^post50+k1^0 == 0 /\ ret_IoSetDeviceInterfaceState44^0-ret_IoSetDeviceInterfaceState44^post50 == 0 /\ -a77^post50+a77^0 == 0 /\ -ret_ExAllocatePool3030^post50+ret_ExAllocatePool3030^0 == 0 /\ b2626^0-b2626^post50 == 0 /\ i___02424^0-i___02424^post50 == 0 /\ -__rho_3_^post50+__rho_3_^0 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post50 == 0 /\ Irql^0-Irql^post50 == 0 /\ -__rho_99_^post50+__rho_99_^0 == 0 /\ a3232^0-a3232^post50 == 0 /\ -i___04040^post50+i___04040^0 == 0 /\ Irp^0-Irp^post50 == 0 /\ -a4444^post50+a4444^0 == 0 /\ -__rho_4_^post50+__rho_4_^0 == 0 /\ k2^0-k2^post50 == 0 /\ ntStatus^0-ntStatus^post50 == 0 /\ -b2929^post50+b2929^0 == 0 /\ b3535^0-b3535^post50 == 0 /\ a2828^0-a2828^post50 == 0 /\ i___02020^0-i___02020^post50 == 0 /\ k5^0-k5^post50 == 0 /\ k4^0-k4^post50 == 0 /\ -a3737^post50+a3737^0 == 0 /\ -pIrb^post50+pIrb^0 == 0 /\ -a3434^post50+a3434^0 == 0 /\ IsochDetachData^0-IsochDetachData^post50 == 0 /\ -__rho_9_^post50+__rho_9_^0 == 0 /\ -__rho_7_^post50+__rho_7_^0 == 0 /\ -a1818^post50+a1818^0 == 0 /\ __rho_2_^0-__rho_2_^post50 == 0 /\ -__rho_13_^post50+__rho_13_^0 == 0 /\ -i^post50+i^0 == 0 /\ __rho_8_^0-__rho_8_^post50 == 0 /\ -__rho_56_^post50+__rho_56_^0 == 0 /\ -a2525^post50+a2525^0 == 0 /\ -b22^post50+b22^0 == 0 /\ __rho_12_^0-__rho_12_^post50 == 0 /\ -i___04646^post50+i___04646^0 == 0 /\ IsochResourceData^0-IsochResourceData^post50 == 0 /\ -__rho_11_^post50+__rho_11_^0 == 0 /\ i___01717^0-i___01717^post50 == 0 /\ -i___099^post50+i___099^0 == 0 /\ -__rho_6_^post50+__rho_6_^0 == 0 /\ keA^post50 == 0 /\ -a3838^post50+a3838^0 == 0 /\ AsyncAddressData^0-AsyncAddressData^post50 == 0 /\ -a4343^post50+a4343^0 == 0 /\ __rho_5_^0-__rho_5_^post50 == 0 /\ -__rho_10_^post50+__rho_10_^0 == 0 /\ keR^post50 == 0 /\ CromData^0-CromData^post50 == 0 /\ ResourceIrp^0-ResourceIrp^post50 == 0 /\ a3131^0-a3131^post50 == 0), cost: 1
New rule:
l33 -> l32 : keR^0'=0, __rho_1_^0'=__rho_1_^post50, keA^0'=0, 0 == 0, cost: 1

Applied preprocessing
Original rule:
l34 -> l33 : i___01717^0'=i___01717^post51, IsochDetachData^0'=IsochDetachData^post51, ntStatus^0'=ntStatus^post51, __rho_6_^0'=__rho_6_^post51, k5^0'=k5^post51, __rho_2_^0'=__rho_2_^post51, a3838^0'=a3838^post51, a2828^0'=a2828^post51, ret_t1394Diag_PnpStopDevice33^0'=ret_t1394Diag_PnpStopDevice33^post51, b3535^0'=b3535^post51, CromData^0'=CromData^post51, b2626^0'=b2626^post51, __rho_4_^0'=__rho_4_^post51, k2^0'=k2^post51, __rho_12_^0'=__rho_12_^post51, i___02424^0'=i___02424^post51, a11^0'=a11^post51, ret_ExAllocatePool3030^0'=ret_ExAllocatePool3030^post51, __rho_8_^0'=__rho_8_^post51, keR^0'=keR^post51, a4444^0'=a4444^post51, a3232^0'=a3232^post51, ResourceIrp^0'=ResourceIrp^post51, i___01313^0'=i___01313^post51, Irql^0'=Irql^post51, b3333^0'=b3333^post51, __rho_5_^0'=__rho_5_^post51, k4^0'=k4^post51, __rho_1_^0'=__rho_1_^post51, i___04646^0'=i___04646^post51, a2525^0'=a2525^post51, ret_IoSetDeviceInterfaceState44^0'=ret_IoSetDeviceInterfaceState44^post51, __rho_9_^0'=__rho_9_^post51, AsyncAddressData^0'=AsyncAddressData^post51, b22^0'=b22^post51, a3737^0'=a3737^post51, k1^0'=k1^post51, __rho_11_^0'=__rho_11_^post51, i___02020^0'=i___02020^post51, IsochResourceData^0'=IsochResourceData^post51, pIrb^0'=pIrb^post51, __rho_7_^0'=__rho_7_^post51, keA^0'=keA^post51, __rho_3_^0'=__rho_3_^post51, a4343^0'=a4343^post51, a3131^0'=a3131^post51, ret_t1394_SubmitIrpSynch3636^0'=ret_t1394_SubmitIrpSynch3636^post51, i^0'=i^post51, Irp^0'=Irp^post51, b2929^0'=b2929^post51, __rho_56_^0'=__rho_56_^post51, k3^0'=k3^post51, __rho_13_^0'=__rho_13_^post51, i___04040^0'=i___04040^post51, a1818^0'=a1818^post51, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post51, __rho_99_^0'=__rho_99_^post51, a77^0'=a77^post51, a3434^0'=a3434^post51, i___099^0'=i___099^post51, __rho_10_^0'=__rho_10_^post51, (-i___01313^post51+i___01313^0 == 0 /\ -a3434^post51+a3434^0 == 0 /\ __rho_5_^0-__rho_5_^post51 == 0 /\ __rho_2_^0-__rho_2_^post51 == 0 /\ __rho_13_^0-__rho_13_^post51 == 0 /\ __rho_8_^0-__rho_8_^post51 == 0 /\ k2^0-k2^post51 == 0 /\ ret_t1394_SubmitIrpSynch3636^0-ret_t1394_SubmitIrpSynch3636^post51 == 0 /\ b22^0-b22^post51 == 0 /\ -a77^post51+a77^0 == 0 /\ i___01717^0-i___01717^post51 == 0 /\ -k1^post51+k1^0 == 0 /\ __rho_56_^0-__rho_56_^post51 == 0 /\ a2525^0-a2525^post51 == 0 /\ __rho_6_^0-__rho_6_^post51 == 0 /\ -__rho_10_^post51+__rho_10_^0 == 0 /\ -i___04040^post51+i___04040^0 == 0 /\ ResourceIrp^0-ResourceIrp^post51 == 0 /\ -AsyncAddressData^post51+AsyncAddressData^0 == 0 /\ -i___04646^post51+i___04646^0 == 0 /\ -__rho_7_^post51+__rho_7_^0 == 0 /\ -__rho_11_^post51+__rho_11_^0 == 0 /\ -b2929^post51+b2929^0 == 0 /\ a3838^0-a3838^post51 == 0 /\ ret_ExAllocatePool3030^0-ret_ExAllocatePool3030^post51 == 0 /\ -a1818^post51+a1818^0 == 0 /\ b3333^0-b3333^post51 == 0 /\ keR^0-keR^post51 == 0 /\ __rho_3_^0-__rho_3_^post51 == 0 /\ IsochResourceData^0-IsochResourceData^post51 == 0 /\ k4^0-k4^post51 == 0 /\ ret_t1394Diag_PnpStopDevice33^0-ret_t1394Diag_PnpStopDevice33^post51 == 0 /\ -Irp^post51+Irp^0 == 0 /\ b2626^0-b2626^post51 == 0 /\ i___02424^0-i___02424^post51 == 0 /\ CromData^0-CromData^post51 == 0 /\ -a3131^post51+a3131^0 == 0 /\ -i___02020^post51+i___02020^0 == 0 /\ __rho_4_^0-__rho_4_^post51 == 0 /\ -k3^post51+k3^0 == 0 /\ -a4343^post51+a4343^0 == 0 /\ -__rho_9_^post51+__rho_9_^0 == 0 /\ -__rho_99_^post51+__rho_99_^0 == 0 /\ -a4444^post51+a4444^0 == 0 /\ ret_IoAllocateIrp2727^0-ret_IoAllocateIrp2727^post51 == 0 /\ a11^0-a11^post51 == 0 /\ -a2828^post51+a2828^0 == 0 /\ -i___099^post51+i___099^0 == 0 /\ -pIrb^post51+pIrb^0 == 0 /\ k5^0-k5^post51 == 0 /\ b3535^0-b3535^post51 == 0 /\ -__rho_12_^post51+__rho_12_^0 == 0 /\ -a3737^post51+a3737^0 == 0 /\ ntStatus^0-ntStatus^post51 == 0 /\ __rho_1_^0-__rho_1_^post51 == 0 /\ -keA^post51+keA^0 == 0 /\ a3232^0-a3232^post51 == 0 /\ ret_IoSetDeviceInterfaceState44^0-ret_IoSetDeviceInterfaceState44^post51 == 0 /\ Irql^0-Irql^post51 == 0 /\ IsochDetachData^0-IsochDetachData^post51 == 0 /\ -i^post51+i^0 == 0), cost: 1
New rule:
l34 -> l33 : TRUE, cost: 1

Simplified rules
Start location: l34
  52: l0 -> l1 : AsyncAddressData^0 <= 0, cost: 1
  53: l0 -> l1 : -1+AsyncAddressData^0 >= 0, cost: 1
  65: l1 -> l9 : TRUE, cost: 1
  54: l2 -> l0 : __rho_9_^0 <= 0, cost: 1
  55: l2 -> l0 : -1+__rho_9_^0 >= 0, cost: 1
  56: l3 -> l2 : __rho_9_^0'=__rho_9_^post4, 0 == 0, cost: 1
  57: l4 -> l3 : __rho_8_^0 <= 0, cost: 1
  58: l4 -> l3 : -1+__rho_8_^0 >= 0, cost: 1
  59: l5 -> l4 : __rho_8_^0'=__rho_8_^post7, 0 == 0, cost: 1
  60: l6 -> l5 : __rho_7_^0 <= 0, cost: 1
  61: l6 -> l5 : -1+__rho_7_^0 >= 0, cost: 1
  62: l7 -> l8 : TRUE, cost: 1
  76: l8 -> l18 : CromData^0'=CromData^post24, k1^0'=-1+k1^0, __rho_3_^0'=CromData^post24, -1+k1^0 >= 0, cost: 1
  77: l8 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=__rho_6_^post25, keR^0'=0, keA^0'=0, i___099^0'=Irql^0, k1^0 <= 0, cost: 1
  63: l9 -> l6 : k2^0'=-1+k2^0, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, -1+k2^0 >= 0, cost: 1
  64: l9 -> l10 : keR^0'=0, i___01313^0'=Irql^0, k2^0 <= 0, cost: 1
  66: l10 -> l11 : keA^0'=0, k3^0'=k3^post14, __rho_10_^0'=k3^post14, 0 == 0, cost: 1
  99: l11 -> l15 : keR^0'=0, k4^0'=k4^post48, __rho_11_^0'=k4^post48, i___02020^0'=Irql^0, k3^0 <= 0, cost: 1
 100: l11 -> l10 : i___01717^0'=Irql^0, IsochDetachData^0'=IsochDetachData^post49, keR^0'=0, i^0'=i^post49, k3^0'=-1+k3^0, a1818^0'=IsochDetachData^post49, -1+k3^0 >= 0, cost: 1
  67: l12 -> l7 : a77^0'=CromData^0, TRUE, cost: 1
  68: l13 -> l12 : __rho_5_^0 <= 0, cost: 1
  69: l13 -> l12 : -1+__rho_5_^0 >= 0, cost: 1
  70: l14 -> l13 : __rho_5_^0'=__rho_5_^post18, 0 == 0, cost: 1
  71: l15 -> l16 : keA^0'=0, TRUE, cost: 1
  95: l16 -> l19 : k5^0'=k5^post44, keR^0'=0, keA^0'=0, __rho_13_^0'=k5^post44, i___04040^0'=Irql^0, k4^0 <= 0, cost: 1
  96: l16 -> l31 : __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, k4^0'=-1+k4^0, IsochResourceData^0'=__rho_12_^post45, -1+k4^0 >= 0, cost: 1
  72: l17 -> l14 : __rho_4_^0 <= 0, cost: 1
  73: l17 -> l14 : -1+__rho_4_^0 >= 0, cost: 1
  74: l18 -> l7 : CromData^0 <= 0, cost: 1
  75: l18 -> l17 : __rho_4_^0'=__rho_4_^post23, -1+CromData^0 >= 0, cost: 1
  78: l19 -> l20 : TRUE, cost: 1
  82: l20 -> l24 : __rho_56_^0'=__rho_56_^post31, -1+k5^0 >= 0, cost: 1
  83: l20 -> l25 : keR^0'=0, i___04646^0'=Irql^0, k5^0 <= 0, cost: 1
  79: l23 -> l19 : a4444^0'=1, a4343^0'=2, TRUE, cost: 1
  80: l24 -> l23 : __rho_56_^0 <= 0, cost: 1
  81: l24 -> l23 : k5^0'=-1+k5^0, -1+__rho_56_^0 >= 0, cost: 1
  84: l25 -> l26 : TRUE, cost: 1
  85: l26 -> l25 : TRUE, cost: 1
  86: l27 -> l15 : ntStatus^0'=0, a3838^0'=ResourceIrp^0, b3535^0'=pIrb^0, a3232^0'=pIrb^0, b3333^0'=0, a3737^0'=pIrb^0, ret_t1394_SubmitIrpSynch3636^0'=0, a3434^0'=ResourceIrp^0, -1+pIrb^0 >= 0, cost: 1
  87: l27 -> l15 : a3131^0'=ResourceIrp^0, pIrb^0 <= 0, cost: 1
  88: l28 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=__rho_2_^post37, keA^0'=0, 0 == 0, cost: 1
  89: l29 -> l27 : a2828^0'=1, ret_ExAllocatePool3030^0'=0, pIrb^0'=0, b2929^0'=0, TRUE, cost: 1
  90: l30 -> l29 : -1+ResourceIrp^0 >= 0, cost: 1
  91: l30 -> l29 : 1+ResourceIrp^0 <= 0, cost: 1
  92: l30 -> l15 : ResourceIrp^0 == 0, cost: 1
  93: l31 -> l15 : IsochResourceData^0 <= 0, cost: 1
  94: l31 -> l30 : b2626^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, a2525^0'=1, pIrb^0'=pIrb^post43, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, -1+IsochResourceData^0 >= 0, cost: 1
  97: l32 -> l28 : __rho_1_^0 <= 0, cost: 1
  98: l32 -> l28 : ntStatus^0'=0, ret_t1394Diag_PnpStopDevice33^0'=0, a11^0'=1, b22^0'=Irp^0, -1+__rho_1_^0 >= 0, cost: 1
 101: l33 -> l32 : keR^0'=0, __rho_1_^0'=__rho_1_^post50, keA^0'=0, 0 == 0, cost: 1
 102: l34 -> l33 : TRUE, cost: 1


Eliminating location l33 by chaining:

Applied chaining
First rule:
l34 -> l33 : TRUE, cost: 1
Second rule:
l33 -> l32 : keR^0'=0, __rho_1_^0'=__rho_1_^post50, keA^0'=0, 0 == 0, cost: 1
New rule:
l34 -> l32 : keR^0'=0, __rho_1_^0'=__rho_1_^post50, keA^0'=0, 0 == 0, cost: 2

Applied deletion
Removed the following rules: 101 102

Eliminating location l26 by chaining:

Applied chaining
First rule:
l25 -> l26 : TRUE, cost: 1
Second rule:
l26 -> l25 : TRUE, cost: 1
New rule:
l25 -> l25 : TRUE, cost: 2

Applied deletion
Removed the following rules: 84 85

Eliminated locations on linear paths
Start location: l34
  52: l0 -> l1 : AsyncAddressData^0 <= 0, cost: 1
  53: l0 -> l1 : -1+AsyncAddressData^0 >= 0, cost: 1
  65: l1 -> l9 : TRUE, cost: 1
  54: l2 -> l0 : __rho_9_^0 <= 0, cost: 1
  55: l2 -> l0 : -1+__rho_9_^0 >= 0, cost: 1
  56: l3 -> l2 : __rho_9_^0'=__rho_9_^post4, 0 == 0, cost: 1
  57: l4 -> l3 : __rho_8_^0 <= 0, cost: 1
  58: l4 -> l3 : -1+__rho_8_^0 >= 0, cost: 1
  59: l5 -> l4 : __rho_8_^0'=__rho_8_^post7, 0 == 0, cost: 1
  60: l6 -> l5 : __rho_7_^0 <= 0, cost: 1
  61: l6 -> l5 : -1+__rho_7_^0 >= 0, cost: 1
  62: l7 -> l8 : TRUE, cost: 1
  76: l8 -> l18 : CromData^0'=CromData^post24, k1^0'=-1+k1^0, __rho_3_^0'=CromData^post24, -1+k1^0 >= 0, cost: 1
  77: l8 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=__rho_6_^post25, keR^0'=0, keA^0'=0, i___099^0'=Irql^0, k1^0 <= 0, cost: 1
  63: l9 -> l6 : k2^0'=-1+k2^0, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, -1+k2^0 >= 0, cost: 1
  64: l9 -> l10 : keR^0'=0, i___01313^0'=Irql^0, k2^0 <= 0, cost: 1
  66: l10 -> l11 : keA^0'=0, k3^0'=k3^post14, __rho_10_^0'=k3^post14, 0 == 0, cost: 1
  99: l11 -> l15 : keR^0'=0, k4^0'=k4^post48, __rho_11_^0'=k4^post48, i___02020^0'=Irql^0, k3^0 <= 0, cost: 1
 100: l11 -> l10 : i___01717^0'=Irql^0, IsochDetachData^0'=IsochDetachData^post49, keR^0'=0, i^0'=i^post49, k3^0'=-1+k3^0, a1818^0'=IsochDetachData^post49, -1+k3^0 >= 0, cost: 1
  67: l12 -> l7 : a77^0'=CromData^0, TRUE, cost: 1
  68: l13 -> l12 : __rho_5_^0 <= 0, cost: 1
  69: l13 -> l12 : -1+__rho_5_^0 >= 0, cost: 1
  70: l14 -> l13 : __rho_5_^0'=__rho_5_^post18, 0 == 0, cost: 1
  71: l15 -> l16 : keA^0'=0, TRUE, cost: 1
  95: l16 -> l19 : k5^0'=k5^post44, keR^0'=0, keA^0'=0, __rho_13_^0'=k5^post44, i___04040^0'=Irql^0, k4^0 <= 0, cost: 1
  96: l16 -> l31 : __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, k4^0'=-1+k4^0, IsochResourceData^0'=__rho_12_^post45, -1+k4^0 >= 0, cost: 1
  72: l17 -> l14 : __rho_4_^0 <= 0, cost: 1
  73: l17 -> l14 : -1+__rho_4_^0 >= 0, cost: 1
  74: l18 -> l7 : CromData^0 <= 0, cost: 1
  75: l18 -> l17 : __rho_4_^0'=__rho_4_^post23, -1+CromData^0 >= 0, cost: 1
  78: l19 -> l20 : TRUE, cost: 1
  82: l20 -> l24 : __rho_56_^0'=__rho_56_^post31, -1+k5^0 >= 0, cost: 1
  83: l20 -> l25 : keR^0'=0, i___04646^0'=Irql^0, k5^0 <= 0, cost: 1
  79: l23 -> l19 : a4444^0'=1, a4343^0'=2, TRUE, cost: 1
  80: l24 -> l23 : __rho_56_^0 <= 0, cost: 1
  81: l24 -> l23 : k5^0'=-1+k5^0, -1+__rho_56_^0 >= 0, cost: 1
 104: l25 -> l25 : TRUE, cost: 2
  86: l27 -> l15 : ntStatus^0'=0, a3838^0'=ResourceIrp^0, b3535^0'=pIrb^0, a3232^0'=pIrb^0, b3333^0'=0, a3737^0'=pIrb^0, ret_t1394_SubmitIrpSynch3636^0'=0, a3434^0'=ResourceIrp^0, -1+pIrb^0 >= 0, cost: 1
  87: l27 -> l15 : a3131^0'=ResourceIrp^0, pIrb^0 <= 0, cost: 1
  88: l28 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=__rho_2_^post37, keA^0'=0, 0 == 0, cost: 1
  89: l29 -> l27 : a2828^0'=1, ret_ExAllocatePool3030^0'=0, pIrb^0'=0, b2929^0'=0, TRUE, cost: 1
  90: l30 -> l29 : -1+ResourceIrp^0 >= 0, cost: 1
  91: l30 -> l29 : 1+ResourceIrp^0 <= 0, cost: 1
  92: l30 -> l15 : ResourceIrp^0 == 0, cost: 1
  93: l31 -> l15 : IsochResourceData^0 <= 0, cost: 1
  94: l31 -> l30 : b2626^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, a2525^0'=1, pIrb^0'=pIrb^post43, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, -1+IsochResourceData^0 >= 0, cost: 1
  97: l32 -> l28 : __rho_1_^0 <= 0, cost: 1
  98: l32 -> l28 : ntStatus^0'=0, ret_t1394Diag_PnpStopDevice33^0'=0, a11^0'=1, b22^0'=Irp^0, -1+__rho_1_^0 >= 0, cost: 1
 103: l34 -> l32 : keR^0'=0, __rho_1_^0'=__rho_1_^post50, keA^0'=0, 0 == 0, cost: 2


Applied nonterm
Original rule:
l25 -> l25 : TRUE, cost: 2
New rule:
l25 -> [35] : n >= 0, cost: NONTERM
Sub-proof via acceration calculus written to file:///tmp/tmpnam_APcAkD.txt

Applied deletion
Removed the following rules: 104

Accelerated simple loops
Start location: l34
  52: l0 -> l1 : AsyncAddressData^0 <= 0, cost: 1
  53: l0 -> l1 : -1+AsyncAddressData^0 >= 0, cost: 1
  65: l1 -> l9 : TRUE, cost: 1
  54: l2 -> l0 : __rho_9_^0 <= 0, cost: 1
  55: l2 -> l0 : -1+__rho_9_^0 >= 0, cost: 1
  56: l3 -> l2 : __rho_9_^0'=__rho_9_^post4, 0 == 0, cost: 1
  57: l4 -> l3 : __rho_8_^0 <= 0, cost: 1
  58: l4 -> l3 : -1+__rho_8_^0 >= 0, cost: 1
  59: l5 -> l4 : __rho_8_^0'=__rho_8_^post7, 0 == 0, cost: 1
  60: l6 -> l5 : __rho_7_^0 <= 0, cost: 1
  61: l6 -> l5 : -1+__rho_7_^0 >= 0, cost: 1
  62: l7 -> l8 : TRUE, cost: 1
  76: l8 -> l18 : CromData^0'=CromData^post24, k1^0'=-1+k1^0, __rho_3_^0'=CromData^post24, -1+k1^0 >= 0, cost: 1
  77: l8 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=__rho_6_^post25, keR^0'=0, keA^0'=0, i___099^0'=Irql^0, k1^0 <= 0, cost: 1
  63: l9 -> l6 : k2^0'=-1+k2^0, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, -1+k2^0 >= 0, cost: 1
  64: l9 -> l10 : keR^0'=0, i___01313^0'=Irql^0, k2^0 <= 0, cost: 1
  66: l10 -> l11 : keA^0'=0, k3^0'=k3^post14, __rho_10_^0'=k3^post14, 0 == 0, cost: 1
  99: l11 -> l15 : keR^0'=0, k4^0'=k4^post48, __rho_11_^0'=k4^post48, i___02020^0'=Irql^0, k3^0 <= 0, cost: 1
 100: l11 -> l10 : i___01717^0'=Irql^0, IsochDetachData^0'=IsochDetachData^post49, keR^0'=0, i^0'=i^post49, k3^0'=-1+k3^0, a1818^0'=IsochDetachData^post49, -1+k3^0 >= 0, cost: 1
  67: l12 -> l7 : a77^0'=CromData^0, TRUE, cost: 1
  68: l13 -> l12 : __rho_5_^0 <= 0, cost: 1
  69: l13 -> l12 : -1+__rho_5_^0 >= 0, cost: 1
  70: l14 -> l13 : __rho_5_^0'=__rho_5_^post18, 0 == 0, cost: 1
  71: l15 -> l16 : keA^0'=0, TRUE, cost: 1
  95: l16 -> l19 : k5^0'=k5^post44, keR^0'=0, keA^0'=0, __rho_13_^0'=k5^post44, i___04040^0'=Irql^0, k4^0 <= 0, cost: 1
  96: l16 -> l31 : __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, k4^0'=-1+k4^0, IsochResourceData^0'=__rho_12_^post45, -1+k4^0 >= 0, cost: 1
  72: l17 -> l14 : __rho_4_^0 <= 0, cost: 1
  73: l17 -> l14 : -1+__rho_4_^0 >= 0, cost: 1
  74: l18 -> l7 : CromData^0 <= 0, cost: 1
  75: l18 -> l17 : __rho_4_^0'=__rho_4_^post23, -1+CromData^0 >= 0, cost: 1
  78: l19 -> l20 : TRUE, cost: 1
  82: l20 -> l24 : __rho_56_^0'=__rho_56_^post31, -1+k5^0 >= 0, cost: 1
  83: l20 -> l25 : keR^0'=0, i___04646^0'=Irql^0, k5^0 <= 0, cost: 1
  79: l23 -> l19 : a4444^0'=1, a4343^0'=2, TRUE, cost: 1
  80: l24 -> l23 : __rho_56_^0 <= 0, cost: 1
  81: l24 -> l23 : k5^0'=-1+k5^0, -1+__rho_56_^0 >= 0, cost: 1
 105: l25 -> [35] : n >= 0, cost: NONTERM
  86: l27 -> l15 : ntStatus^0'=0, a3838^0'=ResourceIrp^0, b3535^0'=pIrb^0, a3232^0'=pIrb^0, b3333^0'=0, a3737^0'=pIrb^0, ret_t1394_SubmitIrpSynch3636^0'=0, a3434^0'=ResourceIrp^0, -1+pIrb^0 >= 0, cost: 1
  87: l27 -> l15 : a3131^0'=ResourceIrp^0, pIrb^0 <= 0, cost: 1
  88: l28 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=__rho_2_^post37, keA^0'=0, 0 == 0, cost: 1
  89: l29 -> l27 : a2828^0'=1, ret_ExAllocatePool3030^0'=0, pIrb^0'=0, b2929^0'=0, TRUE, cost: 1
  90: l30 -> l29 : -1+ResourceIrp^0 >= 0, cost: 1
  91: l30 -> l29 : 1+ResourceIrp^0 <= 0, cost: 1
  92: l30 -> l15 : ResourceIrp^0 == 0, cost: 1
  93: l31 -> l15 : IsochResourceData^0 <= 0, cost: 1
  94: l31 -> l30 : b2626^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, a2525^0'=1, pIrb^0'=pIrb^post43, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, -1+IsochResourceData^0 >= 0, cost: 1
  97: l32 -> l28 : __rho_1_^0 <= 0, cost: 1
  98: l32 -> l28 : ntStatus^0'=0, ret_t1394Diag_PnpStopDevice33^0'=0, a11^0'=1, b22^0'=Irp^0, -1+__rho_1_^0 >= 0, cost: 1
 103: l34 -> l32 : keR^0'=0, __rho_1_^0'=__rho_1_^post50, keA^0'=0, 0 == 0, cost: 2


Applied chaining
First rule:
l20 -> l25 : keR^0'=0, i___04646^0'=Irql^0, k5^0 <= 0, cost: 1
Second rule:
l25 -> [35] : n >= 0, cost: NONTERM
New rule:
l20 -> [35] : k5^0 <= 0, cost: NONTERM

Applied deletion
Removed the following rules: 105

Chained accelerated rules with incoming rules
Start location: l34
  52: l0 -> l1 : AsyncAddressData^0 <= 0, cost: 1
  53: l0 -> l1 : -1+AsyncAddressData^0 >= 0, cost: 1
  65: l1 -> l9 : TRUE, cost: 1
  54: l2 -> l0 : __rho_9_^0 <= 0, cost: 1
  55: l2 -> l0 : -1+__rho_9_^0 >= 0, cost: 1
  56: l3 -> l2 : __rho_9_^0'=__rho_9_^post4, 0 == 0, cost: 1
  57: l4 -> l3 : __rho_8_^0 <= 0, cost: 1
  58: l4 -> l3 : -1+__rho_8_^0 >= 0, cost: 1
  59: l5 -> l4 : __rho_8_^0'=__rho_8_^post7, 0 == 0, cost: 1
  60: l6 -> l5 : __rho_7_^0 <= 0, cost: 1
  61: l6 -> l5 : -1+__rho_7_^0 >= 0, cost: 1
  62: l7 -> l8 : TRUE, cost: 1
  76: l8 -> l18 : CromData^0'=CromData^post24, k1^0'=-1+k1^0, __rho_3_^0'=CromData^post24, -1+k1^0 >= 0, cost: 1
  77: l8 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=__rho_6_^post25, keR^0'=0, keA^0'=0, i___099^0'=Irql^0, k1^0 <= 0, cost: 1
  63: l9 -> l6 : k2^0'=-1+k2^0, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, -1+k2^0 >= 0, cost: 1
  64: l9 -> l10 : keR^0'=0, i___01313^0'=Irql^0, k2^0 <= 0, cost: 1
  66: l10 -> l11 : keA^0'=0, k3^0'=k3^post14, __rho_10_^0'=k3^post14, 0 == 0, cost: 1
  99: l11 -> l15 : keR^0'=0, k4^0'=k4^post48, __rho_11_^0'=k4^post48, i___02020^0'=Irql^0, k3^0 <= 0, cost: 1
 100: l11 -> l10 : i___01717^0'=Irql^0, IsochDetachData^0'=IsochDetachData^post49, keR^0'=0, i^0'=i^post49, k3^0'=-1+k3^0, a1818^0'=IsochDetachData^post49, -1+k3^0 >= 0, cost: 1
  67: l12 -> l7 : a77^0'=CromData^0, TRUE, cost: 1
  68: l13 -> l12 : __rho_5_^0 <= 0, cost: 1
  69: l13 -> l12 : -1+__rho_5_^0 >= 0, cost: 1
  70: l14 -> l13 : __rho_5_^0'=__rho_5_^post18, 0 == 0, cost: 1
  71: l15 -> l16 : keA^0'=0, TRUE, cost: 1
  95: l16 -> l19 : k5^0'=k5^post44, keR^0'=0, keA^0'=0, __rho_13_^0'=k5^post44, i___04040^0'=Irql^0, k4^0 <= 0, cost: 1
  96: l16 -> l31 : __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, k4^0'=-1+k4^0, IsochResourceData^0'=__rho_12_^post45, -1+k4^0 >= 0, cost: 1
  72: l17 -> l14 : __rho_4_^0 <= 0, cost: 1
  73: l17 -> l14 : -1+__rho_4_^0 >= 0, cost: 1
  74: l18 -> l7 : CromData^0 <= 0, cost: 1
  75: l18 -> l17 : __rho_4_^0'=__rho_4_^post23, -1+CromData^0 >= 0, cost: 1
  78: l19 -> l20 : TRUE, cost: 1
  82: l20 -> l24 : __rho_56_^0'=__rho_56_^post31, -1+k5^0 >= 0, cost: 1
  83: l20 -> l25 : keR^0'=0, i___04646^0'=Irql^0, k5^0 <= 0, cost: 1
 106: l20 -> [35] : k5^0 <= 0, cost: NONTERM
  79: l23 -> l19 : a4444^0'=1, a4343^0'=2, TRUE, cost: 1
  80: l24 -> l23 : __rho_56_^0 <= 0, cost: 1
  81: l24 -> l23 : k5^0'=-1+k5^0, -1+__rho_56_^0 >= 0, cost: 1
  86: l27 -> l15 : ntStatus^0'=0, a3838^0'=ResourceIrp^0, b3535^0'=pIrb^0, a3232^0'=pIrb^0, b3333^0'=0, a3737^0'=pIrb^0, ret_t1394_SubmitIrpSynch3636^0'=0, a3434^0'=ResourceIrp^0, -1+pIrb^0 >= 0, cost: 1
  87: l27 -> l15 : a3131^0'=ResourceIrp^0, pIrb^0 <= 0, cost: 1
  88: l28 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=__rho_2_^post37, keA^0'=0, 0 == 0, cost: 1
  89: l29 -> l27 : a2828^0'=1, ret_ExAllocatePool3030^0'=0, pIrb^0'=0, b2929^0'=0, TRUE, cost: 1
  90: l30 -> l29 : -1+ResourceIrp^0 >= 0, cost: 1
  91: l30 -> l29 : 1+ResourceIrp^0 <= 0, cost: 1
  92: l30 -> l15 : ResourceIrp^0 == 0, cost: 1
  93: l31 -> l15 : IsochResourceData^0 <= 0, cost: 1
  94: l31 -> l30 : b2626^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, a2525^0'=1, pIrb^0'=pIrb^post43, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, -1+IsochResourceData^0 >= 0, cost: 1
  97: l32 -> l28 : __rho_1_^0 <= 0, cost: 1
  98: l32 -> l28 : ntStatus^0'=0, ret_t1394Diag_PnpStopDevice33^0'=0, a11^0'=1, b22^0'=Irp^0, -1+__rho_1_^0 >= 0, cost: 1
 103: l34 -> l32 : keR^0'=0, __rho_1_^0'=__rho_1_^post50, keA^0'=0, 0 == 0, cost: 2


Removed unreachable locations and irrelevant leafs
Start location: l34
  52: l0 -> l1 : AsyncAddressData^0 <= 0, cost: 1
  53: l0 -> l1 : -1+AsyncAddressData^0 >= 0, cost: 1
  65: l1 -> l9 : TRUE, cost: 1
  54: l2 -> l0 : __rho_9_^0 <= 0, cost: 1
  55: l2 -> l0 : -1+__rho_9_^0 >= 0, cost: 1
  56: l3 -> l2 : __rho_9_^0'=__rho_9_^post4, 0 == 0, cost: 1
  57: l4 -> l3 : __rho_8_^0 <= 0, cost: 1
  58: l4 -> l3 : -1+__rho_8_^0 >= 0, cost: 1
  59: l5 -> l4 : __rho_8_^0'=__rho_8_^post7, 0 == 0, cost: 1
  60: l6 -> l5 : __rho_7_^0 <= 0, cost: 1
  61: l6 -> l5 : -1+__rho_7_^0 >= 0, cost: 1
  62: l7 -> l8 : TRUE, cost: 1
  76: l8 -> l18 : CromData^0'=CromData^post24, k1^0'=-1+k1^0, __rho_3_^0'=CromData^post24, -1+k1^0 >= 0, cost: 1
  77: l8 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=__rho_6_^post25, keR^0'=0, keA^0'=0, i___099^0'=Irql^0, k1^0 <= 0, cost: 1
  63: l9 -> l6 : k2^0'=-1+k2^0, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, -1+k2^0 >= 0, cost: 1
  64: l9 -> l10 : keR^0'=0, i___01313^0'=Irql^0, k2^0 <= 0, cost: 1
  66: l10 -> l11 : keA^0'=0, k3^0'=k3^post14, __rho_10_^0'=k3^post14, 0 == 0, cost: 1
  99: l11 -> l15 : keR^0'=0, k4^0'=k4^post48, __rho_11_^0'=k4^post48, i___02020^0'=Irql^0, k3^0 <= 0, cost: 1
 100: l11 -> l10 : i___01717^0'=Irql^0, IsochDetachData^0'=IsochDetachData^post49, keR^0'=0, i^0'=i^post49, k3^0'=-1+k3^0, a1818^0'=IsochDetachData^post49, -1+k3^0 >= 0, cost: 1
  67: l12 -> l7 : a77^0'=CromData^0, TRUE, cost: 1
  68: l13 -> l12 : __rho_5_^0 <= 0, cost: 1
  69: l13 -> l12 : -1+__rho_5_^0 >= 0, cost: 1
  70: l14 -> l13 : __rho_5_^0'=__rho_5_^post18, 0 == 0, cost: 1
  71: l15 -> l16 : keA^0'=0, TRUE, cost: 1
  95: l16 -> l19 : k5^0'=k5^post44, keR^0'=0, keA^0'=0, __rho_13_^0'=k5^post44, i___04040^0'=Irql^0, k4^0 <= 0, cost: 1
  96: l16 -> l31 : __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, k4^0'=-1+k4^0, IsochResourceData^0'=__rho_12_^post45, -1+k4^0 >= 0, cost: 1
  72: l17 -> l14 : __rho_4_^0 <= 0, cost: 1
  73: l17 -> l14 : -1+__rho_4_^0 >= 0, cost: 1
  74: l18 -> l7 : CromData^0 <= 0, cost: 1
  75: l18 -> l17 : __rho_4_^0'=__rho_4_^post23, -1+CromData^0 >= 0, cost: 1
  78: l19 -> l20 : TRUE, cost: 1
  82: l20 -> l24 : __rho_56_^0'=__rho_56_^post31, -1+k5^0 >= 0, cost: 1
 106: l20 -> [35] : k5^0 <= 0, cost: NONTERM
  79: l23 -> l19 : a4444^0'=1, a4343^0'=2, TRUE, cost: 1
  80: l24 -> l23 : __rho_56_^0 <= 0, cost: 1
  81: l24 -> l23 : k5^0'=-1+k5^0, -1+__rho_56_^0 >= 0, cost: 1
  86: l27 -> l15 : ntStatus^0'=0, a3838^0'=ResourceIrp^0, b3535^0'=pIrb^0, a3232^0'=pIrb^0, b3333^0'=0, a3737^0'=pIrb^0, ret_t1394_SubmitIrpSynch3636^0'=0, a3434^0'=ResourceIrp^0, -1+pIrb^0 >= 0, cost: 1
  87: l27 -> l15 : a3131^0'=ResourceIrp^0, pIrb^0 <= 0, cost: 1
  88: l28 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=__rho_2_^post37, keA^0'=0, 0 == 0, cost: 1
  89: l29 -> l27 : a2828^0'=1, ret_ExAllocatePool3030^0'=0, pIrb^0'=0, b2929^0'=0, TRUE, cost: 1
  90: l30 -> l29 : -1+ResourceIrp^0 >= 0, cost: 1
  91: l30 -> l29 : 1+ResourceIrp^0 <= 0, cost: 1
  92: l30 -> l15 : ResourceIrp^0 == 0, cost: 1
  93: l31 -> l15 : IsochResourceData^0 <= 0, cost: 1
  94: l31 -> l30 : b2626^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, a2525^0'=1, pIrb^0'=pIrb^post43, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, -1+IsochResourceData^0 >= 0, cost: 1
  97: l32 -> l28 : __rho_1_^0 <= 0, cost: 1
  98: l32 -> l28 : ntStatus^0'=0, ret_t1394Diag_PnpStopDevice33^0'=0, a11^0'=1, b22^0'=Irp^0, -1+__rho_1_^0 >= 0, cost: 1
 103: l34 -> l32 : keR^0'=0, __rho_1_^0'=__rho_1_^post50, keA^0'=0, 0 == 0, cost: 2


Eliminating location l32 by chaining:

Applied chaining
First rule:
l34 -> l32 : keR^0'=0, __rho_1_^0'=__rho_1_^post50, keA^0'=0, 0 == 0, cost: 2
Second rule:
l32 -> l28 : __rho_1_^0 <= 0, cost: 1
New rule:
l34 -> l28 : keR^0'=0, __rho_1_^0'=__rho_1_^post50, keA^0'=0, (0 == 0 /\ __rho_1_^post50 <= 0), cost: 3

Applied simplification
Original rule:
l34 -> l28 : keR^0'=0, __rho_1_^0'=__rho_1_^post50, keA^0'=0, (0 == 0 /\ __rho_1_^post50 <= 0), cost: 3
New rule:
l34 -> l28 : keR^0'=0, __rho_1_^0'=__rho_1_^post50, keA^0'=0, __rho_1_^post50 <= 0, cost: 3

Applied chaining
First rule:
l34 -> l32 : keR^0'=0, __rho_1_^0'=__rho_1_^post50, keA^0'=0, 0 == 0, cost: 2
Second rule:
l32 -> l28 : ntStatus^0'=0, ret_t1394Diag_PnpStopDevice33^0'=0, a11^0'=1, b22^0'=Irp^0, -1+__rho_1_^0 >= 0, cost: 1
New rule:
l34 -> l28 : ntStatus^0'=0, ret_t1394Diag_PnpStopDevice33^0'=0, a11^0'=1, keR^0'=0, __rho_1_^0'=__rho_1_^post50, b22^0'=Irp^0, keA^0'=0, (0 == 0 /\ -1+__rho_1_^post50 >= 0), cost: 3

Applied simplification
Original rule:
l34 -> l28 : ntStatus^0'=0, ret_t1394Diag_PnpStopDevice33^0'=0, a11^0'=1, keR^0'=0, __rho_1_^0'=__rho_1_^post50, b22^0'=Irp^0, keA^0'=0, (0 == 0 /\ -1+__rho_1_^post50 >= 0), cost: 3
New rule:
l34 -> l28 : ntStatus^0'=0, ret_t1394Diag_PnpStopDevice33^0'=0, a11^0'=1, keR^0'=0, __rho_1_^0'=__rho_1_^post50, b22^0'=Irp^0, keA^0'=0, -1+__rho_1_^post50 >= 0, cost: 3

Applied deletion
Removed the following rules: 97 98 103

Eliminating location l8 by chaining:

Applied chaining
First rule:
l7 -> l8 : TRUE, cost: 1
Second rule:
l8 -> l18 : CromData^0'=CromData^post24, k1^0'=-1+k1^0, __rho_3_^0'=CromData^post24, -1+k1^0 >= 0, cost: 1
New rule:
l7 -> l18 : CromData^0'=CromData^post24, k1^0'=-1+k1^0, __rho_3_^0'=CromData^post24, -1+k1^0 >= 0, cost: 2

Applied chaining
First rule:
l7 -> l8 : TRUE, cost: 1
Second rule:
l8 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=__rho_6_^post25, keR^0'=0, keA^0'=0, i___099^0'=Irql^0, k1^0 <= 0, cost: 1
New rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=__rho_6_^post25, keR^0'=0, keA^0'=0, i___099^0'=Irql^0, k1^0 <= 0, cost: 2

Applied deletion
Removed the following rules: 62 76 77

Eliminating location l9 by chaining:

Applied chaining
First rule:
l1 -> l9 : TRUE, cost: 1
Second rule:
l9 -> l6 : k2^0'=-1+k2^0, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, -1+k2^0 >= 0, cost: 1
New rule:
l1 -> l6 : k2^0'=-1+k2^0, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, -1+k2^0 >= 0, cost: 2

Applied chaining
First rule:
l1 -> l9 : TRUE, cost: 1
Second rule:
l9 -> l10 : keR^0'=0, i___01313^0'=Irql^0, k2^0 <= 0, cost: 1
New rule:
l1 -> l10 : keR^0'=0, i___01313^0'=Irql^0, k2^0 <= 0, cost: 2

Applied deletion
Removed the following rules: 63 64 65

Eliminating location l5 by chaining:

Applied chaining
First rule:
l6 -> l5 : __rho_7_^0 <= 0, cost: 1
Second rule:
l5 -> l4 : __rho_8_^0'=__rho_8_^post7, 0 == 0, cost: 1
New rule:
l6 -> l4 : __rho_8_^0'=__rho_8_^post7, (0 == 0 /\ __rho_7_^0 <= 0), cost: 2

Applied simplification
Original rule:
l6 -> l4 : __rho_8_^0'=__rho_8_^post7, (0 == 0 /\ __rho_7_^0 <= 0), cost: 2
New rule:
l6 -> l4 : __rho_8_^0'=__rho_8_^post7, __rho_7_^0 <= 0, cost: 2

Applied chaining
First rule:
l6 -> l5 : -1+__rho_7_^0 >= 0, cost: 1
Second rule:
l5 -> l4 : __rho_8_^0'=__rho_8_^post7, 0 == 0, cost: 1
New rule:
l6 -> l4 : __rho_8_^0'=__rho_8_^post7, (0 == 0 /\ -1+__rho_7_^0 >= 0), cost: 2

Applied simplification
Original rule:
l6 -> l4 : __rho_8_^0'=__rho_8_^post7, (0 == 0 /\ -1+__rho_7_^0 >= 0), cost: 2
New rule:
l6 -> l4 : __rho_8_^0'=__rho_8_^post7, -1+__rho_7_^0 >= 0, cost: 2

Applied deletion
Removed the following rules: 59 60 61

Eliminating location l3 by chaining:

Applied chaining
First rule:
l4 -> l3 : __rho_8_^0 <= 0, cost: 1
Second rule:
l3 -> l2 : __rho_9_^0'=__rho_9_^post4, 0 == 0, cost: 1
New rule:
l4 -> l2 : __rho_9_^0'=__rho_9_^post4, (0 == 0 /\ __rho_8_^0 <= 0), cost: 2

Applied simplification
Original rule:
l4 -> l2 : __rho_9_^0'=__rho_9_^post4, (0 == 0 /\ __rho_8_^0 <= 0), cost: 2
New rule:
l4 -> l2 : __rho_9_^0'=__rho_9_^post4, __rho_8_^0 <= 0, cost: 2

Applied chaining
First rule:
l4 -> l3 : -1+__rho_8_^0 >= 0, cost: 1
Second rule:
l3 -> l2 : __rho_9_^0'=__rho_9_^post4, 0 == 0, cost: 1
New rule:
l4 -> l2 : __rho_9_^0'=__rho_9_^post4, (0 == 0 /\ -1+__rho_8_^0 >= 0), cost: 2

Applied simplification
Original rule:
l4 -> l2 : __rho_9_^0'=__rho_9_^post4, (0 == 0 /\ -1+__rho_8_^0 >= 0), cost: 2
New rule:
l4 -> l2 : __rho_9_^0'=__rho_9_^post4, -1+__rho_8_^0 >= 0, cost: 2

Applied deletion
Removed the following rules: 56 57 58

Eliminating location l0 by chaining:

Applied chaining
First rule:
l2 -> l0 : __rho_9_^0 <= 0, cost: 1
Second rule:
l0 -> l1 : AsyncAddressData^0 <= 0, cost: 1
New rule:
l2 -> l1 : (__rho_9_^0 <= 0 /\ AsyncAddressData^0 <= 0), cost: 2

Applied chaining
First rule:
l2 -> l0 : __rho_9_^0 <= 0, cost: 1
Second rule:
l0 -> l1 : -1+AsyncAddressData^0 >= 0, cost: 1
New rule:
l2 -> l1 : (__rho_9_^0 <= 0 /\ -1+AsyncAddressData^0 >= 0), cost: 2

Applied chaining
First rule:
l2 -> l0 : -1+__rho_9_^0 >= 0, cost: 1
Second rule:
l0 -> l1 : AsyncAddressData^0 <= 0, cost: 1
New rule:
l2 -> l1 : (AsyncAddressData^0 <= 0 /\ -1+__rho_9_^0 >= 0), cost: 2

Applied chaining
First rule:
l2 -> l0 : -1+__rho_9_^0 >= 0, cost: 1
Second rule:
l0 -> l1 : -1+AsyncAddressData^0 >= 0, cost: 1
New rule:
l2 -> l1 : (-1+AsyncAddressData^0 >= 0 /\ -1+__rho_9_^0 >= 0), cost: 2

Applied deletion
Removed the following rules: 52 53 54 55

Eliminating location l11 by chaining:

Applied chaining
First rule:
l10 -> l11 : keA^0'=0, k3^0'=k3^post14, __rho_10_^0'=k3^post14, 0 == 0, cost: 1
Second rule:
l11 -> l15 : keR^0'=0, k4^0'=k4^post48, __rho_11_^0'=k4^post48, i___02020^0'=Irql^0, k3^0 <= 0, cost: 1
New rule:
l10 -> l15 : keR^0'=0, k4^0'=k4^post48, __rho_11_^0'=k4^post48, i___02020^0'=Irql^0, keA^0'=0, k3^0'=k3^post14, __rho_10_^0'=k3^post14, (0 == 0 /\ k3^post14 <= 0), cost: 2

Applied simplification
Original rule:
l10 -> l15 : keR^0'=0, k4^0'=k4^post48, __rho_11_^0'=k4^post48, i___02020^0'=Irql^0, keA^0'=0, k3^0'=k3^post14, __rho_10_^0'=k3^post14, (0 == 0 /\ k3^post14 <= 0), cost: 2
New rule:
l10 -> l15 : keR^0'=0, k4^0'=k4^post48, __rho_11_^0'=k4^post48, i___02020^0'=Irql^0, keA^0'=0, k3^0'=k3^post14, __rho_10_^0'=k3^post14, k3^post14 <= 0, cost: 2

Applied chaining
First rule:
l10 -> l11 : keA^0'=0, k3^0'=k3^post14, __rho_10_^0'=k3^post14, 0 == 0, cost: 1
Second rule:
l11 -> l10 : i___01717^0'=Irql^0, IsochDetachData^0'=IsochDetachData^post49, keR^0'=0, i^0'=i^post49, k3^0'=-1+k3^0, a1818^0'=IsochDetachData^post49, -1+k3^0 >= 0, cost: 1
New rule:
l10 -> l10 : i___01717^0'=Irql^0, IsochDetachData^0'=IsochDetachData^post49, keR^0'=0, keA^0'=0, i^0'=i^post49, k3^0'=-1+k3^post14, a1818^0'=IsochDetachData^post49, __rho_10_^0'=k3^post14, (0 == 0 /\ -1+k3^post14 >= 0), cost: 2

Applied simplification
Original rule:
l10 -> l10 : i___01717^0'=Irql^0, IsochDetachData^0'=IsochDetachData^post49, keR^0'=0, keA^0'=0, i^0'=i^post49, k3^0'=-1+k3^post14, a1818^0'=IsochDetachData^post49, __rho_10_^0'=k3^post14, (0 == 0 /\ -1+k3^post14 >= 0), cost: 2
New rule:
l10 -> l10 : i___01717^0'=Irql^0, IsochDetachData^0'=IsochDetachData^post49, keR^0'=0, keA^0'=0, i^0'=i^post49, k3^0'=-1+k3^post14, a1818^0'=IsochDetachData^post49, __rho_10_^0'=k3^post14, -1+k3^post14 >= 0, cost: 2

Applied deletion
Removed the following rules: 66 99 100

Eliminating location l16 by chaining:

Applied chaining
First rule:
l15 -> l16 : keA^0'=0, TRUE, cost: 1
Second rule:
l16 -> l19 : k5^0'=k5^post44, keR^0'=0, keA^0'=0, __rho_13_^0'=k5^post44, i___04040^0'=Irql^0, k4^0 <= 0, cost: 1
New rule:
l15 -> l19 : k5^0'=k5^post44, keR^0'=0, keA^0'=0, __rho_13_^0'=k5^post44, i___04040^0'=Irql^0, k4^0 <= 0, cost: 2

Applied chaining
First rule:
l15 -> l16 : keA^0'=0, TRUE, cost: 1
Second rule:
l16 -> l31 : __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, k4^0'=-1+k4^0, IsochResourceData^0'=__rho_12_^post45, -1+k4^0 >= 0, cost: 1
New rule:
l15 -> l31 : __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, k4^0'=-1+k4^0, IsochResourceData^0'=__rho_12_^post45, keA^0'=0, -1+k4^0 >= 0, cost: 2

Applied deletion
Removed the following rules: 71 95 96

Eliminating location l20 by chaining:

Applied chaining
First rule:
l19 -> l20 : TRUE, cost: 1
Second rule:
l20 -> l24 : __rho_56_^0'=__rho_56_^post31, -1+k5^0 >= 0, cost: 1
New rule:
l19 -> l24 : __rho_56_^0'=__rho_56_^post31, -1+k5^0 >= 0, cost: 2

Applied chaining
First rule:
l19 -> l20 : TRUE, cost: 1
Second rule:
l20 -> [35] : k5^0 <= 0, cost: NONTERM
New rule:
l19 -> [35] : k5^0 <= 0, cost: NONTERM

Applied deletion
Removed the following rules: 78 82 106

Eliminating location l23 by chaining:

Applied chaining
First rule:
l24 -> l23 : __rho_56_^0 <= 0, cost: 1
Second rule:
l23 -> l19 : a4444^0'=1, a4343^0'=2, TRUE, cost: 1
New rule:
l24 -> l19 : a4444^0'=1, a4343^0'=2, __rho_56_^0 <= 0, cost: 2

Applied chaining
First rule:
l24 -> l23 : k5^0'=-1+k5^0, -1+__rho_56_^0 >= 0, cost: 1
Second rule:
l23 -> l19 : a4444^0'=1, a4343^0'=2, TRUE, cost: 1
New rule:
l24 -> l19 : k5^0'=-1+k5^0, a4444^0'=1, a4343^0'=2, -1+__rho_56_^0 >= 0, cost: 2

Applied deletion
Removed the following rules: 79 80 81

Eliminating location l30 by chaining:

Applied chaining
First rule:
l31 -> l30 : b2626^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, a2525^0'=1, pIrb^0'=pIrb^post43, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, -1+IsochResourceData^0 >= 0, cost: 1
Second rule:
l30 -> l29 : -1+ResourceIrp^0 >= 0, cost: 1
New rule:
l31 -> l29 : b2626^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, a2525^0'=1, pIrb^0'=pIrb^post43, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, (-1+ret_IoAllocateIrp2727^post43 >= 0 /\ -1+IsochResourceData^0 >= 0), cost: 2

Applied chaining
First rule:
l31 -> l30 : b2626^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, a2525^0'=1, pIrb^0'=pIrb^post43, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, -1+IsochResourceData^0 >= 0, cost: 1
Second rule:
l30 -> l29 : 1+ResourceIrp^0 <= 0, cost: 1
New rule:
l31 -> l29 : b2626^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, a2525^0'=1, pIrb^0'=pIrb^post43, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, (1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+IsochResourceData^0 >= 0), cost: 2

Applied chaining
First rule:
l31 -> l30 : b2626^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, a2525^0'=1, pIrb^0'=pIrb^post43, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, -1+IsochResourceData^0 >= 0, cost: 1
Second rule:
l30 -> l15 : ResourceIrp^0 == 0, cost: 1
New rule:
l31 -> l15 : b2626^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, a2525^0'=1, pIrb^0'=pIrb^post43, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, (ret_IoAllocateIrp2727^post43 == 0 /\ -1+IsochResourceData^0 >= 0), cost: 2

Applied deletion
Removed the following rules: 90 91 92 94

Eliminating location l27 by chaining:

Applied chaining
First rule:
l29 -> l27 : a2828^0'=1, ret_ExAllocatePool3030^0'=0, pIrb^0'=0, b2929^0'=0, TRUE, cost: 1
Second rule:
l27 -> l15 : a3131^0'=ResourceIrp^0, pIrb^0 <= 0, cost: 1
New rule:
l29 -> l15 : a2828^0'=1, ret_ExAllocatePool3030^0'=0, pIrb^0'=0, a3131^0'=ResourceIrp^0, b2929^0'=0, 0 <= 0, cost: 2

Applied deletion
Removed the following rules: 86 87 89

Eliminating location l17 by chaining:

Applied chaining
First rule:
l18 -> l17 : __rho_4_^0'=__rho_4_^post23, -1+CromData^0 >= 0, cost: 1
Second rule:
l17 -> l14 : __rho_4_^0 <= 0, cost: 1
New rule:
l18 -> l14 : __rho_4_^0'=__rho_4_^post23, (__rho_4_^post23 <= 0 /\ -1+CromData^0 >= 0), cost: 2

Applied chaining
First rule:
l18 -> l17 : __rho_4_^0'=__rho_4_^post23, -1+CromData^0 >= 0, cost: 1
Second rule:
l17 -> l14 : -1+__rho_4_^0 >= 0, cost: 1
New rule:
l18 -> l14 : __rho_4_^0'=__rho_4_^post23, (-1+__rho_4_^post23 >= 0 /\ -1+CromData^0 >= 0), cost: 2

Applied deletion
Removed the following rules: 72 73 75

Eliminating location l13 by chaining:

Applied chaining
First rule:
l14 -> l13 : __rho_5_^0'=__rho_5_^post18, 0 == 0, cost: 1
Second rule:
l13 -> l12 : __rho_5_^0 <= 0, cost: 1
New rule:
l14 -> l12 : __rho_5_^0'=__rho_5_^post18, (0 == 0 /\ __rho_5_^post18 <= 0), cost: 2

Applied simplification
Original rule:
l14 -> l12 : __rho_5_^0'=__rho_5_^post18, (0 == 0 /\ __rho_5_^post18 <= 0), cost: 2
New rule:
l14 -> l12 : __rho_5_^0'=__rho_5_^post18, __rho_5_^post18 <= 0, cost: 2

Applied chaining
First rule:
l14 -> l13 : __rho_5_^0'=__rho_5_^post18, 0 == 0, cost: 1
Second rule:
l13 -> l12 : -1+__rho_5_^0 >= 0, cost: 1
New rule:
l14 -> l12 : __rho_5_^0'=__rho_5_^post18, (0 == 0 /\ -1+__rho_5_^post18 >= 0), cost: 2

Applied simplification
Original rule:
l14 -> l12 : __rho_5_^0'=__rho_5_^post18, (0 == 0 /\ -1+__rho_5_^post18 >= 0), cost: 2
New rule:
l14 -> l12 : __rho_5_^0'=__rho_5_^post18, -1+__rho_5_^post18 >= 0, cost: 2

Applied deletion
Removed the following rules: 68 69 70

Eliminated locations on tree-shaped paths
Start location: l34
 111: l1 -> l6 : k2^0'=-1+k2^0, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, -1+k2^0 >= 0, cost: 2
 112: l1 -> l10 : keR^0'=0, i___01313^0'=Irql^0, k2^0 <= 0, cost: 2
 117: l2 -> l1 : (__rho_9_^0 <= 0 /\ AsyncAddressData^0 <= 0), cost: 2
 118: l2 -> l1 : (__rho_9_^0 <= 0 /\ -1+AsyncAddressData^0 >= 0), cost: 2
 119: l2 -> l1 : (AsyncAddressData^0 <= 0 /\ -1+__rho_9_^0 >= 0), cost: 2
 120: l2 -> l1 : (-1+AsyncAddressData^0 >= 0 /\ -1+__rho_9_^0 >= 0), cost: 2
 115: l4 -> l2 : __rho_9_^0'=__rho_9_^post4, __rho_8_^0 <= 0, cost: 2
 116: l4 -> l2 : __rho_9_^0'=__rho_9_^post4, -1+__rho_8_^0 >= 0, cost: 2
 113: l6 -> l4 : __rho_8_^0'=__rho_8_^post7, __rho_7_^0 <= 0, cost: 2
 114: l6 -> l4 : __rho_8_^0'=__rho_8_^post7, -1+__rho_7_^0 >= 0, cost: 2
 109: l7 -> l18 : CromData^0'=CromData^post24, k1^0'=-1+k1^0, __rho_3_^0'=CromData^post24, -1+k1^0 >= 0, cost: 2
 110: l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=__rho_6_^post25, keR^0'=0, keA^0'=0, i___099^0'=Irql^0, k1^0 <= 0, cost: 2
 121: l10 -> l15 : keR^0'=0, k4^0'=k4^post48, __rho_11_^0'=k4^post48, i___02020^0'=Irql^0, keA^0'=0, k3^0'=k3^post14, __rho_10_^0'=k3^post14, k3^post14 <= 0, cost: 2
 122: l10 -> l10 : i___01717^0'=Irql^0, IsochDetachData^0'=IsochDetachData^post49, keR^0'=0, keA^0'=0, i^0'=i^post49, k3^0'=-1+k3^post14, a1818^0'=IsochDetachData^post49, __rho_10_^0'=k3^post14, -1+k3^post14 >= 0, cost: 2
  67: l12 -> l7 : a77^0'=CromData^0, TRUE, cost: 1
 135: l14 -> l12 : __rho_5_^0'=__rho_5_^post18, __rho_5_^post18 <= 0, cost: 2
 136: l14 -> l12 : __rho_5_^0'=__rho_5_^post18, -1+__rho_5_^post18 >= 0, cost: 2
 123: l15 -> l19 : k5^0'=k5^post44, keR^0'=0, keA^0'=0, __rho_13_^0'=k5^post44, i___04040^0'=Irql^0, k4^0 <= 0, cost: 2
 124: l15 -> l31 : __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, k4^0'=-1+k4^0, IsochResourceData^0'=__rho_12_^post45, keA^0'=0, -1+k4^0 >= 0, cost: 2
  74: l18 -> l7 : CromData^0 <= 0, cost: 1
 133: l18 -> l14 : __rho_4_^0'=__rho_4_^post23, (__rho_4_^post23 <= 0 /\ -1+CromData^0 >= 0), cost: 2
 134: l18 -> l14 : __rho_4_^0'=__rho_4_^post23, (-1+__rho_4_^post23 >= 0 /\ -1+CromData^0 >= 0), cost: 2
 125: l19 -> l24 : __rho_56_^0'=__rho_56_^post31, -1+k5^0 >= 0, cost: 2
 126: l19 -> [35] : k5^0 <= 0, cost: NONTERM
 127: l24 -> l19 : a4444^0'=1, a4343^0'=2, __rho_56_^0 <= 0, cost: 2
 128: l24 -> l19 : k5^0'=-1+k5^0, a4444^0'=1, a4343^0'=2, -1+__rho_56_^0 >= 0, cost: 2
  88: l28 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=__rho_2_^post37, keA^0'=0, 0 == 0, cost: 1
 132: l29 -> l15 : a2828^0'=1, ret_ExAllocatePool3030^0'=0, pIrb^0'=0, a3131^0'=ResourceIrp^0, b2929^0'=0, 0 <= 0, cost: 2
  93: l31 -> l15 : IsochResourceData^0 <= 0, cost: 1
 129: l31 -> l29 : b2626^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, a2525^0'=1, pIrb^0'=pIrb^post43, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, (-1+ret_IoAllocateIrp2727^post43 >= 0 /\ -1+IsochResourceData^0 >= 0), cost: 2
 130: l31 -> l29 : b2626^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, a2525^0'=1, pIrb^0'=pIrb^post43, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, (1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+IsochResourceData^0 >= 0), cost: 2
 131: l31 -> l15 : b2626^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, a2525^0'=1, pIrb^0'=pIrb^post43, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, (ret_IoAllocateIrp2727^post43 == 0 /\ -1+IsochResourceData^0 >= 0), cost: 2
 107: l34 -> l28 : keR^0'=0, __rho_1_^0'=__rho_1_^post50, keA^0'=0, __rho_1_^post50 <= 0, cost: 3
 108: l34 -> l28 : ntStatus^0'=0, ret_t1394Diag_PnpStopDevice33^0'=0, a11^0'=1, keR^0'=0, __rho_1_^0'=__rho_1_^post50, b22^0'=Irp^0, keA^0'=0, -1+__rho_1_^post50 >= 0, cost: 3


Applied nonterm
Original rule:
l10 -> l10 : i___01717^0'=Irql^0, IsochDetachData^0'=IsochDetachData^post49, keR^0'=0, keA^0'=0, i^0'=i^post49, k3^0'=-1+k3^post14, a1818^0'=IsochDetachData^post49, __rho_10_^0'=k3^post14, -1+k3^post14 >= 0, cost: 2
New rule:
l10 -> [36] : (-1+n0 >= 0 /\ -1+k3^post14 >= 0), cost: NONTERM
Sub-proof via acceration calculus written to file:///tmp/tmpnam_pGKfja.txt

Applied deletion
Removed the following rules: 122

Accelerated simple loops
Start location: l34
 111: l1 -> l6 : k2^0'=-1+k2^0, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, -1+k2^0 >= 0, cost: 2
 112: l1 -> l10 : keR^0'=0, i___01313^0'=Irql^0, k2^0 <= 0, cost: 2
 117: l2 -> l1 : (__rho_9_^0 <= 0 /\ AsyncAddressData^0 <= 0), cost: 2
 118: l2 -> l1 : (__rho_9_^0 <= 0 /\ -1+AsyncAddressData^0 >= 0), cost: 2
 119: l2 -> l1 : (AsyncAddressData^0 <= 0 /\ -1+__rho_9_^0 >= 0), cost: 2
 120: l2 -> l1 : (-1+AsyncAddressData^0 >= 0 /\ -1+__rho_9_^0 >= 0), cost: 2
 115: l4 -> l2 : __rho_9_^0'=__rho_9_^post4, __rho_8_^0 <= 0, cost: 2
 116: l4 -> l2 : __rho_9_^0'=__rho_9_^post4, -1+__rho_8_^0 >= 0, cost: 2
 113: l6 -> l4 : __rho_8_^0'=__rho_8_^post7, __rho_7_^0 <= 0, cost: 2
 114: l6 -> l4 : __rho_8_^0'=__rho_8_^post7, -1+__rho_7_^0 >= 0, cost: 2
 109: l7 -> l18 : CromData^0'=CromData^post24, k1^0'=-1+k1^0, __rho_3_^0'=CromData^post24, -1+k1^0 >= 0, cost: 2
 110: l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=__rho_6_^post25, keR^0'=0, keA^0'=0, i___099^0'=Irql^0, k1^0 <= 0, cost: 2
 121: l10 -> l15 : keR^0'=0, k4^0'=k4^post48, __rho_11_^0'=k4^post48, i___02020^0'=Irql^0, keA^0'=0, k3^0'=k3^post14, __rho_10_^0'=k3^post14, k3^post14 <= 0, cost: 2
 137: l10 -> [36] : (-1+n0 >= 0 /\ -1+k3^post14 >= 0), cost: NONTERM
  67: l12 -> l7 : a77^0'=CromData^0, TRUE, cost: 1
 135: l14 -> l12 : __rho_5_^0'=__rho_5_^post18, __rho_5_^post18 <= 0, cost: 2
 136: l14 -> l12 : __rho_5_^0'=__rho_5_^post18, -1+__rho_5_^post18 >= 0, cost: 2
 123: l15 -> l19 : k5^0'=k5^post44, keR^0'=0, keA^0'=0, __rho_13_^0'=k5^post44, i___04040^0'=Irql^0, k4^0 <= 0, cost: 2
 124: l15 -> l31 : __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, k4^0'=-1+k4^0, IsochResourceData^0'=__rho_12_^post45, keA^0'=0, -1+k4^0 >= 0, cost: 2
  74: l18 -> l7 : CromData^0 <= 0, cost: 1
 133: l18 -> l14 : __rho_4_^0'=__rho_4_^post23, (__rho_4_^post23 <= 0 /\ -1+CromData^0 >= 0), cost: 2
 134: l18 -> l14 : __rho_4_^0'=__rho_4_^post23, (-1+__rho_4_^post23 >= 0 /\ -1+CromData^0 >= 0), cost: 2
 125: l19 -> l24 : __rho_56_^0'=__rho_56_^post31, -1+k5^0 >= 0, cost: 2
 126: l19 -> [35] : k5^0 <= 0, cost: NONTERM
 127: l24 -> l19 : a4444^0'=1, a4343^0'=2, __rho_56_^0 <= 0, cost: 2
 128: l24 -> l19 : k5^0'=-1+k5^0, a4444^0'=1, a4343^0'=2, -1+__rho_56_^0 >= 0, cost: 2
  88: l28 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=__rho_2_^post37, keA^0'=0, 0 == 0, cost: 1
 132: l29 -> l15 : a2828^0'=1, ret_ExAllocatePool3030^0'=0, pIrb^0'=0, a3131^0'=ResourceIrp^0, b2929^0'=0, 0 <= 0, cost: 2
  93: l31 -> l15 : IsochResourceData^0 <= 0, cost: 1
 129: l31 -> l29 : b2626^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, a2525^0'=1, pIrb^0'=pIrb^post43, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, (-1+ret_IoAllocateIrp2727^post43 >= 0 /\ -1+IsochResourceData^0 >= 0), cost: 2
 130: l31 -> l29 : b2626^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, a2525^0'=1, pIrb^0'=pIrb^post43, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, (1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+IsochResourceData^0 >= 0), cost: 2
 131: l31 -> l15 : b2626^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, a2525^0'=1, pIrb^0'=pIrb^post43, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, (ret_IoAllocateIrp2727^post43 == 0 /\ -1+IsochResourceData^0 >= 0), cost: 2
 107: l34 -> l28 : keR^0'=0, __rho_1_^0'=__rho_1_^post50, keA^0'=0, __rho_1_^post50 <= 0, cost: 3
 108: l34 -> l28 : ntStatus^0'=0, ret_t1394Diag_PnpStopDevice33^0'=0, a11^0'=1, keR^0'=0, __rho_1_^0'=__rho_1_^post50, b22^0'=Irp^0, keA^0'=0, -1+__rho_1_^post50 >= 0, cost: 3


Applied chaining
First rule:
l1 -> l10 : keR^0'=0, i___01313^0'=Irql^0, k2^0 <= 0, cost: 2
Second rule:
l10 -> [36] : (-1+n0 >= 0 /\ -1+k3^post14 >= 0), cost: NONTERM
New rule:
l1 -> [36] : k2^0 <= 0, cost: NONTERM

Applied deletion
Removed the following rules: 137

Chained accelerated rules with incoming rules
Start location: l34
 111: l1 -> l6 : k2^0'=-1+k2^0, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, -1+k2^0 >= 0, cost: 2
 112: l1 -> l10 : keR^0'=0, i___01313^0'=Irql^0, k2^0 <= 0, cost: 2
 138: l1 -> [36] : k2^0 <= 0, cost: NONTERM
 117: l2 -> l1 : (__rho_9_^0 <= 0 /\ AsyncAddressData^0 <= 0), cost: 2
 118: l2 -> l1 : (__rho_9_^0 <= 0 /\ -1+AsyncAddressData^0 >= 0), cost: 2
 119: l2 -> l1 : (AsyncAddressData^0 <= 0 /\ -1+__rho_9_^0 >= 0), cost: 2
 120: l2 -> l1 : (-1+AsyncAddressData^0 >= 0 /\ -1+__rho_9_^0 >= 0), cost: 2
 115: l4 -> l2 : __rho_9_^0'=__rho_9_^post4, __rho_8_^0 <= 0, cost: 2
 116: l4 -> l2 : __rho_9_^0'=__rho_9_^post4, -1+__rho_8_^0 >= 0, cost: 2
 113: l6 -> l4 : __rho_8_^0'=__rho_8_^post7, __rho_7_^0 <= 0, cost: 2
 114: l6 -> l4 : __rho_8_^0'=__rho_8_^post7, -1+__rho_7_^0 >= 0, cost: 2
 109: l7 -> l18 : CromData^0'=CromData^post24, k1^0'=-1+k1^0, __rho_3_^0'=CromData^post24, -1+k1^0 >= 0, cost: 2
 110: l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=__rho_6_^post25, keR^0'=0, keA^0'=0, i___099^0'=Irql^0, k1^0 <= 0, cost: 2
 121: l10 -> l15 : keR^0'=0, k4^0'=k4^post48, __rho_11_^0'=k4^post48, i___02020^0'=Irql^0, keA^0'=0, k3^0'=k3^post14, __rho_10_^0'=k3^post14, k3^post14 <= 0, cost: 2
  67: l12 -> l7 : a77^0'=CromData^0, TRUE, cost: 1
 135: l14 -> l12 : __rho_5_^0'=__rho_5_^post18, __rho_5_^post18 <= 0, cost: 2
 136: l14 -> l12 : __rho_5_^0'=__rho_5_^post18, -1+__rho_5_^post18 >= 0, cost: 2
 123: l15 -> l19 : k5^0'=k5^post44, keR^0'=0, keA^0'=0, __rho_13_^0'=k5^post44, i___04040^0'=Irql^0, k4^0 <= 0, cost: 2
 124: l15 -> l31 : __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, k4^0'=-1+k4^0, IsochResourceData^0'=__rho_12_^post45, keA^0'=0, -1+k4^0 >= 0, cost: 2
  74: l18 -> l7 : CromData^0 <= 0, cost: 1
 133: l18 -> l14 : __rho_4_^0'=__rho_4_^post23, (__rho_4_^post23 <= 0 /\ -1+CromData^0 >= 0), cost: 2
 134: l18 -> l14 : __rho_4_^0'=__rho_4_^post23, (-1+__rho_4_^post23 >= 0 /\ -1+CromData^0 >= 0), cost: 2
 125: l19 -> l24 : __rho_56_^0'=__rho_56_^post31, -1+k5^0 >= 0, cost: 2
 126: l19 -> [35] : k5^0 <= 0, cost: NONTERM
 127: l24 -> l19 : a4444^0'=1, a4343^0'=2, __rho_56_^0 <= 0, cost: 2
 128: l24 -> l19 : k5^0'=-1+k5^0, a4444^0'=1, a4343^0'=2, -1+__rho_56_^0 >= 0, cost: 2
  88: l28 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=__rho_2_^post37, keA^0'=0, 0 == 0, cost: 1
 132: l29 -> l15 : a2828^0'=1, ret_ExAllocatePool3030^0'=0, pIrb^0'=0, a3131^0'=ResourceIrp^0, b2929^0'=0, 0 <= 0, cost: 2
  93: l31 -> l15 : IsochResourceData^0 <= 0, cost: 1
 129: l31 -> l29 : b2626^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, a2525^0'=1, pIrb^0'=pIrb^post43, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, (-1+ret_IoAllocateIrp2727^post43 >= 0 /\ -1+IsochResourceData^0 >= 0), cost: 2
 130: l31 -> l29 : b2626^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, a2525^0'=1, pIrb^0'=pIrb^post43, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, (1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+IsochResourceData^0 >= 0), cost: 2
 131: l31 -> l15 : b2626^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, a2525^0'=1, pIrb^0'=pIrb^post43, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, (ret_IoAllocateIrp2727^post43 == 0 /\ -1+IsochResourceData^0 >= 0), cost: 2
 107: l34 -> l28 : keR^0'=0, __rho_1_^0'=__rho_1_^post50, keA^0'=0, __rho_1_^post50 <= 0, cost: 3
 108: l34 -> l28 : ntStatus^0'=0, ret_t1394Diag_PnpStopDevice33^0'=0, a11^0'=1, keR^0'=0, __rho_1_^0'=__rho_1_^post50, b22^0'=Irp^0, keA^0'=0, -1+__rho_1_^post50 >= 0, cost: 3


Eliminating location l10 by chaining:

Applied chaining
First rule:
l1 -> l10 : keR^0'=0, i___01313^0'=Irql^0, k2^0 <= 0, cost: 2
Second rule:
l10 -> l15 : keR^0'=0, k4^0'=k4^post48, __rho_11_^0'=k4^post48, i___02020^0'=Irql^0, keA^0'=0, k3^0'=k3^post14, __rho_10_^0'=k3^post14, k3^post14 <= 0, cost: 2
New rule:
l1 -> l15 : keR^0'=0, i___01313^0'=Irql^0, k4^0'=k4^post48, __rho_11_^0'=k4^post48, i___02020^0'=Irql^0, keA^0'=0, k3^0'=k3^post14, __rho_10_^0'=k3^post14, (k2^0 <= 0 /\ k3^post14 <= 0), cost: 4

Applied deletion
Removed the following rules: 112 121

Eliminated locations on linear paths
Start location: l34
 111: l1 -> l6 : k2^0'=-1+k2^0, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, -1+k2^0 >= 0, cost: 2
 138: l1 -> [36] : k2^0 <= 0, cost: NONTERM
 139: l1 -> l15 : keR^0'=0, i___01313^0'=Irql^0, k4^0'=k4^post48, __rho_11_^0'=k4^post48, i___02020^0'=Irql^0, keA^0'=0, k3^0'=k3^post14, __rho_10_^0'=k3^post14, (k2^0 <= 0 /\ k3^post14 <= 0), cost: 4
 117: l2 -> l1 : (__rho_9_^0 <= 0 /\ AsyncAddressData^0 <= 0), cost: 2
 118: l2 -> l1 : (__rho_9_^0 <= 0 /\ -1+AsyncAddressData^0 >= 0), cost: 2
 119: l2 -> l1 : (AsyncAddressData^0 <= 0 /\ -1+__rho_9_^0 >= 0), cost: 2
 120: l2 -> l1 : (-1+AsyncAddressData^0 >= 0 /\ -1+__rho_9_^0 >= 0), cost: 2
 115: l4 -> l2 : __rho_9_^0'=__rho_9_^post4, __rho_8_^0 <= 0, cost: 2
 116: l4 -> l2 : __rho_9_^0'=__rho_9_^post4, -1+__rho_8_^0 >= 0, cost: 2
 113: l6 -> l4 : __rho_8_^0'=__rho_8_^post7, __rho_7_^0 <= 0, cost: 2
 114: l6 -> l4 : __rho_8_^0'=__rho_8_^post7, -1+__rho_7_^0 >= 0, cost: 2
 109: l7 -> l18 : CromData^0'=CromData^post24, k1^0'=-1+k1^0, __rho_3_^0'=CromData^post24, -1+k1^0 >= 0, cost: 2
 110: l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=__rho_6_^post25, keR^0'=0, keA^0'=0, i___099^0'=Irql^0, k1^0 <= 0, cost: 2
  67: l12 -> l7 : a77^0'=CromData^0, TRUE, cost: 1
 135: l14 -> l12 : __rho_5_^0'=__rho_5_^post18, __rho_5_^post18 <= 0, cost: 2
 136: l14 -> l12 : __rho_5_^0'=__rho_5_^post18, -1+__rho_5_^post18 >= 0, cost: 2
 123: l15 -> l19 : k5^0'=k5^post44, keR^0'=0, keA^0'=0, __rho_13_^0'=k5^post44, i___04040^0'=Irql^0, k4^0 <= 0, cost: 2
 124: l15 -> l31 : __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, k4^0'=-1+k4^0, IsochResourceData^0'=__rho_12_^post45, keA^0'=0, -1+k4^0 >= 0, cost: 2
  74: l18 -> l7 : CromData^0 <= 0, cost: 1
 133: l18 -> l14 : __rho_4_^0'=__rho_4_^post23, (__rho_4_^post23 <= 0 /\ -1+CromData^0 >= 0), cost: 2
 134: l18 -> l14 : __rho_4_^0'=__rho_4_^post23, (-1+__rho_4_^post23 >= 0 /\ -1+CromData^0 >= 0), cost: 2
 125: l19 -> l24 : __rho_56_^0'=__rho_56_^post31, -1+k5^0 >= 0, cost: 2
 126: l19 -> [35] : k5^0 <= 0, cost: NONTERM
 127: l24 -> l19 : a4444^0'=1, a4343^0'=2, __rho_56_^0 <= 0, cost: 2
 128: l24 -> l19 : k5^0'=-1+k5^0, a4444^0'=1, a4343^0'=2, -1+__rho_56_^0 >= 0, cost: 2
  88: l28 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=__rho_2_^post37, keA^0'=0, 0 == 0, cost: 1
 132: l29 -> l15 : a2828^0'=1, ret_ExAllocatePool3030^0'=0, pIrb^0'=0, a3131^0'=ResourceIrp^0, b2929^0'=0, 0 <= 0, cost: 2
  93: l31 -> l15 : IsochResourceData^0 <= 0, cost: 1
 129: l31 -> l29 : b2626^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, a2525^0'=1, pIrb^0'=pIrb^post43, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, (-1+ret_IoAllocateIrp2727^post43 >= 0 /\ -1+IsochResourceData^0 >= 0), cost: 2
 130: l31 -> l29 : b2626^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, a2525^0'=1, pIrb^0'=pIrb^post43, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, (1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+IsochResourceData^0 >= 0), cost: 2
 131: l31 -> l15 : b2626^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, a2525^0'=1, pIrb^0'=pIrb^post43, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, (ret_IoAllocateIrp2727^post43 == 0 /\ -1+IsochResourceData^0 >= 0), cost: 2
 107: l34 -> l28 : keR^0'=0, __rho_1_^0'=__rho_1_^post50, keA^0'=0, __rho_1_^post50 <= 0, cost: 3
 108: l34 -> l28 : ntStatus^0'=0, ret_t1394Diag_PnpStopDevice33^0'=0, a11^0'=1, keR^0'=0, __rho_1_^0'=__rho_1_^post50, b22^0'=Irp^0, keA^0'=0, -1+__rho_1_^post50 >= 0, cost: 3


Eliminating location l28 by chaining:

Applied chaining
First rule:
l34 -> l28 : keR^0'=0, __rho_1_^0'=__rho_1_^post50, keA^0'=0, __rho_1_^post50 <= 0, cost: 3
Second rule:
l28 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=__rho_2_^post37, keA^0'=0, 0 == 0, cost: 1
New rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=__rho_2_^post37, keA^0'=0, (0 == 0 /\ __rho_1_^post50 <= 0), cost: 4

Applied simplification
Original rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=__rho_2_^post37, keA^0'=0, (0 == 0 /\ __rho_1_^post50 <= 0), cost: 4
New rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=__rho_2_^post37, keA^0'=0, __rho_1_^post50 <= 0, cost: 4

Applied chaining
First rule:
l34 -> l28 : ntStatus^0'=0, ret_t1394Diag_PnpStopDevice33^0'=0, a11^0'=1, keR^0'=0, __rho_1_^0'=__rho_1_^post50, b22^0'=Irp^0, keA^0'=0, -1+__rho_1_^post50 >= 0, cost: 3
Second rule:
l28 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=__rho_2_^post37, keA^0'=0, 0 == 0, cost: 1
New rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, a11^0'=1, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=__rho_2_^post37, keA^0'=0, (0 == 0 /\ -1+__rho_1_^post50 >= 0), cost: 4

Applied simplification
Original rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, a11^0'=1, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=__rho_2_^post37, keA^0'=0, (0 == 0 /\ -1+__rho_1_^post50 >= 0), cost: 4
New rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, a11^0'=1, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=__rho_2_^post37, keA^0'=0, -1+__rho_1_^post50 >= 0, cost: 4

Applied deletion
Removed the following rules: 88 107 108

Eliminating location l18 by chaining:

Applied chaining
First rule:
l7 -> l18 : CromData^0'=CromData^post24, k1^0'=-1+k1^0, __rho_3_^0'=CromData^post24, -1+k1^0 >= 0, cost: 2
Second rule:
l18 -> l7 : CromData^0 <= 0, cost: 1
New rule:
l7 -> l7 : CromData^0'=CromData^post24, k1^0'=-1+k1^0, __rho_3_^0'=CromData^post24, (CromData^post24 <= 0 /\ -1+k1^0 >= 0), cost: 3

Applied chaining
First rule:
l7 -> l18 : CromData^0'=CromData^post24, k1^0'=-1+k1^0, __rho_3_^0'=CromData^post24, -1+k1^0 >= 0, cost: 2
Second rule:
l18 -> l14 : __rho_4_^0'=__rho_4_^post23, (__rho_4_^post23 <= 0 /\ -1+CromData^0 >= 0), cost: 2
New rule:
l7 -> l14 : CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k1^0'=-1+k1^0, __rho_3_^0'=CromData^post24, (__rho_4_^post23 <= 0 /\ -1+CromData^post24 >= 0 /\ -1+k1^0 >= 0), cost: 4

Applied chaining
First rule:
l7 -> l18 : CromData^0'=CromData^post24, k1^0'=-1+k1^0, __rho_3_^0'=CromData^post24, -1+k1^0 >= 0, cost: 2
Second rule:
l18 -> l14 : __rho_4_^0'=__rho_4_^post23, (-1+__rho_4_^post23 >= 0 /\ -1+CromData^0 >= 0), cost: 2
New rule:
l7 -> l14 : CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k1^0'=-1+k1^0, __rho_3_^0'=CromData^post24, (-1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+k1^0 >= 0), cost: 4

Applied deletion
Removed the following rules: 74 109 133 134

Eliminating location l6 by chaining:

Applied chaining
First rule:
l1 -> l6 : k2^0'=-1+k2^0, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, -1+k2^0 >= 0, cost: 2
Second rule:
l6 -> l4 : __rho_8_^0'=__rho_8_^post7, __rho_7_^0 <= 0, cost: 2
New rule:
l1 -> l4 : k2^0'=-1+k2^0, __rho_8_^0'=__rho_8_^post7, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (-1+k2^0 >= 0 /\ __rho_7_^post11 <= 0), cost: 4

Applied chaining
First rule:
l1 -> l6 : k2^0'=-1+k2^0, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, -1+k2^0 >= 0, cost: 2
Second rule:
l6 -> l4 : __rho_8_^0'=__rho_8_^post7, -1+__rho_7_^0 >= 0, cost: 2
New rule:
l1 -> l4 : k2^0'=-1+k2^0, __rho_8_^0'=__rho_8_^post7, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (-1+__rho_7_^post11 >= 0 /\ -1+k2^0 >= 0), cost: 4

Applied deletion
Removed the following rules: 111 113 114

Eliminating location l2 by chaining:

Applied chaining
First rule:
l4 -> l2 : __rho_9_^0'=__rho_9_^post4, __rho_8_^0 <= 0, cost: 2
Second rule:
l2 -> l1 : (__rho_9_^0 <= 0 /\ AsyncAddressData^0 <= 0), cost: 2
New rule:
l4 -> l1 : __rho_9_^0'=__rho_9_^post4, (__rho_8_^0 <= 0 /\ AsyncAddressData^0 <= 0 /\ __rho_9_^post4 <= 0), cost: 4

Applied chaining
First rule:
l4 -> l2 : __rho_9_^0'=__rho_9_^post4, __rho_8_^0 <= 0, cost: 2
Second rule:
l2 -> l1 : (__rho_9_^0 <= 0 /\ -1+AsyncAddressData^0 >= 0), cost: 2
New rule:
l4 -> l1 : __rho_9_^0'=__rho_9_^post4, (__rho_8_^0 <= 0 /\ __rho_9_^post4 <= 0 /\ -1+AsyncAddressData^0 >= 0), cost: 4

Applied chaining
First rule:
l4 -> l2 : __rho_9_^0'=__rho_9_^post4, __rho_8_^0 <= 0, cost: 2
Second rule:
l2 -> l1 : (AsyncAddressData^0 <= 0 /\ -1+__rho_9_^0 >= 0), cost: 2
New rule:
l4 -> l1 : __rho_9_^0'=__rho_9_^post4, (__rho_8_^0 <= 0 /\ -1+__rho_9_^post4 >= 0 /\ AsyncAddressData^0 <= 0), cost: 4

Applied chaining
First rule:
l4 -> l2 : __rho_9_^0'=__rho_9_^post4, __rho_8_^0 <= 0, cost: 2
Second rule:
l2 -> l1 : (-1+AsyncAddressData^0 >= 0 /\ -1+__rho_9_^0 >= 0), cost: 2
New rule:
l4 -> l1 : __rho_9_^0'=__rho_9_^post4, (__rho_8_^0 <= 0 /\ -1+__rho_9_^post4 >= 0 /\ -1+AsyncAddressData^0 >= 0), cost: 4

Applied chaining
First rule:
l4 -> l2 : __rho_9_^0'=__rho_9_^post4, -1+__rho_8_^0 >= 0, cost: 2
Second rule:
l2 -> l1 : (__rho_9_^0 <= 0 /\ AsyncAddressData^0 <= 0), cost: 2
New rule:
l4 -> l1 : __rho_9_^0'=__rho_9_^post4, (-1+__rho_8_^0 >= 0 /\ AsyncAddressData^0 <= 0 /\ __rho_9_^post4 <= 0), cost: 4

Applied chaining
First rule:
l4 -> l2 : __rho_9_^0'=__rho_9_^post4, -1+__rho_8_^0 >= 0, cost: 2
Second rule:
l2 -> l1 : (__rho_9_^0 <= 0 /\ -1+AsyncAddressData^0 >= 0), cost: 2
New rule:
l4 -> l1 : __rho_9_^0'=__rho_9_^post4, (-1+__rho_8_^0 >= 0 /\ __rho_9_^post4 <= 0 /\ -1+AsyncAddressData^0 >= 0), cost: 4

Applied chaining
First rule:
l4 -> l2 : __rho_9_^0'=__rho_9_^post4, -1+__rho_8_^0 >= 0, cost: 2
Second rule:
l2 -> l1 : (AsyncAddressData^0 <= 0 /\ -1+__rho_9_^0 >= 0), cost: 2
New rule:
l4 -> l1 : __rho_9_^0'=__rho_9_^post4, (-1+__rho_9_^post4 >= 0 /\ -1+__rho_8_^0 >= 0 /\ AsyncAddressData^0 <= 0), cost: 4

Applied chaining
First rule:
l4 -> l2 : __rho_9_^0'=__rho_9_^post4, -1+__rho_8_^0 >= 0, cost: 2
Second rule:
l2 -> l1 : (-1+AsyncAddressData^0 >= 0 /\ -1+__rho_9_^0 >= 0), cost: 2
New rule:
l4 -> l1 : __rho_9_^0'=__rho_9_^post4, (-1+__rho_9_^post4 >= 0 /\ -1+__rho_8_^0 >= 0 /\ -1+AsyncAddressData^0 >= 0), cost: 4

Applied deletion
Removed the following rules: 115 116 117 118 119 120

Eliminating location l31 by chaining:

Applied chaining
First rule:
l15 -> l31 : __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, k4^0'=-1+k4^0, IsochResourceData^0'=__rho_12_^post45, keA^0'=0, -1+k4^0 >= 0, cost: 2
Second rule:
l31 -> l15 : IsochResourceData^0 <= 0, cost: 1
New rule:
l15 -> l15 : __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, k4^0'=-1+k4^0, IsochResourceData^0'=__rho_12_^post45, keA^0'=0, (-1+k4^0 >= 0 /\ __rho_12_^post45 <= 0), cost: 3

Applied chaining
First rule:
l15 -> l31 : __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, k4^0'=-1+k4^0, IsochResourceData^0'=__rho_12_^post45, keA^0'=0, -1+k4^0 >= 0, cost: 2
Second rule:
l31 -> l29 : b2626^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, a2525^0'=1, pIrb^0'=pIrb^post43, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, (-1+ret_IoAllocateIrp2727^post43 >= 0 /\ -1+IsochResourceData^0 >= 0), cost: 2
New rule:
l15 -> l29 : b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, k4^0'=-1+k4^0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=pIrb^post43, keA^0'=0, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, (-1+k4^0 >= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0), cost: 4

Applied chaining
First rule:
l15 -> l31 : __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, k4^0'=-1+k4^0, IsochResourceData^0'=__rho_12_^post45, keA^0'=0, -1+k4^0 >= 0, cost: 2
Second rule:
l31 -> l29 : b2626^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, a2525^0'=1, pIrb^0'=pIrb^post43, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, (1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+IsochResourceData^0 >= 0), cost: 2
New rule:
l15 -> l29 : b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, k4^0'=-1+k4^0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=pIrb^post43, keA^0'=0, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, (-1+k4^0 >= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0), cost: 4

Applied chaining
First rule:
l15 -> l31 : __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, k4^0'=-1+k4^0, IsochResourceData^0'=__rho_12_^post45, keA^0'=0, -1+k4^0 >= 0, cost: 2
Second rule:
l31 -> l15 : b2626^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, a2525^0'=1, pIrb^0'=pIrb^post43, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, (ret_IoAllocateIrp2727^post43 == 0 /\ -1+IsochResourceData^0 >= 0), cost: 2
New rule:
l15 -> l15 : b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, k4^0'=-1+k4^0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=pIrb^post43, keA^0'=0, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, (-1+k4^0 >= 0 /\ -1+__rho_12_^post45 >= 0 /\ ret_IoAllocateIrp2727^post43 == 0), cost: 4

Applied deletion
Removed the following rules: 93 124 129 130 131

Eliminating location l24 by chaining:

Applied chaining
First rule:
l19 -> l24 : __rho_56_^0'=__rho_56_^post31, -1+k5^0 >= 0, cost: 2
Second rule:
l24 -> l19 : a4444^0'=1, a4343^0'=2, __rho_56_^0 <= 0, cost: 2
New rule:
l19 -> l19 : a4444^0'=1, a4343^0'=2, __rho_56_^0'=__rho_56_^post31, (__rho_56_^post31 <= 0 /\ -1+k5^0 >= 0), cost: 4

Applied chaining
First rule:
l19 -> l24 : __rho_56_^0'=__rho_56_^post31, -1+k5^0 >= 0, cost: 2
Second rule:
l24 -> l19 : k5^0'=-1+k5^0, a4444^0'=1, a4343^0'=2, -1+__rho_56_^0 >= 0, cost: 2
New rule:
l19 -> l19 : k5^0'=-1+k5^0, a4444^0'=1, a4343^0'=2, __rho_56_^0'=__rho_56_^post31, (-1+__rho_56_^post31 >= 0 /\ -1+k5^0 >= 0), cost: 4

Applied deletion
Removed the following rules: 125 127 128

Eliminating location l12 by chaining:

Applied chaining
First rule:
l14 -> l12 : __rho_5_^0'=__rho_5_^post18, __rho_5_^post18 <= 0, cost: 2
Second rule:
l12 -> l7 : a77^0'=CromData^0, TRUE, cost: 1
New rule:
l14 -> l7 : __rho_5_^0'=__rho_5_^post18, a77^0'=CromData^0, __rho_5_^post18 <= 0, cost: 3

Applied chaining
First rule:
l14 -> l12 : __rho_5_^0'=__rho_5_^post18, -1+__rho_5_^post18 >= 0, cost: 2
Second rule:
l12 -> l7 : a77^0'=CromData^0, TRUE, cost: 1
New rule:
l14 -> l7 : __rho_5_^0'=__rho_5_^post18, a77^0'=CromData^0, -1+__rho_5_^post18 >= 0, cost: 3

Applied deletion
Removed the following rules: 67 135 136

Eliminated locations on tree-shaped paths
Start location: l34
 138: l1 -> [36] : k2^0 <= 0, cost: NONTERM
 139: l1 -> l15 : keR^0'=0, i___01313^0'=Irql^0, k4^0'=k4^post48, __rho_11_^0'=k4^post48, i___02020^0'=Irql^0, keA^0'=0, k3^0'=k3^post14, __rho_10_^0'=k3^post14, (k2^0 <= 0 /\ k3^post14 <= 0), cost: 4
 145: l1 -> l4 : k2^0'=-1+k2^0, __rho_8_^0'=__rho_8_^post7, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (-1+k2^0 >= 0 /\ __rho_7_^post11 <= 0), cost: 4
 146: l1 -> l4 : k2^0'=-1+k2^0, __rho_8_^0'=__rho_8_^post7, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (-1+__rho_7_^post11 >= 0 /\ -1+k2^0 >= 0), cost: 4
 147: l4 -> l1 : __rho_9_^0'=__rho_9_^post4, (__rho_8_^0 <= 0 /\ AsyncAddressData^0 <= 0 /\ __rho_9_^post4 <= 0), cost: 4
 148: l4 -> l1 : __rho_9_^0'=__rho_9_^post4, (__rho_8_^0 <= 0 /\ __rho_9_^post4 <= 0 /\ -1+AsyncAddressData^0 >= 0), cost: 4
 149: l4 -> l1 : __rho_9_^0'=__rho_9_^post4, (__rho_8_^0 <= 0 /\ -1+__rho_9_^post4 >= 0 /\ AsyncAddressData^0 <= 0), cost: 4
 150: l4 -> l1 : __rho_9_^0'=__rho_9_^post4, (__rho_8_^0 <= 0 /\ -1+__rho_9_^post4 >= 0 /\ -1+AsyncAddressData^0 >= 0), cost: 4
 151: l4 -> l1 : __rho_9_^0'=__rho_9_^post4, (-1+__rho_8_^0 >= 0 /\ AsyncAddressData^0 <= 0 /\ __rho_9_^post4 <= 0), cost: 4
 152: l4 -> l1 : __rho_9_^0'=__rho_9_^post4, (-1+__rho_8_^0 >= 0 /\ __rho_9_^post4 <= 0 /\ -1+AsyncAddressData^0 >= 0), cost: 4
 153: l4 -> l1 : __rho_9_^0'=__rho_9_^post4, (-1+__rho_9_^post4 >= 0 /\ -1+__rho_8_^0 >= 0 /\ AsyncAddressData^0 <= 0), cost: 4
 154: l4 -> l1 : __rho_9_^0'=__rho_9_^post4, (-1+__rho_9_^post4 >= 0 /\ -1+__rho_8_^0 >= 0 /\ -1+AsyncAddressData^0 >= 0), cost: 4
 110: l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=__rho_6_^post25, keR^0'=0, keA^0'=0, i___099^0'=Irql^0, k1^0 <= 0, cost: 2
 142: l7 -> l7 : CromData^0'=CromData^post24, k1^0'=-1+k1^0, __rho_3_^0'=CromData^post24, (CromData^post24 <= 0 /\ -1+k1^0 >= 0), cost: 3
 143: l7 -> l14 : CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k1^0'=-1+k1^0, __rho_3_^0'=CromData^post24, (__rho_4_^post23 <= 0 /\ -1+CromData^post24 >= 0 /\ -1+k1^0 >= 0), cost: 4
 144: l7 -> l14 : CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k1^0'=-1+k1^0, __rho_3_^0'=CromData^post24, (-1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+k1^0 >= 0), cost: 4
 161: l14 -> l7 : __rho_5_^0'=__rho_5_^post18, a77^0'=CromData^0, __rho_5_^post18 <= 0, cost: 3
 162: l14 -> l7 : __rho_5_^0'=__rho_5_^post18, a77^0'=CromData^0, -1+__rho_5_^post18 >= 0, cost: 3
 123: l15 -> l19 : k5^0'=k5^post44, keR^0'=0, keA^0'=0, __rho_13_^0'=k5^post44, i___04040^0'=Irql^0, k4^0 <= 0, cost: 2
 155: l15 -> l15 : __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, k4^0'=-1+k4^0, IsochResourceData^0'=__rho_12_^post45, keA^0'=0, (-1+k4^0 >= 0 /\ __rho_12_^post45 <= 0), cost: 3
 156: l15 -> l29 : b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, k4^0'=-1+k4^0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=pIrb^post43, keA^0'=0, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, (-1+k4^0 >= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0), cost: 4
 157: l15 -> l29 : b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, k4^0'=-1+k4^0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=pIrb^post43, keA^0'=0, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, (-1+k4^0 >= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0), cost: 4
 158: l15 -> l15 : b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, k4^0'=-1+k4^0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=pIrb^post43, keA^0'=0, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, (-1+k4^0 >= 0 /\ -1+__rho_12_^post45 >= 0 /\ ret_IoAllocateIrp2727^post43 == 0), cost: 4
 126: l19 -> [35] : k5^0 <= 0, cost: NONTERM
 159: l19 -> l19 : a4444^0'=1, a4343^0'=2, __rho_56_^0'=__rho_56_^post31, (__rho_56_^post31 <= 0 /\ -1+k5^0 >= 0), cost: 4
 160: l19 -> l19 : k5^0'=-1+k5^0, a4444^0'=1, a4343^0'=2, __rho_56_^0'=__rho_56_^post31, (-1+__rho_56_^post31 >= 0 /\ -1+k5^0 >= 0), cost: 4
 132: l29 -> l15 : a2828^0'=1, ret_ExAllocatePool3030^0'=0, pIrb^0'=0, a3131^0'=ResourceIrp^0, b2929^0'=0, 0 <= 0, cost: 2
 140: l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=__rho_2_^post37, keA^0'=0, __rho_1_^post50 <= 0, cost: 4
 141: l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, a11^0'=1, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=__rho_2_^post37, keA^0'=0, -1+__rho_1_^post50 >= 0, cost: 4


Applied pruning (of leafs and parallel rules):
Start location: l34
 138: l1 -> [36] : k2^0 <= 0, cost: NONTERM
 139: l1 -> l15 : keR^0'=0, i___01313^0'=Irql^0, k4^0'=k4^post48, __rho_11_^0'=k4^post48, i___02020^0'=Irql^0, keA^0'=0, k3^0'=k3^post14, __rho_10_^0'=k3^post14, (k2^0 <= 0 /\ k3^post14 <= 0), cost: 4
 145: l1 -> l4 : k2^0'=-1+k2^0, __rho_8_^0'=__rho_8_^post7, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (-1+k2^0 >= 0 /\ __rho_7_^post11 <= 0), cost: 4
 146: l1 -> l4 : k2^0'=-1+k2^0, __rho_8_^0'=__rho_8_^post7, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (-1+__rho_7_^post11 >= 0 /\ -1+k2^0 >= 0), cost: 4
 147: l4 -> l1 : __rho_9_^0'=__rho_9_^post4, (__rho_8_^0 <= 0 /\ AsyncAddressData^0 <= 0 /\ __rho_9_^post4 <= 0), cost: 4
 148: l4 -> l1 : __rho_9_^0'=__rho_9_^post4, (__rho_8_^0 <= 0 /\ __rho_9_^post4 <= 0 /\ -1+AsyncAddressData^0 >= 0), cost: 4
 150: l4 -> l1 : __rho_9_^0'=__rho_9_^post4, (__rho_8_^0 <= 0 /\ -1+__rho_9_^post4 >= 0 /\ -1+AsyncAddressData^0 >= 0), cost: 4
 151: l4 -> l1 : __rho_9_^0'=__rho_9_^post4, (-1+__rho_8_^0 >= 0 /\ AsyncAddressData^0 <= 0 /\ __rho_9_^post4 <= 0), cost: 4
 152: l4 -> l1 : __rho_9_^0'=__rho_9_^post4, (-1+__rho_8_^0 >= 0 /\ __rho_9_^post4 <= 0 /\ -1+AsyncAddressData^0 >= 0), cost: 4
 110: l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=__rho_6_^post25, keR^0'=0, keA^0'=0, i___099^0'=Irql^0, k1^0 <= 0, cost: 2
 142: l7 -> l7 : CromData^0'=CromData^post24, k1^0'=-1+k1^0, __rho_3_^0'=CromData^post24, (CromData^post24 <= 0 /\ -1+k1^0 >= 0), cost: 3
 143: l7 -> l14 : CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k1^0'=-1+k1^0, __rho_3_^0'=CromData^post24, (__rho_4_^post23 <= 0 /\ -1+CromData^post24 >= 0 /\ -1+k1^0 >= 0), cost: 4
 144: l7 -> l14 : CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k1^0'=-1+k1^0, __rho_3_^0'=CromData^post24, (-1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+k1^0 >= 0), cost: 4
 161: l14 -> l7 : __rho_5_^0'=__rho_5_^post18, a77^0'=CromData^0, __rho_5_^post18 <= 0, cost: 3
 162: l14 -> l7 : __rho_5_^0'=__rho_5_^post18, a77^0'=CromData^0, -1+__rho_5_^post18 >= 0, cost: 3
 123: l15 -> l19 : k5^0'=k5^post44, keR^0'=0, keA^0'=0, __rho_13_^0'=k5^post44, i___04040^0'=Irql^0, k4^0 <= 0, cost: 2
 155: l15 -> l15 : __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, k4^0'=-1+k4^0, IsochResourceData^0'=__rho_12_^post45, keA^0'=0, (-1+k4^0 >= 0 /\ __rho_12_^post45 <= 0), cost: 3
 156: l15 -> l29 : b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, k4^0'=-1+k4^0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=pIrb^post43, keA^0'=0, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, (-1+k4^0 >= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0), cost: 4
 157: l15 -> l29 : b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, k4^0'=-1+k4^0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=pIrb^post43, keA^0'=0, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, (-1+k4^0 >= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0), cost: 4
 158: l15 -> l15 : b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, k4^0'=-1+k4^0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=pIrb^post43, keA^0'=0, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, (-1+k4^0 >= 0 /\ -1+__rho_12_^post45 >= 0 /\ ret_IoAllocateIrp2727^post43 == 0), cost: 4
 126: l19 -> [35] : k5^0 <= 0, cost: NONTERM
 159: l19 -> l19 : a4444^0'=1, a4343^0'=2, __rho_56_^0'=__rho_56_^post31, (__rho_56_^post31 <= 0 /\ -1+k5^0 >= 0), cost: 4
 160: l19 -> l19 : k5^0'=-1+k5^0, a4444^0'=1, a4343^0'=2, __rho_56_^0'=__rho_56_^post31, (-1+__rho_56_^post31 >= 0 /\ -1+k5^0 >= 0), cost: 4
 132: l29 -> l15 : a2828^0'=1, ret_ExAllocatePool3030^0'=0, pIrb^0'=0, a3131^0'=ResourceIrp^0, b2929^0'=0, 0 <= 0, cost: 2
 140: l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=__rho_2_^post37, keA^0'=0, __rho_1_^post50 <= 0, cost: 4
 141: l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, a11^0'=1, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=__rho_2_^post37, keA^0'=0, -1+__rho_1_^post50 >= 0, cost: 4


Applied acceleration
Original rule:
l7 -> l7 : CromData^0'=CromData^post24, k1^0'=-1+k1^0, __rho_3_^0'=CromData^post24, (CromData^post24 <= 0 /\ -1+k1^0 >= 0), cost: 3
New rule:
l7 -> l7 : CromData^0'=CromData^post24, k1^0'=k1^0-n1, __rho_3_^0'=CromData^post24, (-1+n1 >= 0 /\ k1^0-n1 >= 0 /\ -CromData^post24 >= 0), cost: 3*n1
Sub-proof via acceration calculus written to file:///tmp/tmpnam_EGIBef.txt

Applied instantiation
Original rule:
l7 -> l7 : CromData^0'=CromData^post24, k1^0'=k1^0-n1, __rho_3_^0'=CromData^post24, (-1+n1 >= 0 /\ k1^0-n1 >= 0 /\ -CromData^post24 >= 0), cost: 3*n1
New rule:
l7 -> l7 : CromData^0'=CromData^post24, k1^0'=0, __rho_3_^0'=CromData^post24, (0 >= 0 /\ -CromData^post24 >= 0 /\ -1+k1^0 >= 0), cost: 3*k1^0

Applied simplification
Original rule:
l7 -> l7 : CromData^0'=CromData^post24, k1^0'=0, __rho_3_^0'=CromData^post24, (0 >= 0 /\ -CromData^post24 >= 0 /\ -1+k1^0 >= 0), cost: 3*k1^0
New rule:
l7 -> l7 : CromData^0'=CromData^post24, k1^0'=0, __rho_3_^0'=CromData^post24, (CromData^post24 <= 0 /\ -1+k1^0 >= 0), cost: 3*k1^0

Applied deletion
Removed the following rules: 142

Applied simplification
Original rule:
l15 -> l15 : b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, k4^0'=-1+k4^0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=pIrb^post43, keA^0'=0, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, (-1+k4^0 >= 0 /\ -1+__rho_12_^post45 >= 0 /\ ret_IoAllocateIrp2727^post43 == 0), cost: 4
New rule:
l15 -> l15 : b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, ResourceIrp^0'=0, k4^0'=-1+k4^0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=pIrb^post43, keA^0'=0, ret_IoAllocateIrp2727^0'=0, __rho_99_^0'=0, (-1+k4^0 >= 0 /\ -1+__rho_12_^post45 >= 0), cost: 4

Simplified simple loops
Start location: l34
 138: l1 -> [36] : k2^0 <= 0, cost: NONTERM
 139: l1 -> l15 : keR^0'=0, i___01313^0'=Irql^0, k4^0'=k4^post48, __rho_11_^0'=k4^post48, i___02020^0'=Irql^0, keA^0'=0, k3^0'=k3^post14, __rho_10_^0'=k3^post14, (k2^0 <= 0 /\ k3^post14 <= 0), cost: 4
 145: l1 -> l4 : k2^0'=-1+k2^0, __rho_8_^0'=__rho_8_^post7, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (-1+k2^0 >= 0 /\ __rho_7_^post11 <= 0), cost: 4
 146: l1 -> l4 : k2^0'=-1+k2^0, __rho_8_^0'=__rho_8_^post7, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (-1+__rho_7_^post11 >= 0 /\ -1+k2^0 >= 0), cost: 4
 147: l4 -> l1 : __rho_9_^0'=__rho_9_^post4, (__rho_8_^0 <= 0 /\ AsyncAddressData^0 <= 0 /\ __rho_9_^post4 <= 0), cost: 4
 148: l4 -> l1 : __rho_9_^0'=__rho_9_^post4, (__rho_8_^0 <= 0 /\ __rho_9_^post4 <= 0 /\ -1+AsyncAddressData^0 >= 0), cost: 4
 150: l4 -> l1 : __rho_9_^0'=__rho_9_^post4, (__rho_8_^0 <= 0 /\ -1+__rho_9_^post4 >= 0 /\ -1+AsyncAddressData^0 >= 0), cost: 4
 151: l4 -> l1 : __rho_9_^0'=__rho_9_^post4, (-1+__rho_8_^0 >= 0 /\ AsyncAddressData^0 <= 0 /\ __rho_9_^post4 <= 0), cost: 4
 152: l4 -> l1 : __rho_9_^0'=__rho_9_^post4, (-1+__rho_8_^0 >= 0 /\ __rho_9_^post4 <= 0 /\ -1+AsyncAddressData^0 >= 0), cost: 4
 110: l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=__rho_6_^post25, keR^0'=0, keA^0'=0, i___099^0'=Irql^0, k1^0 <= 0, cost: 2
 143: l7 -> l14 : CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k1^0'=-1+k1^0, __rho_3_^0'=CromData^post24, (__rho_4_^post23 <= 0 /\ -1+CromData^post24 >= 0 /\ -1+k1^0 >= 0), cost: 4
 144: l7 -> l14 : CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k1^0'=-1+k1^0, __rho_3_^0'=CromData^post24, (-1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+k1^0 >= 0), cost: 4
 164: l7 -> l7 : CromData^0'=CromData^post24, k1^0'=0, __rho_3_^0'=CromData^post24, (CromData^post24 <= 0 /\ -1+k1^0 >= 0), cost: 3*k1^0
 161: l14 -> l7 : __rho_5_^0'=__rho_5_^post18, a77^0'=CromData^0, __rho_5_^post18 <= 0, cost: 3
 162: l14 -> l7 : __rho_5_^0'=__rho_5_^post18, a77^0'=CromData^0, -1+__rho_5_^post18 >= 0, cost: 3
 123: l15 -> l19 : k5^0'=k5^post44, keR^0'=0, keA^0'=0, __rho_13_^0'=k5^post44, i___04040^0'=Irql^0, k4^0 <= 0, cost: 2
 155: l15 -> l15 : __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, k4^0'=-1+k4^0, IsochResourceData^0'=__rho_12_^post45, keA^0'=0, (-1+k4^0 >= 0 /\ __rho_12_^post45 <= 0), cost: 3
 156: l15 -> l29 : b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, k4^0'=-1+k4^0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=pIrb^post43, keA^0'=0, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, (-1+k4^0 >= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0), cost: 4
 157: l15 -> l29 : b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, k4^0'=-1+k4^0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=pIrb^post43, keA^0'=0, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, (-1+k4^0 >= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0), cost: 4
 165: l15 -> l15 : b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, ResourceIrp^0'=0, k4^0'=-1+k4^0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=pIrb^post43, keA^0'=0, ret_IoAllocateIrp2727^0'=0, __rho_99_^0'=0, (-1+k4^0 >= 0 /\ -1+__rho_12_^post45 >= 0), cost: 4
 126: l19 -> [35] : k5^0 <= 0, cost: NONTERM
 159: l19 -> l19 : a4444^0'=1, a4343^0'=2, __rho_56_^0'=__rho_56_^post31, (__rho_56_^post31 <= 0 /\ -1+k5^0 >= 0), cost: 4
 160: l19 -> l19 : k5^0'=-1+k5^0, a4444^0'=1, a4343^0'=2, __rho_56_^0'=__rho_56_^post31, (-1+__rho_56_^post31 >= 0 /\ -1+k5^0 >= 0), cost: 4
 132: l29 -> l15 : a2828^0'=1, ret_ExAllocatePool3030^0'=0, pIrb^0'=0, a3131^0'=ResourceIrp^0, b2929^0'=0, 0 <= 0, cost: 2
 140: l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=__rho_2_^post37, keA^0'=0, __rho_1_^post50 <= 0, cost: 4
 141: l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, a11^0'=1, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=__rho_2_^post37, keA^0'=0, -1+__rho_1_^post50 >= 0, cost: 4


Applied acceleration
Original rule:
l15 -> l15 : __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, k4^0'=-1+k4^0, IsochResourceData^0'=__rho_12_^post45, keA^0'=0, (-1+k4^0 >= 0 /\ __rho_12_^post45 <= 0), cost: 3
New rule:
l15 -> l15 : __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, k4^0'=k4^0-n2, IsochResourceData^0'=__rho_12_^post45, keA^0'=0, (-1+n2 >= 0 /\ -__rho_12_^post45 >= 0 /\ k4^0-n2 >= 0), cost: 3*n2
Sub-proof via acceration calculus written to file:///tmp/tmpnam_AEceIB.txt

Applied instantiation
Original rule:
l15 -> l15 : __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, k4^0'=k4^0-n2, IsochResourceData^0'=__rho_12_^post45, keA^0'=0, (-1+n2 >= 0 /\ -__rho_12_^post45 >= 0 /\ k4^0-n2 >= 0), cost: 3*n2
New rule:
l15 -> l15 : __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, k4^0'=0, IsochResourceData^0'=__rho_12_^post45, keA^0'=0, (0 >= 0 /\ -1+k4^0 >= 0 /\ -__rho_12_^post45 >= 0), cost: 3*k4^0

Applied acceleration
Original rule:
l15 -> l15 : b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, ResourceIrp^0'=0, k4^0'=-1+k4^0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=pIrb^post43, keA^0'=0, ret_IoAllocateIrp2727^0'=0, __rho_99_^0'=0, (-1+k4^0 >= 0 /\ -1+__rho_12_^post45 >= 0), cost: 4
New rule:
l15 -> l15 : b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, ResourceIrp^0'=0, k4^0'=-n3+k4^0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=pIrb^post43, keA^0'=0, ret_IoAllocateIrp2727^0'=0, __rho_99_^0'=0, (-n3+k4^0 >= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+n3 >= 0), cost: 4*n3
Sub-proof via acceration calculus written to file:///tmp/tmpnam_BPHopI.txt

Applied instantiation
Original rule:
l15 -> l15 : b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, ResourceIrp^0'=0, k4^0'=-n3+k4^0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=pIrb^post43, keA^0'=0, ret_IoAllocateIrp2727^0'=0, __rho_99_^0'=0, (-n3+k4^0 >= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+n3 >= 0), cost: 4*n3
New rule:
l15 -> l15 : b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, ResourceIrp^0'=0, k4^0'=0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=pIrb^post43, keA^0'=0, ret_IoAllocateIrp2727^0'=0, __rho_99_^0'=0, (0 >= 0 /\ -1+k4^0 >= 0 /\ -1+__rho_12_^post45 >= 0), cost: 4*k4^0

Applied simplification
Original rule:
l15 -> l15 : __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, k4^0'=0, IsochResourceData^0'=__rho_12_^post45, keA^0'=0, (0 >= 0 /\ -1+k4^0 >= 0 /\ -__rho_12_^post45 >= 0), cost: 3*k4^0
New rule:
l15 -> l15 : __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, k4^0'=0, IsochResourceData^0'=__rho_12_^post45, keA^0'=0, (-1+k4^0 >= 0 /\ __rho_12_^post45 <= 0), cost: 3*k4^0

Applied simplification
Original rule:
l15 -> l15 : b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, ResourceIrp^0'=0, k4^0'=0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=pIrb^post43, keA^0'=0, ret_IoAllocateIrp2727^0'=0, __rho_99_^0'=0, (0 >= 0 /\ -1+k4^0 >= 0 /\ -1+__rho_12_^post45 >= 0), cost: 4*k4^0
New rule:
l15 -> l15 : b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, ResourceIrp^0'=0, k4^0'=0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=pIrb^post43, keA^0'=0, ret_IoAllocateIrp2727^0'=0, __rho_99_^0'=0, (-1+k4^0 >= 0 /\ -1+__rho_12_^post45 >= 0), cost: 4*k4^0

Applied deletion
Removed the following rules: 155 165

Applied nonterm
Original rule:
l19 -> l19 : a4444^0'=1, a4343^0'=2, __rho_56_^0'=__rho_56_^post31, (__rho_56_^post31 <= 0 /\ -1+k5^0 >= 0), cost: 4
New rule:
l19 -> [39] : (-__rho_56_^post31 >= 0 /\ -1+k5^0 >= 0 /\ -1+n4 >= 0), cost: NONTERM
Sub-proof via acceration calculus written to file:///tmp/tmpnam_MEEkEN.txt

Applied acceleration
Original rule:
l19 -> l19 : k5^0'=-1+k5^0, a4444^0'=1, a4343^0'=2, __rho_56_^0'=__rho_56_^post31, (-1+__rho_56_^post31 >= 0 /\ -1+k5^0 >= 0), cost: 4
New rule:
l19 -> l19 : k5^0'=k5^0-n5, a4444^0'=1, a4343^0'=2, __rho_56_^0'=__rho_56_^post31, (-1+__rho_56_^post31 >= 0 /\ k5^0-n5 >= 0 /\ -1+n5 >= 0), cost: 4*n5
Sub-proof via acceration calculus written to file:///tmp/tmpnam_MBEKmc.txt

Applied instantiation
Original rule:
l19 -> l19 : k5^0'=k5^0-n5, a4444^0'=1, a4343^0'=2, __rho_56_^0'=__rho_56_^post31, (-1+__rho_56_^post31 >= 0 /\ k5^0-n5 >= 0 /\ -1+n5 >= 0), cost: 4*n5
New rule:
l19 -> l19 : k5^0'=0, a4444^0'=1, a4343^0'=2, __rho_56_^0'=__rho_56_^post31, (0 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ -1+k5^0 >= 0), cost: 4*k5^0

Applied simplification
Original rule:
l19 -> [39] : (-__rho_56_^post31 >= 0 /\ -1+k5^0 >= 0 /\ -1+n4 >= 0), cost: NONTERM
New rule:
l19 -> [39] : (__rho_56_^post31 <= 0 /\ -1+k5^0 >= 0 /\ -1+n4 >= 0), cost: NONTERM

Applied simplification
Original rule:
l19 -> l19 : k5^0'=0, a4444^0'=1, a4343^0'=2, __rho_56_^0'=__rho_56_^post31, (0 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ -1+k5^0 >= 0), cost: 4*k5^0
New rule:
l19 -> l19 : k5^0'=0, a4444^0'=1, a4343^0'=2, __rho_56_^0'=__rho_56_^post31, (-1+__rho_56_^post31 >= 0 /\ -1+k5^0 >= 0), cost: 4*k5^0

Applied deletion
Removed the following rules: 159 160

Accelerated simple loops
Start location: l34
 138: l1 -> [36] : k2^0 <= 0, cost: NONTERM
 139: l1 -> l15 : keR^0'=0, i___01313^0'=Irql^0, k4^0'=k4^post48, __rho_11_^0'=k4^post48, i___02020^0'=Irql^0, keA^0'=0, k3^0'=k3^post14, __rho_10_^0'=k3^post14, (k2^0 <= 0 /\ k3^post14 <= 0), cost: 4
 145: l1 -> l4 : k2^0'=-1+k2^0, __rho_8_^0'=__rho_8_^post7, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (-1+k2^0 >= 0 /\ __rho_7_^post11 <= 0), cost: 4
 146: l1 -> l4 : k2^0'=-1+k2^0, __rho_8_^0'=__rho_8_^post7, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (-1+__rho_7_^post11 >= 0 /\ -1+k2^0 >= 0), cost: 4
 147: l4 -> l1 : __rho_9_^0'=__rho_9_^post4, (__rho_8_^0 <= 0 /\ AsyncAddressData^0 <= 0 /\ __rho_9_^post4 <= 0), cost: 4
 148: l4 -> l1 : __rho_9_^0'=__rho_9_^post4, (__rho_8_^0 <= 0 /\ __rho_9_^post4 <= 0 /\ -1+AsyncAddressData^0 >= 0), cost: 4
 150: l4 -> l1 : __rho_9_^0'=__rho_9_^post4, (__rho_8_^0 <= 0 /\ -1+__rho_9_^post4 >= 0 /\ -1+AsyncAddressData^0 >= 0), cost: 4
 151: l4 -> l1 : __rho_9_^0'=__rho_9_^post4, (-1+__rho_8_^0 >= 0 /\ AsyncAddressData^0 <= 0 /\ __rho_9_^post4 <= 0), cost: 4
 152: l4 -> l1 : __rho_9_^0'=__rho_9_^post4, (-1+__rho_8_^0 >= 0 /\ __rho_9_^post4 <= 0 /\ -1+AsyncAddressData^0 >= 0), cost: 4
 110: l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=__rho_6_^post25, keR^0'=0, keA^0'=0, i___099^0'=Irql^0, k1^0 <= 0, cost: 2
 143: l7 -> l14 : CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k1^0'=-1+k1^0, __rho_3_^0'=CromData^post24, (__rho_4_^post23 <= 0 /\ -1+CromData^post24 >= 0 /\ -1+k1^0 >= 0), cost: 4
 144: l7 -> l14 : CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k1^0'=-1+k1^0, __rho_3_^0'=CromData^post24, (-1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+k1^0 >= 0), cost: 4
 164: l7 -> l7 : CromData^0'=CromData^post24, k1^0'=0, __rho_3_^0'=CromData^post24, (CromData^post24 <= 0 /\ -1+k1^0 >= 0), cost: 3*k1^0
 161: l14 -> l7 : __rho_5_^0'=__rho_5_^post18, a77^0'=CromData^0, __rho_5_^post18 <= 0, cost: 3
 162: l14 -> l7 : __rho_5_^0'=__rho_5_^post18, a77^0'=CromData^0, -1+__rho_5_^post18 >= 0, cost: 3
 123: l15 -> l19 : k5^0'=k5^post44, keR^0'=0, keA^0'=0, __rho_13_^0'=k5^post44, i___04040^0'=Irql^0, k4^0 <= 0, cost: 2
 156: l15 -> l29 : b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, k4^0'=-1+k4^0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=pIrb^post43, keA^0'=0, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, (-1+k4^0 >= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0), cost: 4
 157: l15 -> l29 : b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, k4^0'=-1+k4^0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=pIrb^post43, keA^0'=0, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, (-1+k4^0 >= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0), cost: 4
 168: l15 -> l15 : __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, k4^0'=0, IsochResourceData^0'=__rho_12_^post45, keA^0'=0, (-1+k4^0 >= 0 /\ __rho_12_^post45 <= 0), cost: 3*k4^0
 169: l15 -> l15 : b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, ResourceIrp^0'=0, k4^0'=0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=pIrb^post43, keA^0'=0, ret_IoAllocateIrp2727^0'=0, __rho_99_^0'=0, (-1+k4^0 >= 0 /\ -1+__rho_12_^post45 >= 0), cost: 4*k4^0
 126: l19 -> [35] : k5^0 <= 0, cost: NONTERM
 172: l19 -> [39] : (__rho_56_^post31 <= 0 /\ -1+k5^0 >= 0 /\ -1+n4 >= 0), cost: NONTERM
 173: l19 -> l19 : k5^0'=0, a4444^0'=1, a4343^0'=2, __rho_56_^0'=__rho_56_^post31, (-1+__rho_56_^post31 >= 0 /\ -1+k5^0 >= 0), cost: 4*k5^0
 132: l29 -> l15 : a2828^0'=1, ret_ExAllocatePool3030^0'=0, pIrb^0'=0, a3131^0'=ResourceIrp^0, b2929^0'=0, 0 <= 0, cost: 2
 140: l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=__rho_2_^post37, keA^0'=0, __rho_1_^post50 <= 0, cost: 4
 141: l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, a11^0'=1, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=__rho_2_^post37, keA^0'=0, -1+__rho_1_^post50 >= 0, cost: 4


Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=__rho_2_^post37, keA^0'=0, __rho_1_^post50 <= 0, cost: 4
Second rule:
l7 -> l7 : CromData^0'=CromData^post24, k1^0'=0, __rho_3_^0'=CromData^post24, (CromData^post24 <= 0 /\ -1+k1^0 >= 0), cost: 3*k1^0
New rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, (-1+__rho_2_^post37 >= 0 /\ CromData^post24 <= 0 /\ __rho_1_^post50 <= 0), cost: 4+3*__rho_2_^post37

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, a11^0'=1, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=__rho_2_^post37, keA^0'=0, -1+__rho_1_^post50 >= 0, cost: 4
Second rule:
l7 -> l7 : CromData^0'=CromData^post24, k1^0'=0, __rho_3_^0'=CromData^post24, (CromData^post24 <= 0 /\ -1+k1^0 >= 0), cost: 3*k1^0
New rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, a11^0'=1, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, (-1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ CromData^post24 <= 0), cost: 4+3*__rho_2_^post37

Applied chaining
First rule:
l14 -> l7 : __rho_5_^0'=__rho_5_^post18, a77^0'=CromData^0, __rho_5_^post18 <= 0, cost: 3
Second rule:
l7 -> l7 : CromData^0'=CromData^post24, k1^0'=0, __rho_3_^0'=CromData^post24, (CromData^post24 <= 0 /\ -1+k1^0 >= 0), cost: 3*k1^0
New rule:
l14 -> l7 : CromData^0'=CromData^post24, __rho_5_^0'=__rho_5_^post18, k1^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^0, (CromData^post24 <= 0 /\ -1+k1^0 >= 0 /\ __rho_5_^post18 <= 0), cost: 3+3*k1^0

Applied chaining
First rule:
l14 -> l7 : __rho_5_^0'=__rho_5_^post18, a77^0'=CromData^0, -1+__rho_5_^post18 >= 0, cost: 3
Second rule:
l7 -> l7 : CromData^0'=CromData^post24, k1^0'=0, __rho_3_^0'=CromData^post24, (CromData^post24 <= 0 /\ -1+k1^0 >= 0), cost: 3*k1^0
New rule:
l14 -> l7 : CromData^0'=CromData^post24, __rho_5_^0'=__rho_5_^post18, k1^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^0, (-1+__rho_5_^post18 >= 0 /\ CromData^post24 <= 0 /\ -1+k1^0 >= 0), cost: 3+3*k1^0

Applied deletion
Removed the following rules: 164

Applied chaining
First rule:
l29 -> l15 : a2828^0'=1, ret_ExAllocatePool3030^0'=0, pIrb^0'=0, a3131^0'=ResourceIrp^0, b2929^0'=0, 0 <= 0, cost: 2
Second rule:
l15 -> l15 : __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, k4^0'=0, IsochResourceData^0'=__rho_12_^post45, keA^0'=0, (-1+k4^0 >= 0 /\ __rho_12_^post45 <= 0), cost: 3*k4^0
New rule:
l29 -> l15 : a2828^0'=1, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, ret_ExAllocatePool3030^0'=0, keR^0'=0, k4^0'=0, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=0, keA^0'=0, a3131^0'=ResourceIrp^0, b2929^0'=0, (-1+k4^0 >= 0 /\ __rho_12_^post45 <= 0), cost: 2+3*k4^0

Applied chaining
First rule:
l1 -> l15 : keR^0'=0, i___01313^0'=Irql^0, k4^0'=k4^post48, __rho_11_^0'=k4^post48, i___02020^0'=Irql^0, keA^0'=0, k3^0'=k3^post14, __rho_10_^0'=k3^post14, (k2^0 <= 0 /\ k3^post14 <= 0), cost: 4
Second rule:
l15 -> l15 : __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, k4^0'=0, IsochResourceData^0'=__rho_12_^post45, keA^0'=0, (-1+k4^0 >= 0 /\ __rho_12_^post45 <= 0), cost: 3*k4^0
New rule:
l1 -> l15 : __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, i___01313^0'=Irql^0, k4^0'=0, __rho_11_^0'=k4^post48, i___02020^0'=Irql^0, IsochResourceData^0'=__rho_12_^post45, keA^0'=0, k3^0'=k3^post14, __rho_10_^0'=k3^post14, (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ k3^post14 <= 0 /\ __rho_12_^post45 <= 0), cost: 4+3*k4^post48

Applied chaining
First rule:
l29 -> l15 : a2828^0'=1, ret_ExAllocatePool3030^0'=0, pIrb^0'=0, a3131^0'=ResourceIrp^0, b2929^0'=0, 0 <= 0, cost: 2
Second rule:
l15 -> l15 : b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, ResourceIrp^0'=0, k4^0'=0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=pIrb^post43, keA^0'=0, ret_IoAllocateIrp2727^0'=0, __rho_99_^0'=0, (-1+k4^0 >= 0 /\ -1+__rho_12_^post45 >= 0), cost: 4*k4^0
New rule:
l29 -> l15 : a2828^0'=1, b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, ret_ExAllocatePool3030^0'=0, keR^0'=0, ResourceIrp^0'=0, k4^0'=0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=pIrb^post43, keA^0'=0, a3131^0'=ResourceIrp^0, b2929^0'=0, ret_IoAllocateIrp2727^0'=0, __rho_99_^0'=0, (-1+k4^0 >= 0 /\ -1+__rho_12_^post45 >= 0), cost: 2+4*k4^0

Applied chaining
First rule:
l1 -> l15 : keR^0'=0, i___01313^0'=Irql^0, k4^0'=k4^post48, __rho_11_^0'=k4^post48, i___02020^0'=Irql^0, keA^0'=0, k3^0'=k3^post14, __rho_10_^0'=k3^post14, (k2^0 <= 0 /\ k3^post14 <= 0), cost: 4
Second rule:
l15 -> l15 : b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, ResourceIrp^0'=0, k4^0'=0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=pIrb^post43, keA^0'=0, ret_IoAllocateIrp2727^0'=0, __rho_99_^0'=0, (-1+k4^0 >= 0 /\ -1+__rho_12_^post45 >= 0), cost: 4*k4^0
New rule:
l1 -> l15 : b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, ResourceIrp^0'=0, i___01313^0'=Irql^0, k4^0'=0, a2525^0'=1, __rho_11_^0'=k4^post48, i___02020^0'=Irql^0, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=pIrb^post43, keA^0'=0, k3^0'=k3^post14, ret_IoAllocateIrp2727^0'=0, __rho_99_^0'=0, __rho_10_^0'=k3^post14, (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0), cost: 4+4*k4^post48

Applied deletion
Removed the following rules: 168 169

Applied chaining
First rule:
l15 -> l19 : k5^0'=k5^post44, keR^0'=0, keA^0'=0, __rho_13_^0'=k5^post44, i___04040^0'=Irql^0, k4^0 <= 0, cost: 2
Second rule:
l19 -> [39] : (__rho_56_^post31 <= 0 /\ -1+k5^0 >= 0 /\ -1+n4 >= 0), cost: NONTERM
New rule:
l15 -> [39] : k4^0 <= 0, cost: NONTERM

Applied chaining
First rule:
l15 -> l19 : k5^0'=k5^post44, keR^0'=0, keA^0'=0, __rho_13_^0'=k5^post44, i___04040^0'=Irql^0, k4^0 <= 0, cost: 2
Second rule:
l19 -> l19 : k5^0'=0, a4444^0'=1, a4343^0'=2, __rho_56_^0'=__rho_56_^post31, (-1+__rho_56_^post31 >= 0 /\ -1+k5^0 >= 0), cost: 4*k5^0
New rule:
l15 -> l19 : k5^0'=0, keR^0'=0, a4444^0'=1, keA^0'=0, a4343^0'=2, __rho_56_^0'=__rho_56_^post31, __rho_13_^0'=k5^post44, i___04040^0'=Irql^0, (-1+__rho_56_^post31 >= 0 /\ k4^0 <= 0 /\ -1+k5^post44 >= 0), cost: 2+4*k5^post44

Applied deletion
Removed the following rules: 172 173

Chained accelerated rules with incoming rules
Start location: l34
 138: l1 -> [36] : k2^0 <= 0, cost: NONTERM
 139: l1 -> l15 : keR^0'=0, i___01313^0'=Irql^0, k4^0'=k4^post48, __rho_11_^0'=k4^post48, i___02020^0'=Irql^0, keA^0'=0, k3^0'=k3^post14, __rho_10_^0'=k3^post14, (k2^0 <= 0 /\ k3^post14 <= 0), cost: 4
 145: l1 -> l4 : k2^0'=-1+k2^0, __rho_8_^0'=__rho_8_^post7, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (-1+k2^0 >= 0 /\ __rho_7_^post11 <= 0), cost: 4
 146: l1 -> l4 : k2^0'=-1+k2^0, __rho_8_^0'=__rho_8_^post7, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (-1+__rho_7_^post11 >= 0 /\ -1+k2^0 >= 0), cost: 4
 179: l1 -> l15 : __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, i___01313^0'=Irql^0, k4^0'=0, __rho_11_^0'=k4^post48, i___02020^0'=Irql^0, IsochResourceData^0'=__rho_12_^post45, keA^0'=0, k3^0'=k3^post14, __rho_10_^0'=k3^post14, (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ k3^post14 <= 0 /\ __rho_12_^post45 <= 0), cost: 4+3*k4^post48
 181: l1 -> l15 : b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, ResourceIrp^0'=0, i___01313^0'=Irql^0, k4^0'=0, a2525^0'=1, __rho_11_^0'=k4^post48, i___02020^0'=Irql^0, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=pIrb^post43, keA^0'=0, k3^0'=k3^post14, ret_IoAllocateIrp2727^0'=0, __rho_99_^0'=0, __rho_10_^0'=k3^post14, (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0), cost: 4+4*k4^post48
 147: l4 -> l1 : __rho_9_^0'=__rho_9_^post4, (__rho_8_^0 <= 0 /\ AsyncAddressData^0 <= 0 /\ __rho_9_^post4 <= 0), cost: 4
 148: l4 -> l1 : __rho_9_^0'=__rho_9_^post4, (__rho_8_^0 <= 0 /\ __rho_9_^post4 <= 0 /\ -1+AsyncAddressData^0 >= 0), cost: 4
 150: l4 -> l1 : __rho_9_^0'=__rho_9_^post4, (__rho_8_^0 <= 0 /\ -1+__rho_9_^post4 >= 0 /\ -1+AsyncAddressData^0 >= 0), cost: 4
 151: l4 -> l1 : __rho_9_^0'=__rho_9_^post4, (-1+__rho_8_^0 >= 0 /\ AsyncAddressData^0 <= 0 /\ __rho_9_^post4 <= 0), cost: 4
 152: l4 -> l1 : __rho_9_^0'=__rho_9_^post4, (-1+__rho_8_^0 >= 0 /\ __rho_9_^post4 <= 0 /\ -1+AsyncAddressData^0 >= 0), cost: 4
 110: l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=__rho_6_^post25, keR^0'=0, keA^0'=0, i___099^0'=Irql^0, k1^0 <= 0, cost: 2
 143: l7 -> l14 : CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k1^0'=-1+k1^0, __rho_3_^0'=CromData^post24, (__rho_4_^post23 <= 0 /\ -1+CromData^post24 >= 0 /\ -1+k1^0 >= 0), cost: 4
 144: l7 -> l14 : CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k1^0'=-1+k1^0, __rho_3_^0'=CromData^post24, (-1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+k1^0 >= 0), cost: 4
 161: l14 -> l7 : __rho_5_^0'=__rho_5_^post18, a77^0'=CromData^0, __rho_5_^post18 <= 0, cost: 3
 162: l14 -> l7 : __rho_5_^0'=__rho_5_^post18, a77^0'=CromData^0, -1+__rho_5_^post18 >= 0, cost: 3
 176: l14 -> l7 : CromData^0'=CromData^post24, __rho_5_^0'=__rho_5_^post18, k1^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^0, (CromData^post24 <= 0 /\ -1+k1^0 >= 0 /\ __rho_5_^post18 <= 0), cost: 3+3*k1^0
 177: l14 -> l7 : CromData^0'=CromData^post24, __rho_5_^0'=__rho_5_^post18, k1^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^0, (-1+__rho_5_^post18 >= 0 /\ CromData^post24 <= 0 /\ -1+k1^0 >= 0), cost: 3+3*k1^0
 123: l15 -> l19 : k5^0'=k5^post44, keR^0'=0, keA^0'=0, __rho_13_^0'=k5^post44, i___04040^0'=Irql^0, k4^0 <= 0, cost: 2
 156: l15 -> l29 : b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, k4^0'=-1+k4^0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=pIrb^post43, keA^0'=0, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, (-1+k4^0 >= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0), cost: 4
 157: l15 -> l29 : b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, k4^0'=-1+k4^0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=pIrb^post43, keA^0'=0, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, (-1+k4^0 >= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0), cost: 4
 182: l15 -> [39] : k4^0 <= 0, cost: NONTERM
 183: l15 -> l19 : k5^0'=0, keR^0'=0, a4444^0'=1, keA^0'=0, a4343^0'=2, __rho_56_^0'=__rho_56_^post31, __rho_13_^0'=k5^post44, i___04040^0'=Irql^0, (-1+__rho_56_^post31 >= 0 /\ k4^0 <= 0 /\ -1+k5^post44 >= 0), cost: 2+4*k5^post44
 126: l19 -> [35] : k5^0 <= 0, cost: NONTERM
 132: l29 -> l15 : a2828^0'=1, ret_ExAllocatePool3030^0'=0, pIrb^0'=0, a3131^0'=ResourceIrp^0, b2929^0'=0, 0 <= 0, cost: 2
 178: l29 -> l15 : a2828^0'=1, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, ret_ExAllocatePool3030^0'=0, keR^0'=0, k4^0'=0, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=0, keA^0'=0, a3131^0'=ResourceIrp^0, b2929^0'=0, (-1+k4^0 >= 0 /\ __rho_12_^post45 <= 0), cost: 2+3*k4^0
 180: l29 -> l15 : a2828^0'=1, b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, ret_ExAllocatePool3030^0'=0, keR^0'=0, ResourceIrp^0'=0, k4^0'=0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=pIrb^post43, keA^0'=0, a3131^0'=ResourceIrp^0, b2929^0'=0, ret_IoAllocateIrp2727^0'=0, __rho_99_^0'=0, (-1+k4^0 >= 0 /\ -1+__rho_12_^post45 >= 0), cost: 2+4*k4^0
 140: l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=__rho_2_^post37, keA^0'=0, __rho_1_^post50 <= 0, cost: 4
 141: l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, a11^0'=1, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=__rho_2_^post37, keA^0'=0, -1+__rho_1_^post50 >= 0, cost: 4
 174: l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, (-1+__rho_2_^post37 >= 0 /\ CromData^post24 <= 0 /\ __rho_1_^post50 <= 0), cost: 4+3*__rho_2_^post37
 175: l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, a11^0'=1, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, (-1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ CromData^post24 <= 0), cost: 4+3*__rho_2_^post37


Eliminating location l14 by chaining:

Applied chaining
First rule:
l7 -> l14 : CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k1^0'=-1+k1^0, __rho_3_^0'=CromData^post24, (__rho_4_^post23 <= 0 /\ -1+CromData^post24 >= 0 /\ -1+k1^0 >= 0), cost: 4
Second rule:
l14 -> l7 : __rho_5_^0'=__rho_5_^post18, a77^0'=CromData^0, __rho_5_^post18 <= 0, cost: 3
New rule:
l7 -> l7 : CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, __rho_5_^0'=__rho_5_^post18, k1^0'=-1+k1^0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (__rho_4_^post23 <= 0 /\ -1+CromData^post24 >= 0 /\ -1+k1^0 >= 0 /\ __rho_5_^post18 <= 0), cost: 7

Applied chaining
First rule:
l7 -> l14 : CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k1^0'=-1+k1^0, __rho_3_^0'=CromData^post24, (__rho_4_^post23 <= 0 /\ -1+CromData^post24 >= 0 /\ -1+k1^0 >= 0), cost: 4
Second rule:
l14 -> l7 : __rho_5_^0'=__rho_5_^post18, a77^0'=CromData^0, -1+__rho_5_^post18 >= 0, cost: 3
New rule:
l7 -> l7 : CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, __rho_5_^0'=__rho_5_^post18, k1^0'=-1+k1^0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_5_^post18 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+CromData^post24 >= 0 /\ -1+k1^0 >= 0), cost: 7

Applied chaining
First rule:
l7 -> l14 : CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k1^0'=-1+k1^0, __rho_3_^0'=CromData^post24, (-1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+k1^0 >= 0), cost: 4
Second rule:
l14 -> l7 : __rho_5_^0'=__rho_5_^post18, a77^0'=CromData^0, __rho_5_^post18 <= 0, cost: 3
New rule:
l7 -> l7 : CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, __rho_5_^0'=__rho_5_^post18, k1^0'=-1+k1^0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+k1^0 >= 0 /\ __rho_5_^post18 <= 0), cost: 7

Applied chaining
First rule:
l7 -> l14 : CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k1^0'=-1+k1^0, __rho_3_^0'=CromData^post24, (-1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+k1^0 >= 0), cost: 4
Second rule:
l14 -> l7 : __rho_5_^0'=__rho_5_^post18, a77^0'=CromData^0, -1+__rho_5_^post18 >= 0, cost: 3
New rule:
l7 -> l7 : CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, __rho_5_^0'=__rho_5_^post18, k1^0'=-1+k1^0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_5_^post18 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+k1^0 >= 0), cost: 7

Applied deletion
Removed the following rules: 143 144 161 162 176 177

Eliminating location l4 by chaining:

Applied chaining
First rule:
l1 -> l4 : k2^0'=-1+k2^0, __rho_8_^0'=__rho_8_^post7, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (-1+k2^0 >= 0 /\ __rho_7_^post11 <= 0), cost: 4
Second rule:
l4 -> l1 : __rho_9_^0'=__rho_9_^post4, (__rho_8_^0 <= 0 /\ AsyncAddressData^0 <= 0 /\ __rho_9_^post4 <= 0), cost: 4
New rule:
l1 -> l1 : k2^0'=-1+k2^0, __rho_8_^0'=__rho_8_^post7, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (AsyncAddressData^post11 <= 0 /\ -1+k2^0 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 8

Applied chaining
First rule:
l1 -> l4 : k2^0'=-1+k2^0, __rho_8_^0'=__rho_8_^post7, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (-1+k2^0 >= 0 /\ __rho_7_^post11 <= 0), cost: 4
Second rule:
l4 -> l1 : __rho_9_^0'=__rho_9_^post4, (__rho_8_^0 <= 0 /\ __rho_9_^post4 <= 0 /\ -1+AsyncAddressData^0 >= 0), cost: 4
New rule:
l1 -> l1 : k2^0'=-1+k2^0, __rho_8_^0'=__rho_8_^post7, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (-1+AsyncAddressData^post11 >= 0 /\ -1+k2^0 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 8

Applied chaining
First rule:
l1 -> l4 : k2^0'=-1+k2^0, __rho_8_^0'=__rho_8_^post7, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (-1+k2^0 >= 0 /\ __rho_7_^post11 <= 0), cost: 4
Second rule:
l4 -> l1 : __rho_9_^0'=__rho_9_^post4, (__rho_8_^0 <= 0 /\ -1+__rho_9_^post4 >= 0 /\ -1+AsyncAddressData^0 >= 0), cost: 4
New rule:
l1 -> l1 : k2^0'=-1+k2^0, __rho_8_^0'=__rho_8_^post7, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (-1+AsyncAddressData^post11 >= 0 /\ -1+__rho_9_^post4 >= 0 /\ -1+k2^0 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_8_^post7 <= 0), cost: 8

Applied chaining
First rule:
l1 -> l4 : k2^0'=-1+k2^0, __rho_8_^0'=__rho_8_^post7, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (-1+k2^0 >= 0 /\ __rho_7_^post11 <= 0), cost: 4
Second rule:
l4 -> l1 : __rho_9_^0'=__rho_9_^post4, (-1+__rho_8_^0 >= 0 /\ AsyncAddressData^0 <= 0 /\ __rho_9_^post4 <= 0), cost: 4
New rule:
l1 -> l1 : k2^0'=-1+k2^0, __rho_8_^0'=__rho_8_^post7, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (-1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+k2^0 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0), cost: 8

Applied chaining
First rule:
l1 -> l4 : k2^0'=-1+k2^0, __rho_8_^0'=__rho_8_^post7, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (-1+k2^0 >= 0 /\ __rho_7_^post11 <= 0), cost: 4
Second rule:
l4 -> l1 : __rho_9_^0'=__rho_9_^post4, (-1+__rho_8_^0 >= 0 /\ __rho_9_^post4 <= 0 /\ -1+AsyncAddressData^0 >= 0), cost: 4
New rule:
l1 -> l1 : k2^0'=-1+k2^0, __rho_8_^0'=__rho_8_^post7, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (-1+__rho_8_^post7 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+k2^0 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0), cost: 8

Applied chaining
First rule:
l1 -> l4 : k2^0'=-1+k2^0, __rho_8_^0'=__rho_8_^post7, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (-1+__rho_7_^post11 >= 0 /\ -1+k2^0 >= 0), cost: 4
Second rule:
l4 -> l1 : __rho_9_^0'=__rho_9_^post4, (__rho_8_^0 <= 0 /\ AsyncAddressData^0 <= 0 /\ __rho_9_^post4 <= 0), cost: 4
New rule:
l1 -> l1 : k2^0'=-1+k2^0, __rho_8_^0'=__rho_8_^post7, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (AsyncAddressData^post11 <= 0 /\ -1+__rho_7_^post11 >= 0 /\ -1+k2^0 >= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 8

Applied chaining
First rule:
l1 -> l4 : k2^0'=-1+k2^0, __rho_8_^0'=__rho_8_^post7, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (-1+__rho_7_^post11 >= 0 /\ -1+k2^0 >= 0), cost: 4
Second rule:
l4 -> l1 : __rho_9_^0'=__rho_9_^post4, (__rho_8_^0 <= 0 /\ __rho_9_^post4 <= 0 /\ -1+AsyncAddressData^0 >= 0), cost: 4
New rule:
l1 -> l1 : k2^0'=-1+k2^0, __rho_8_^0'=__rho_8_^post7, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (-1+AsyncAddressData^post11 >= 0 /\ -1+__rho_7_^post11 >= 0 /\ -1+k2^0 >= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 8

Applied chaining
First rule:
l1 -> l4 : k2^0'=-1+k2^0, __rho_8_^0'=__rho_8_^post7, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (-1+__rho_7_^post11 >= 0 /\ -1+k2^0 >= 0), cost: 4
Second rule:
l4 -> l1 : __rho_9_^0'=__rho_9_^post4, (__rho_8_^0 <= 0 /\ -1+__rho_9_^post4 >= 0 /\ -1+AsyncAddressData^0 >= 0), cost: 4
New rule:
l1 -> l1 : k2^0'=-1+k2^0, __rho_8_^0'=__rho_8_^post7, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (-1+AsyncAddressData^post11 >= 0 /\ -1+__rho_9_^post4 >= 0 /\ -1+__rho_7_^post11 >= 0 /\ -1+k2^0 >= 0 /\ __rho_8_^post7 <= 0), cost: 8

Applied chaining
First rule:
l1 -> l4 : k2^0'=-1+k2^0, __rho_8_^0'=__rho_8_^post7, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (-1+__rho_7_^post11 >= 0 /\ -1+k2^0 >= 0), cost: 4
Second rule:
l4 -> l1 : __rho_9_^0'=__rho_9_^post4, (-1+__rho_8_^0 >= 0 /\ AsyncAddressData^0 <= 0 /\ __rho_9_^post4 <= 0), cost: 4
New rule:
l1 -> l1 : k2^0'=-1+k2^0, __rho_8_^0'=__rho_8_^post7, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (-1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_7_^post11 >= 0 /\ -1+k2^0 >= 0 /\ __rho_9_^post4 <= 0), cost: 8

Applied chaining
First rule:
l1 -> l4 : k2^0'=-1+k2^0, __rho_8_^0'=__rho_8_^post7, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (-1+__rho_7_^post11 >= 0 /\ -1+k2^0 >= 0), cost: 4
Second rule:
l4 -> l1 : __rho_9_^0'=__rho_9_^post4, (-1+__rho_8_^0 >= 0 /\ __rho_9_^post4 <= 0 /\ -1+AsyncAddressData^0 >= 0), cost: 4
New rule:
l1 -> l1 : k2^0'=-1+k2^0, __rho_8_^0'=__rho_8_^post7, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (-1+__rho_8_^post7 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+__rho_7_^post11 >= 0 /\ -1+k2^0 >= 0 /\ __rho_9_^post4 <= 0), cost: 8

Applied deletion
Removed the following rules: 145 146 147 148 150 151 152

Eliminating location l19 by chaining:

Applied chaining
First rule:
l15 -> l19 : k5^0'=k5^post44, keR^0'=0, keA^0'=0, __rho_13_^0'=k5^post44, i___04040^0'=Irql^0, k4^0 <= 0, cost: 2
Second rule:
l19 -> [35] : k5^0 <= 0, cost: NONTERM
New rule:
l15 -> [35] : (k4^0 <= 0 /\ k5^post44 <= 0), cost: NONTERM

Applied chaining
First rule:
l15 -> l19 : k5^0'=0, keR^0'=0, a4444^0'=1, keA^0'=0, a4343^0'=2, __rho_56_^0'=__rho_56_^post31, __rho_13_^0'=k5^post44, i___04040^0'=Irql^0, (-1+__rho_56_^post31 >= 0 /\ k4^0 <= 0 /\ -1+k5^post44 >= 0), cost: 2+4*k5^post44
Second rule:
l19 -> [35] : k5^0 <= 0, cost: NONTERM
New rule:
l15 -> [35] : (0 <= 0 /\ -1+__rho_56_^post31 >= 0 /\ k4^0 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM

Applied simplification
Original rule:
l15 -> [35] : (0 <= 0 /\ -1+__rho_56_^post31 >= 0 /\ k4^0 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
New rule:
l15 -> [35] : (-1+__rho_56_^post31 >= 0 /\ k4^0 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM

Applied deletion
Removed the following rules: 123 126 183

Eliminating location l29 by chaining:

Applied chaining
First rule:
l15 -> l29 : b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, k4^0'=-1+k4^0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=pIrb^post43, keA^0'=0, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, (-1+k4^0 >= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0), cost: 4
Second rule:
l29 -> l15 : a2828^0'=1, ret_ExAllocatePool3030^0'=0, pIrb^0'=0, a3131^0'=ResourceIrp^0, b2929^0'=0, 0 <= 0, cost: 2
New rule:
l15 -> l15 : a2828^0'=1, b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, ret_ExAllocatePool3030^0'=0, keR^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, k4^0'=-1+k4^0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=0, keA^0'=0, a3131^0'=ret_IoAllocateIrp2727^post43, b2929^0'=0, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, (0 <= 0 /\ -1+k4^0 >= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0), cost: 6

Applied simplification
Original rule:
l15 -> l15 : a2828^0'=1, b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, ret_ExAllocatePool3030^0'=0, keR^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, k4^0'=-1+k4^0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=0, keA^0'=0, a3131^0'=ret_IoAllocateIrp2727^post43, b2929^0'=0, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, (0 <= 0 /\ -1+k4^0 >= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0), cost: 6
New rule:
l15 -> l15 : a2828^0'=1, b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, ret_ExAllocatePool3030^0'=0, keR^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, k4^0'=-1+k4^0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=0, keA^0'=0, a3131^0'=ret_IoAllocateIrp2727^post43, b2929^0'=0, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, (-1+k4^0 >= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0), cost: 6

Applied chaining
First rule:
l15 -> l29 : b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, k4^0'=-1+k4^0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=pIrb^post43, keA^0'=0, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, (-1+k4^0 >= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0), cost: 4
Second rule:
l29 -> l15 : a2828^0'=1, b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, ret_ExAllocatePool3030^0'=0, keR^0'=0, ResourceIrp^0'=0, k4^0'=0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=pIrb^post43, keA^0'=0, a3131^0'=ResourceIrp^0, b2929^0'=0, ret_IoAllocateIrp2727^0'=0, __rho_99_^0'=0, (-1+k4^0 >= 0 /\ -1+__rho_12_^post45 >= 0), cost: 2+4*k4^0
New rule:
l15 -> l15 : a2828^0'=1, b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, ret_ExAllocatePool3030^0'=0, keR^0'=0, ResourceIrp^0'=0, k4^0'=0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=pIrb^post43, keA^0'=0, a3131^0'=ret_IoAllocateIrp2727^post43, b2929^0'=0, ret_IoAllocateIrp2727^0'=0, __rho_99_^0'=0, (-1+k4^0 >= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ -2+k4^0 >= 0), cost: 2+4*k4^0

Applied simplification
Original rule:
l15 -> l15 : a2828^0'=1, b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, ret_ExAllocatePool3030^0'=0, keR^0'=0, ResourceIrp^0'=0, k4^0'=0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=pIrb^post43, keA^0'=0, a3131^0'=ret_IoAllocateIrp2727^post43, b2929^0'=0, ret_IoAllocateIrp2727^0'=0, __rho_99_^0'=0, (-1+k4^0 >= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ -2+k4^0 >= 0), cost: 2+4*k4^0
New rule:
l15 -> l15 : a2828^0'=1, b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, ret_ExAllocatePool3030^0'=0, keR^0'=0, ResourceIrp^0'=0, k4^0'=0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=pIrb^post43, keA^0'=0, a3131^0'=ret_IoAllocateIrp2727^post43, b2929^0'=0, ret_IoAllocateIrp2727^0'=0, __rho_99_^0'=0, (-1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ -2+k4^0 >= 0), cost: 2+4*k4^0

Applied chaining
First rule:
l15 -> l29 : b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, k4^0'=-1+k4^0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=pIrb^post43, keA^0'=0, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, (-1+k4^0 >= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0), cost: 4
Second rule:
l29 -> l15 : a2828^0'=1, ret_ExAllocatePool3030^0'=0, pIrb^0'=0, a3131^0'=ResourceIrp^0, b2929^0'=0, 0 <= 0, cost: 2
New rule:
l15 -> l15 : a2828^0'=1, b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, ret_ExAllocatePool3030^0'=0, keR^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, k4^0'=-1+k4^0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=0, keA^0'=0, a3131^0'=ret_IoAllocateIrp2727^post43, b2929^0'=0, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, (0 <= 0 /\ -1+k4^0 >= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0), cost: 6

Applied simplification
Original rule:
l15 -> l15 : a2828^0'=1, b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, ret_ExAllocatePool3030^0'=0, keR^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, k4^0'=-1+k4^0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=0, keA^0'=0, a3131^0'=ret_IoAllocateIrp2727^post43, b2929^0'=0, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, (0 <= 0 /\ -1+k4^0 >= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0), cost: 6
New rule:
l15 -> l15 : a2828^0'=1, b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, ret_ExAllocatePool3030^0'=0, keR^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, k4^0'=-1+k4^0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=0, keA^0'=0, a3131^0'=ret_IoAllocateIrp2727^post43, b2929^0'=0, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, (-1+k4^0 >= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0), cost: 6

Applied chaining
First rule:
l15 -> l29 : b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, k4^0'=-1+k4^0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=pIrb^post43, keA^0'=0, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, (-1+k4^0 >= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0), cost: 4
Second rule:
l29 -> l15 : a2828^0'=1, b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, ret_ExAllocatePool3030^0'=0, keR^0'=0, ResourceIrp^0'=0, k4^0'=0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=pIrb^post43, keA^0'=0, a3131^0'=ResourceIrp^0, b2929^0'=0, ret_IoAllocateIrp2727^0'=0, __rho_99_^0'=0, (-1+k4^0 >= 0 /\ -1+__rho_12_^post45 >= 0), cost: 2+4*k4^0
New rule:
l15 -> l15 : a2828^0'=1, b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, ret_ExAllocatePool3030^0'=0, keR^0'=0, ResourceIrp^0'=0, k4^0'=0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=pIrb^post43, keA^0'=0, a3131^0'=ret_IoAllocateIrp2727^post43, b2929^0'=0, ret_IoAllocateIrp2727^0'=0, __rho_99_^0'=0, (-1+k4^0 >= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -2+k4^0 >= 0), cost: 2+4*k4^0

Applied simplification
Original rule:
l15 -> l15 : a2828^0'=1, b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, ret_ExAllocatePool3030^0'=0, keR^0'=0, ResourceIrp^0'=0, k4^0'=0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=pIrb^post43, keA^0'=0, a3131^0'=ret_IoAllocateIrp2727^post43, b2929^0'=0, ret_IoAllocateIrp2727^0'=0, __rho_99_^0'=0, (-1+k4^0 >= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -2+k4^0 >= 0), cost: 2+4*k4^0
New rule:
l15 -> l15 : a2828^0'=1, b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, ret_ExAllocatePool3030^0'=0, keR^0'=0, ResourceIrp^0'=0, k4^0'=0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=pIrb^post43, keA^0'=0, a3131^0'=ret_IoAllocateIrp2727^post43, b2929^0'=0, ret_IoAllocateIrp2727^0'=0, __rho_99_^0'=0, (1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -2+k4^0 >= 0), cost: 2+4*k4^0

Applied deletion
Removed the following rules: 132 156 157 178 180

Eliminated locations on tree-shaped paths
Start location: l34
 138: l1 -> [36] : k2^0 <= 0, cost: NONTERM
 139: l1 -> l15 : keR^0'=0, i___01313^0'=Irql^0, k4^0'=k4^post48, __rho_11_^0'=k4^post48, i___02020^0'=Irql^0, keA^0'=0, k3^0'=k3^post14, __rho_10_^0'=k3^post14, (k2^0 <= 0 /\ k3^post14 <= 0), cost: 4
 179: l1 -> l15 : __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, i___01313^0'=Irql^0, k4^0'=0, __rho_11_^0'=k4^post48, i___02020^0'=Irql^0, IsochResourceData^0'=__rho_12_^post45, keA^0'=0, k3^0'=k3^post14, __rho_10_^0'=k3^post14, (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ k3^post14 <= 0 /\ __rho_12_^post45 <= 0), cost: 4+3*k4^post48
 181: l1 -> l15 : b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, ResourceIrp^0'=0, i___01313^0'=Irql^0, k4^0'=0, a2525^0'=1, __rho_11_^0'=k4^post48, i___02020^0'=Irql^0, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=pIrb^post43, keA^0'=0, k3^0'=k3^post14, ret_IoAllocateIrp2727^0'=0, __rho_99_^0'=0, __rho_10_^0'=k3^post14, (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0), cost: 4+4*k4^post48
 188: l1 -> l1 : k2^0'=-1+k2^0, __rho_8_^0'=__rho_8_^post7, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (AsyncAddressData^post11 <= 0 /\ -1+k2^0 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 8
 189: l1 -> l1 : k2^0'=-1+k2^0, __rho_8_^0'=__rho_8_^post7, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (-1+AsyncAddressData^post11 >= 0 /\ -1+k2^0 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 8
 190: l1 -> l1 : k2^0'=-1+k2^0, __rho_8_^0'=__rho_8_^post7, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (-1+AsyncAddressData^post11 >= 0 /\ -1+__rho_9_^post4 >= 0 /\ -1+k2^0 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_8_^post7 <= 0), cost: 8
 191: l1 -> l1 : k2^0'=-1+k2^0, __rho_8_^0'=__rho_8_^post7, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (-1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+k2^0 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0), cost: 8
 192: l1 -> l1 : k2^0'=-1+k2^0, __rho_8_^0'=__rho_8_^post7, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (-1+__rho_8_^post7 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+k2^0 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0), cost: 8
 193: l1 -> l1 : k2^0'=-1+k2^0, __rho_8_^0'=__rho_8_^post7, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (AsyncAddressData^post11 <= 0 /\ -1+__rho_7_^post11 >= 0 /\ -1+k2^0 >= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 8
 194: l1 -> l1 : k2^0'=-1+k2^0, __rho_8_^0'=__rho_8_^post7, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (-1+AsyncAddressData^post11 >= 0 /\ -1+__rho_7_^post11 >= 0 /\ -1+k2^0 >= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 8
 195: l1 -> l1 : k2^0'=-1+k2^0, __rho_8_^0'=__rho_8_^post7, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (-1+AsyncAddressData^post11 >= 0 /\ -1+__rho_9_^post4 >= 0 /\ -1+__rho_7_^post11 >= 0 /\ -1+k2^0 >= 0 /\ __rho_8_^post7 <= 0), cost: 8
 196: l1 -> l1 : k2^0'=-1+k2^0, __rho_8_^0'=__rho_8_^post7, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (-1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_7_^post11 >= 0 /\ -1+k2^0 >= 0 /\ __rho_9_^post4 <= 0), cost: 8
 197: l1 -> l1 : k2^0'=-1+k2^0, __rho_8_^0'=__rho_8_^post7, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (-1+__rho_8_^post7 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+__rho_7_^post11 >= 0 /\ -1+k2^0 >= 0 /\ __rho_9_^post4 <= 0), cost: 8
 110: l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=__rho_6_^post25, keR^0'=0, keA^0'=0, i___099^0'=Irql^0, k1^0 <= 0, cost: 2
 184: l7 -> l7 : CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, __rho_5_^0'=__rho_5_^post18, k1^0'=-1+k1^0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (__rho_4_^post23 <= 0 /\ -1+CromData^post24 >= 0 /\ -1+k1^0 >= 0 /\ __rho_5_^post18 <= 0), cost: 7
 185: l7 -> l7 : CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, __rho_5_^0'=__rho_5_^post18, k1^0'=-1+k1^0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_5_^post18 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+CromData^post24 >= 0 /\ -1+k1^0 >= 0), cost: 7
 186: l7 -> l7 : CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, __rho_5_^0'=__rho_5_^post18, k1^0'=-1+k1^0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+k1^0 >= 0 /\ __rho_5_^post18 <= 0), cost: 7
 187: l7 -> l7 : CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, __rho_5_^0'=__rho_5_^post18, k1^0'=-1+k1^0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_5_^post18 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+k1^0 >= 0), cost: 7
 182: l15 -> [39] : k4^0 <= 0, cost: NONTERM
 198: l15 -> [35] : (k4^0 <= 0 /\ k5^post44 <= 0), cost: NONTERM
 199: l15 -> [35] : (-1+__rho_56_^post31 >= 0 /\ k4^0 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
 200: l15 -> l15 : a2828^0'=1, b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, ret_ExAllocatePool3030^0'=0, keR^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, k4^0'=-1+k4^0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=0, keA^0'=0, a3131^0'=ret_IoAllocateIrp2727^post43, b2929^0'=0, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, (-1+k4^0 >= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0), cost: 6
 201: l15 -> l15 : a2828^0'=1, b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, ret_ExAllocatePool3030^0'=0, keR^0'=0, ResourceIrp^0'=0, k4^0'=0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=pIrb^post43, keA^0'=0, a3131^0'=ret_IoAllocateIrp2727^post43, b2929^0'=0, ret_IoAllocateIrp2727^0'=0, __rho_99_^0'=0, (-1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ -2+k4^0 >= 0), cost: 2+4*k4^0
 202: l15 -> l15 : a2828^0'=1, b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, ret_ExAllocatePool3030^0'=0, keR^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, k4^0'=-1+k4^0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=0, keA^0'=0, a3131^0'=ret_IoAllocateIrp2727^post43, b2929^0'=0, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, (-1+k4^0 >= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0), cost: 6
 203: l15 -> l15 : a2828^0'=1, b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, ret_ExAllocatePool3030^0'=0, keR^0'=0, ResourceIrp^0'=0, k4^0'=0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=pIrb^post43, keA^0'=0, a3131^0'=ret_IoAllocateIrp2727^post43, b2929^0'=0, ret_IoAllocateIrp2727^0'=0, __rho_99_^0'=0, (1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -2+k4^0 >= 0), cost: 2+4*k4^0
 140: l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=__rho_2_^post37, keA^0'=0, __rho_1_^post50 <= 0, cost: 4
 141: l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, a11^0'=1, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=__rho_2_^post37, keA^0'=0, -1+__rho_1_^post50 >= 0, cost: 4
 174: l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, (-1+__rho_2_^post37 >= 0 /\ CromData^post24 <= 0 /\ __rho_1_^post50 <= 0), cost: 4+3*__rho_2_^post37
 175: l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, a11^0'=1, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, (-1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ CromData^post24 <= 0), cost: 4+3*__rho_2_^post37


Applied pruning (of leafs and parallel rules):
Start location: l34
 138: l1 -> [36] : k2^0 <= 0, cost: NONTERM
 139: l1 -> l15 : keR^0'=0, i___01313^0'=Irql^0, k4^0'=k4^post48, __rho_11_^0'=k4^post48, i___02020^0'=Irql^0, keA^0'=0, k3^0'=k3^post14, __rho_10_^0'=k3^post14, (k2^0 <= 0 /\ k3^post14 <= 0), cost: 4
 179: l1 -> l15 : __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, i___01313^0'=Irql^0, k4^0'=0, __rho_11_^0'=k4^post48, i___02020^0'=Irql^0, IsochResourceData^0'=__rho_12_^post45, keA^0'=0, k3^0'=k3^post14, __rho_10_^0'=k3^post14, (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ k3^post14 <= 0 /\ __rho_12_^post45 <= 0), cost: 4+3*k4^post48
 181: l1 -> l15 : b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, ResourceIrp^0'=0, i___01313^0'=Irql^0, k4^0'=0, a2525^0'=1, __rho_11_^0'=k4^post48, i___02020^0'=Irql^0, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=pIrb^post43, keA^0'=0, k3^0'=k3^post14, ret_IoAllocateIrp2727^0'=0, __rho_99_^0'=0, __rho_10_^0'=k3^post14, (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0), cost: 4+4*k4^post48
 188: l1 -> l1 : k2^0'=-1+k2^0, __rho_8_^0'=__rho_8_^post7, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (AsyncAddressData^post11 <= 0 /\ -1+k2^0 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 8
 189: l1 -> l1 : k2^0'=-1+k2^0, __rho_8_^0'=__rho_8_^post7, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (-1+AsyncAddressData^post11 >= 0 /\ -1+k2^0 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 8
 191: l1 -> l1 : k2^0'=-1+k2^0, __rho_8_^0'=__rho_8_^post7, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (-1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+k2^0 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0), cost: 8
 192: l1 -> l1 : k2^0'=-1+k2^0, __rho_8_^0'=__rho_8_^post7, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (-1+__rho_8_^post7 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+k2^0 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0), cost: 8
 193: l1 -> l1 : k2^0'=-1+k2^0, __rho_8_^0'=__rho_8_^post7, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (AsyncAddressData^post11 <= 0 /\ -1+__rho_7_^post11 >= 0 /\ -1+k2^0 >= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 8
 110: l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=__rho_6_^post25, keR^0'=0, keA^0'=0, i___099^0'=Irql^0, k1^0 <= 0, cost: 2
 184: l7 -> l7 : CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, __rho_5_^0'=__rho_5_^post18, k1^0'=-1+k1^0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (__rho_4_^post23 <= 0 /\ -1+CromData^post24 >= 0 /\ -1+k1^0 >= 0 /\ __rho_5_^post18 <= 0), cost: 7
 185: l7 -> l7 : CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, __rho_5_^0'=__rho_5_^post18, k1^0'=-1+k1^0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_5_^post18 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+CromData^post24 >= 0 /\ -1+k1^0 >= 0), cost: 7
 186: l7 -> l7 : CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, __rho_5_^0'=__rho_5_^post18, k1^0'=-1+k1^0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+k1^0 >= 0 /\ __rho_5_^post18 <= 0), cost: 7
 187: l7 -> l7 : CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, __rho_5_^0'=__rho_5_^post18, k1^0'=-1+k1^0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_5_^post18 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+k1^0 >= 0), cost: 7
 182: l15 -> [39] : k4^0 <= 0, cost: NONTERM
 198: l15 -> [35] : (k4^0 <= 0 /\ k5^post44 <= 0), cost: NONTERM
 199: l15 -> [35] : (-1+__rho_56_^post31 >= 0 /\ k4^0 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
 200: l15 -> l15 : a2828^0'=1, b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, ret_ExAllocatePool3030^0'=0, keR^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, k4^0'=-1+k4^0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=0, keA^0'=0, a3131^0'=ret_IoAllocateIrp2727^post43, b2929^0'=0, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, (-1+k4^0 >= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0), cost: 6
 201: l15 -> l15 : a2828^0'=1, b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, ret_ExAllocatePool3030^0'=0, keR^0'=0, ResourceIrp^0'=0, k4^0'=0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=pIrb^post43, keA^0'=0, a3131^0'=ret_IoAllocateIrp2727^post43, b2929^0'=0, ret_IoAllocateIrp2727^0'=0, __rho_99_^0'=0, (-1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ -2+k4^0 >= 0), cost: 2+4*k4^0
 202: l15 -> l15 : a2828^0'=1, b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, ret_ExAllocatePool3030^0'=0, keR^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, k4^0'=-1+k4^0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=0, keA^0'=0, a3131^0'=ret_IoAllocateIrp2727^post43, b2929^0'=0, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, (-1+k4^0 >= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0), cost: 6
 203: l15 -> l15 : a2828^0'=1, b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, ret_ExAllocatePool3030^0'=0, keR^0'=0, ResourceIrp^0'=0, k4^0'=0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=pIrb^post43, keA^0'=0, a3131^0'=ret_IoAllocateIrp2727^post43, b2929^0'=0, ret_IoAllocateIrp2727^0'=0, __rho_99_^0'=0, (1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -2+k4^0 >= 0), cost: 2+4*k4^0
 140: l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=__rho_2_^post37, keA^0'=0, __rho_1_^post50 <= 0, cost: 4
 141: l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, a11^0'=1, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=__rho_2_^post37, keA^0'=0, -1+__rho_1_^post50 >= 0, cost: 4
 174: l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, (-1+__rho_2_^post37 >= 0 /\ CromData^post24 <= 0 /\ __rho_1_^post50 <= 0), cost: 4+3*__rho_2_^post37
 175: l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, a11^0'=1, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, (-1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ CromData^post24 <= 0), cost: 4+3*__rho_2_^post37


Applied acceleration
Original rule:
l1 -> l1 : k2^0'=-1+k2^0, __rho_8_^0'=__rho_8_^post7, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (AsyncAddressData^post11 <= 0 /\ -1+k2^0 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 8
New rule:
l1 -> l1 : k2^0'=k2^0-n6, __rho_8_^0'=__rho_8_^post7, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (-__rho_8_^post7 >= 0 /\ -1+n6 >= 0 /\ -__rho_7_^post11 >= 0 /\ -AsyncAddressData^post11 >= 0 /\ -__rho_9_^post4 >= 0 /\ k2^0-n6 >= 0), cost: 8*n6
Sub-proof via acceration calculus written to file:///tmp/tmpnam_APcenF.txt

Applied instantiation
Original rule:
l1 -> l1 : k2^0'=k2^0-n6, __rho_8_^0'=__rho_8_^post7, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (-__rho_8_^post7 >= 0 /\ -1+n6 >= 0 /\ -__rho_7_^post11 >= 0 /\ -AsyncAddressData^post11 >= 0 /\ -__rho_9_^post4 >= 0 /\ k2^0-n6 >= 0), cost: 8*n6
New rule:
l1 -> l1 : k2^0'=0, __rho_8_^0'=__rho_8_^post7, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (0 >= 0 /\ -__rho_8_^post7 >= 0 /\ -__rho_7_^post11 >= 0 /\ -AsyncAddressData^post11 >= 0 /\ -__rho_9_^post4 >= 0 /\ -1+k2^0 >= 0), cost: 8*k2^0

Applied acceleration
Original rule:
l1 -> l1 : k2^0'=-1+k2^0, __rho_8_^0'=__rho_8_^post7, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (-1+AsyncAddressData^post11 >= 0 /\ -1+k2^0 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 8
New rule:
l1 -> l1 : k2^0'=k2^0-n7, __rho_8_^0'=__rho_8_^post7, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (-__rho_8_^post7 >= 0 /\ -1+n7 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -__rho_7_^post11 >= 0 /\ -__rho_9_^post4 >= 0 /\ k2^0-n7 >= 0), cost: 8*n7
Sub-proof via acceration calculus written to file:///tmp/tmpnam_fGBbAK.txt

Applied instantiation
Original rule:
l1 -> l1 : k2^0'=k2^0-n7, __rho_8_^0'=__rho_8_^post7, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (-__rho_8_^post7 >= 0 /\ -1+n7 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -__rho_7_^post11 >= 0 /\ -__rho_9_^post4 >= 0 /\ k2^0-n7 >= 0), cost: 8*n7
New rule:
l1 -> l1 : k2^0'=0, __rho_8_^0'=__rho_8_^post7, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (0 >= 0 /\ -__rho_8_^post7 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -__rho_7_^post11 >= 0 /\ -__rho_9_^post4 >= 0 /\ -1+k2^0 >= 0), cost: 8*k2^0

Applied acceleration
Original rule:
l1 -> l1 : k2^0'=-1+k2^0, __rho_8_^0'=__rho_8_^post7, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (-1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+k2^0 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0), cost: 8
New rule:
l1 -> l1 : k2^0'=k2^0-n8, __rho_8_^0'=__rho_8_^post7, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (-1+n8 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -__rho_7_^post11 >= 0 /\ -AsyncAddressData^post11 >= 0 /\ -__rho_9_^post4 >= 0 /\ k2^0-n8 >= 0), cost: 8*n8
Sub-proof via acceration calculus written to file:///tmp/tmpnam_dfHLBJ.txt

Applied instantiation
Original rule:
l1 -> l1 : k2^0'=k2^0-n8, __rho_8_^0'=__rho_8_^post7, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (-1+n8 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -__rho_7_^post11 >= 0 /\ -AsyncAddressData^post11 >= 0 /\ -__rho_9_^post4 >= 0 /\ k2^0-n8 >= 0), cost: 8*n8
New rule:
l1 -> l1 : k2^0'=0, __rho_8_^0'=__rho_8_^post7, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (0 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -__rho_7_^post11 >= 0 /\ -AsyncAddressData^post11 >= 0 /\ -__rho_9_^post4 >= 0 /\ -1+k2^0 >= 0), cost: 8*k2^0

Applied acceleration
Original rule:
l1 -> l1 : k2^0'=-1+k2^0, __rho_8_^0'=__rho_8_^post7, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (-1+__rho_8_^post7 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+k2^0 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0), cost: 8
New rule:
l1 -> l1 : k2^0'=-n9+k2^0, __rho_8_^0'=__rho_8_^post7, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (-1+__rho_8_^post7 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -__rho_7_^post11 >= 0 /\ -__rho_9_^post4 >= 0 /\ -1+n9 >= 0 /\ -n9+k2^0 >= 0), cost: 8*n9
Sub-proof via acceration calculus written to file:///tmp/tmpnam_MIAiOJ.txt

Applied instantiation
Original rule:
l1 -> l1 : k2^0'=-n9+k2^0, __rho_8_^0'=__rho_8_^post7, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (-1+__rho_8_^post7 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -__rho_7_^post11 >= 0 /\ -__rho_9_^post4 >= 0 /\ -1+n9 >= 0 /\ -n9+k2^0 >= 0), cost: 8*n9
New rule:
l1 -> l1 : k2^0'=0, __rho_8_^0'=__rho_8_^post7, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (0 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -__rho_7_^post11 >= 0 /\ -__rho_9_^post4 >= 0 /\ -1+k2^0 >= 0), cost: 8*k2^0

Applied acceleration
Original rule:
l1 -> l1 : k2^0'=-1+k2^0, __rho_8_^0'=__rho_8_^post7, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (AsyncAddressData^post11 <= 0 /\ -1+__rho_7_^post11 >= 0 /\ -1+k2^0 >= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 8
New rule:
l1 -> l1 : k2^0'=k2^0-n10, __rho_8_^0'=__rho_8_^post7, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (-1+n10 >= 0 /\ -__rho_8_^post7 >= 0 /\ -AsyncAddressData^post11 >= 0 /\ -__rho_9_^post4 >= 0 /\ -1+__rho_7_^post11 >= 0 /\ k2^0-n10 >= 0), cost: 8*n10
Sub-proof via acceration calculus written to file:///tmp/tmpnam_JMjaNl.txt

Applied instantiation
Original rule:
l1 -> l1 : k2^0'=k2^0-n10, __rho_8_^0'=__rho_8_^post7, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (-1+n10 >= 0 /\ -__rho_8_^post7 >= 0 /\ -AsyncAddressData^post11 >= 0 /\ -__rho_9_^post4 >= 0 /\ -1+__rho_7_^post11 >= 0 /\ k2^0-n10 >= 0), cost: 8*n10
New rule:
l1 -> l1 : k2^0'=0, __rho_8_^0'=__rho_8_^post7, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (0 >= 0 /\ -__rho_8_^post7 >= 0 /\ -AsyncAddressData^post11 >= 0 /\ -__rho_9_^post4 >= 0 /\ -1+__rho_7_^post11 >= 0 /\ -1+k2^0 >= 0), cost: 8*k2^0

Applied simplification
Original rule:
l1 -> l1 : k2^0'=0, __rho_8_^0'=__rho_8_^post7, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (0 >= 0 /\ -__rho_8_^post7 >= 0 /\ -__rho_7_^post11 >= 0 /\ -AsyncAddressData^post11 >= 0 /\ -__rho_9_^post4 >= 0 /\ -1+k2^0 >= 0), cost: 8*k2^0
New rule:
l1 -> l1 : k2^0'=0, __rho_8_^0'=__rho_8_^post7, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (AsyncAddressData^post11 <= 0 /\ -1+k2^0 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 8*k2^0

Applied simplification
Original rule:
l1 -> l1 : k2^0'=0, __rho_8_^0'=__rho_8_^post7, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (0 >= 0 /\ -__rho_8_^post7 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -__rho_7_^post11 >= 0 /\ -__rho_9_^post4 >= 0 /\ -1+k2^0 >= 0), cost: 8*k2^0
New rule:
l1 -> l1 : k2^0'=0, __rho_8_^0'=__rho_8_^post7, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (-1+AsyncAddressData^post11 >= 0 /\ -1+k2^0 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 8*k2^0

Applied simplification
Original rule:
l1 -> l1 : k2^0'=0, __rho_8_^0'=__rho_8_^post7, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (0 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -__rho_7_^post11 >= 0 /\ -AsyncAddressData^post11 >= 0 /\ -__rho_9_^post4 >= 0 /\ -1+k2^0 >= 0), cost: 8*k2^0
New rule:
l1 -> l1 : k2^0'=0, __rho_8_^0'=__rho_8_^post7, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (-1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+k2^0 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0), cost: 8*k2^0

Applied simplification
Original rule:
l1 -> l1 : k2^0'=0, __rho_8_^0'=__rho_8_^post7, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (0 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -__rho_7_^post11 >= 0 /\ -__rho_9_^post4 >= 0 /\ -1+k2^0 >= 0), cost: 8*k2^0
New rule:
l1 -> l1 : k2^0'=0, __rho_8_^0'=__rho_8_^post7, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (-1+__rho_8_^post7 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+k2^0 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0), cost: 8*k2^0

Applied simplification
Original rule:
l1 -> l1 : k2^0'=0, __rho_8_^0'=__rho_8_^post7, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (0 >= 0 /\ -__rho_8_^post7 >= 0 /\ -AsyncAddressData^post11 >= 0 /\ -__rho_9_^post4 >= 0 /\ -1+__rho_7_^post11 >= 0 /\ -1+k2^0 >= 0), cost: 8*k2^0
New rule:
l1 -> l1 : k2^0'=0, __rho_8_^0'=__rho_8_^post7, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (AsyncAddressData^post11 <= 0 /\ -1+__rho_7_^post11 >= 0 /\ -1+k2^0 >= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 8*k2^0

Applied deletion
Removed the following rules: 188 189 191 192 193

Applied acceleration
Original rule:
l7 -> l7 : CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, __rho_5_^0'=__rho_5_^post18, k1^0'=-1+k1^0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (__rho_4_^post23 <= 0 /\ -1+CromData^post24 >= 0 /\ -1+k1^0 >= 0 /\ __rho_5_^post18 <= 0), cost: 7
New rule:
l7 -> l7 : CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, __rho_5_^0'=__rho_5_^post18, k1^0'=-n11+k1^0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-__rho_5_^post18 >= 0 /\ -1+CromData^post24 >= 0 /\ -__rho_4_^post23 >= 0 /\ -n11+k1^0 >= 0 /\ -1+n11 >= 0), cost: 7*n11
Sub-proof via acceration calculus written to file:///tmp/tmpnam_fPFfPa.txt

Applied instantiation
Original rule:
l7 -> l7 : CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, __rho_5_^0'=__rho_5_^post18, k1^0'=-n11+k1^0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-__rho_5_^post18 >= 0 /\ -1+CromData^post24 >= 0 /\ -__rho_4_^post23 >= 0 /\ -n11+k1^0 >= 0 /\ -1+n11 >= 0), cost: 7*n11
New rule:
l7 -> l7 : CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, __rho_5_^0'=__rho_5_^post18, k1^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (0 >= 0 /\ -__rho_5_^post18 >= 0 /\ -1+CromData^post24 >= 0 /\ -__rho_4_^post23 >= 0 /\ -1+k1^0 >= 0), cost: 7*k1^0

Applied acceleration
Original rule:
l7 -> l7 : CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, __rho_5_^0'=__rho_5_^post18, k1^0'=-1+k1^0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_5_^post18 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+CromData^post24 >= 0 /\ -1+k1^0 >= 0), cost: 7
New rule:
l7 -> l7 : CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, __rho_5_^0'=__rho_5_^post18, k1^0'=-n12+k1^0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_5_^post18 >= 0 /\ -1+CromData^post24 >= 0 /\ -__rho_4_^post23 >= 0 /\ -n12+k1^0 >= 0 /\ -1+n12 >= 0), cost: 7*n12
Sub-proof via acceration calculus written to file:///tmp/tmpnam_LiDniE.txt

Applied instantiation
Original rule:
l7 -> l7 : CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, __rho_5_^0'=__rho_5_^post18, k1^0'=-n12+k1^0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_5_^post18 >= 0 /\ -1+CromData^post24 >= 0 /\ -__rho_4_^post23 >= 0 /\ -n12+k1^0 >= 0 /\ -1+n12 >= 0), cost: 7*n12
New rule:
l7 -> l7 : CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, __rho_5_^0'=__rho_5_^post18, k1^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (0 >= 0 /\ -1+__rho_5_^post18 >= 0 /\ -1+CromData^post24 >= 0 /\ -__rho_4_^post23 >= 0 /\ -1+k1^0 >= 0), cost: 7*k1^0

Applied acceleration
Original rule:
l7 -> l7 : CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, __rho_5_^0'=__rho_5_^post18, k1^0'=-1+k1^0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+k1^0 >= 0 /\ __rho_5_^post18 <= 0), cost: 7
New rule:
l7 -> l7 : CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, __rho_5_^0'=__rho_5_^post18, k1^0'=-n13+k1^0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-__rho_5_^post18 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -n13+k1^0 >= 0 /\ -1+n13 >= 0), cost: 7*n13
Sub-proof via acceration calculus written to file:///tmp/tmpnam_IKmLbH.txt

Applied instantiation
Original rule:
l7 -> l7 : CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, __rho_5_^0'=__rho_5_^post18, k1^0'=-n13+k1^0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-__rho_5_^post18 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -n13+k1^0 >= 0 /\ -1+n13 >= 0), cost: 7*n13
New rule:
l7 -> l7 : CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, __rho_5_^0'=__rho_5_^post18, k1^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (0 >= 0 /\ -__rho_5_^post18 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+k1^0 >= 0), cost: 7*k1^0

Applied acceleration
Original rule:
l7 -> l7 : CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, __rho_5_^0'=__rho_5_^post18, k1^0'=-1+k1^0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_5_^post18 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+k1^0 >= 0), cost: 7
New rule:
l7 -> l7 : CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, __rho_5_^0'=__rho_5_^post18, k1^0'=-n14+k1^0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_5_^post18 >= 0 /\ -1+CromData^post24 >= 0 /\ -n14+k1^0 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+n14 >= 0), cost: 7*n14
Sub-proof via acceration calculus written to file:///tmp/tmpnam_eDnaAA.txt

Applied instantiation
Original rule:
l7 -> l7 : CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, __rho_5_^0'=__rho_5_^post18, k1^0'=-n14+k1^0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_5_^post18 >= 0 /\ -1+CromData^post24 >= 0 /\ -n14+k1^0 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+n14 >= 0), cost: 7*n14
New rule:
l7 -> l7 : CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, __rho_5_^0'=__rho_5_^post18, k1^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (0 >= 0 /\ -1+__rho_5_^post18 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+k1^0 >= 0), cost: 7*k1^0

Applied simplification
Original rule:
l7 -> l7 : CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, __rho_5_^0'=__rho_5_^post18, k1^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (0 >= 0 /\ -__rho_5_^post18 >= 0 /\ -1+CromData^post24 >= 0 /\ -__rho_4_^post23 >= 0 /\ -1+k1^0 >= 0), cost: 7*k1^0
New rule:
l7 -> l7 : CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, __rho_5_^0'=__rho_5_^post18, k1^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (__rho_4_^post23 <= 0 /\ -1+CromData^post24 >= 0 /\ -1+k1^0 >= 0 /\ __rho_5_^post18 <= 0), cost: 7*k1^0

Applied simplification
Original rule:
l7 -> l7 : CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, __rho_5_^0'=__rho_5_^post18, k1^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (0 >= 0 /\ -1+__rho_5_^post18 >= 0 /\ -1+CromData^post24 >= 0 /\ -__rho_4_^post23 >= 0 /\ -1+k1^0 >= 0), cost: 7*k1^0
New rule:
l7 -> l7 : CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, __rho_5_^0'=__rho_5_^post18, k1^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_5_^post18 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+CromData^post24 >= 0 /\ -1+k1^0 >= 0), cost: 7*k1^0

Applied simplification
Original rule:
l7 -> l7 : CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, __rho_5_^0'=__rho_5_^post18, k1^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (0 >= 0 /\ -__rho_5_^post18 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+k1^0 >= 0), cost: 7*k1^0
New rule:
l7 -> l7 : CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, __rho_5_^0'=__rho_5_^post18, k1^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+k1^0 >= 0 /\ __rho_5_^post18 <= 0), cost: 7*k1^0

Applied simplification
Original rule:
l7 -> l7 : CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, __rho_5_^0'=__rho_5_^post18, k1^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (0 >= 0 /\ -1+__rho_5_^post18 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+k1^0 >= 0), cost: 7*k1^0
New rule:
l7 -> l7 : CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, __rho_5_^0'=__rho_5_^post18, k1^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_5_^post18 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+k1^0 >= 0), cost: 7*k1^0

Applied deletion
Removed the following rules: 184 185 186 187

Applied acceleration
Original rule:
l15 -> l15 : a2828^0'=1, b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, ret_ExAllocatePool3030^0'=0, keR^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, k4^0'=-1+k4^0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=0, keA^0'=0, a3131^0'=ret_IoAllocateIrp2727^post43, b2929^0'=0, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, (-1+k4^0 >= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0), cost: 6
New rule:
l15 -> l15 : a2828^0'=1, b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, ret_ExAllocatePool3030^0'=0, keR^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, k4^0'=-n15+k4^0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=0, keA^0'=0, a3131^0'=ret_IoAllocateIrp2727^post43, b2929^0'=0, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, (-n15+k4^0 >= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ -1+n15 >= 0), cost: 6*n15
Sub-proof via acceration calculus written to file:///tmp/tmpnam_bMJcio.txt

Applied instantiation
Original rule:
l15 -> l15 : a2828^0'=1, b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, ret_ExAllocatePool3030^0'=0, keR^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, k4^0'=-n15+k4^0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=0, keA^0'=0, a3131^0'=ret_IoAllocateIrp2727^post43, b2929^0'=0, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, (-n15+k4^0 >= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ -1+n15 >= 0), cost: 6*n15
New rule:
l15 -> l15 : a2828^0'=1, b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, ret_ExAllocatePool3030^0'=0, keR^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, k4^0'=0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=0, keA^0'=0, a3131^0'=ret_IoAllocateIrp2727^post43, b2929^0'=0, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, (0 >= 0 /\ -1+k4^0 >= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0), cost: 6*k4^0

Applied acceleration
Original rule:
l15 -> l15 : a2828^0'=1, b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, ret_ExAllocatePool3030^0'=0, keR^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, k4^0'=-1+k4^0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=0, keA^0'=0, a3131^0'=ret_IoAllocateIrp2727^post43, b2929^0'=0, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, (-1+k4^0 >= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0), cost: 6
New rule:
l15 -> l15 : a2828^0'=1, b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, ret_ExAllocatePool3030^0'=0, keR^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, k4^0'=-n17+k4^0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=0, keA^0'=0, a3131^0'=ret_IoAllocateIrp2727^post43, b2929^0'=0, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, (-n17+k4^0 >= 0 /\ -1-ret_IoAllocateIrp2727^post43 >= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+n17 >= 0), cost: 6*n17
Sub-proof via acceration calculus written to file:///tmp/tmpnam_LJeaIe.txt

Applied instantiation
Original rule:
l15 -> l15 : a2828^0'=1, b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, ret_ExAllocatePool3030^0'=0, keR^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, k4^0'=-n17+k4^0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=0, keA^0'=0, a3131^0'=ret_IoAllocateIrp2727^post43, b2929^0'=0, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, (-n17+k4^0 >= 0 /\ -1-ret_IoAllocateIrp2727^post43 >= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+n17 >= 0), cost: 6*n17
New rule:
l15 -> l15 : a2828^0'=1, b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, ret_ExAllocatePool3030^0'=0, keR^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, k4^0'=0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=0, keA^0'=0, a3131^0'=ret_IoAllocateIrp2727^post43, b2929^0'=0, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, (0 >= 0 /\ -1+k4^0 >= 0 /\ -1-ret_IoAllocateIrp2727^post43 >= 0 /\ -1+__rho_12_^post45 >= 0), cost: 6*k4^0

Applied simplification
Original rule:
l15 -> l15 : a2828^0'=1, b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, ret_ExAllocatePool3030^0'=0, keR^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, k4^0'=0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=0, keA^0'=0, a3131^0'=ret_IoAllocateIrp2727^post43, b2929^0'=0, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, (0 >= 0 /\ -1+k4^0 >= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0), cost: 6*k4^0
New rule:
l15 -> l15 : a2828^0'=1, b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, ret_ExAllocatePool3030^0'=0, keR^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, k4^0'=0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=0, keA^0'=0, a3131^0'=ret_IoAllocateIrp2727^post43, b2929^0'=0, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, (-1+k4^0 >= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0), cost: 6*k4^0

Applied simplification
Original rule:
l15 -> l15 : a2828^0'=1, b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, ret_ExAllocatePool3030^0'=0, keR^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, k4^0'=0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=0, keA^0'=0, a3131^0'=ret_IoAllocateIrp2727^post43, b2929^0'=0, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, (0 >= 0 /\ -1+k4^0 >= 0 /\ -1-ret_IoAllocateIrp2727^post43 >= 0 /\ -1+__rho_12_^post45 >= 0), cost: 6*k4^0
New rule:
l15 -> l15 : a2828^0'=1, b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, ret_ExAllocatePool3030^0'=0, keR^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, k4^0'=0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=0, keA^0'=0, a3131^0'=ret_IoAllocateIrp2727^post43, b2929^0'=0, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, (-1+k4^0 >= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0), cost: 6*k4^0

Applied deletion
Removed the following rules: 200 202

Accelerated simple loops
Start location: l34
 138: l1 -> [36] : k2^0 <= 0, cost: NONTERM
 139: l1 -> l15 : keR^0'=0, i___01313^0'=Irql^0, k4^0'=k4^post48, __rho_11_^0'=k4^post48, i___02020^0'=Irql^0, keA^0'=0, k3^0'=k3^post14, __rho_10_^0'=k3^post14, (k2^0 <= 0 /\ k3^post14 <= 0), cost: 4
 179: l1 -> l15 : __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, i___01313^0'=Irql^0, k4^0'=0, __rho_11_^0'=k4^post48, i___02020^0'=Irql^0, IsochResourceData^0'=__rho_12_^post45, keA^0'=0, k3^0'=k3^post14, __rho_10_^0'=k3^post14, (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ k3^post14 <= 0 /\ __rho_12_^post45 <= 0), cost: 4+3*k4^post48
 181: l1 -> l15 : b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, ResourceIrp^0'=0, i___01313^0'=Irql^0, k4^0'=0, a2525^0'=1, __rho_11_^0'=k4^post48, i___02020^0'=Irql^0, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=pIrb^post43, keA^0'=0, k3^0'=k3^post14, ret_IoAllocateIrp2727^0'=0, __rho_99_^0'=0, __rho_10_^0'=k3^post14, (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0), cost: 4+4*k4^post48
 209: l1 -> l1 : k2^0'=0, __rho_8_^0'=__rho_8_^post7, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (AsyncAddressData^post11 <= 0 /\ -1+k2^0 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 8*k2^0
 210: l1 -> l1 : k2^0'=0, __rho_8_^0'=__rho_8_^post7, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (-1+AsyncAddressData^post11 >= 0 /\ -1+k2^0 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 8*k2^0
 211: l1 -> l1 : k2^0'=0, __rho_8_^0'=__rho_8_^post7, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (-1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+k2^0 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0), cost: 8*k2^0
 212: l1 -> l1 : k2^0'=0, __rho_8_^0'=__rho_8_^post7, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (-1+__rho_8_^post7 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+k2^0 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0), cost: 8*k2^0
 213: l1 -> l1 : k2^0'=0, __rho_8_^0'=__rho_8_^post7, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (AsyncAddressData^post11 <= 0 /\ -1+__rho_7_^post11 >= 0 /\ -1+k2^0 >= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 8*k2^0
 110: l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=__rho_6_^post25, keR^0'=0, keA^0'=0, i___099^0'=Irql^0, k1^0 <= 0, cost: 2
 218: l7 -> l7 : CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, __rho_5_^0'=__rho_5_^post18, k1^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (__rho_4_^post23 <= 0 /\ -1+CromData^post24 >= 0 /\ -1+k1^0 >= 0 /\ __rho_5_^post18 <= 0), cost: 7*k1^0
 219: l7 -> l7 : CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, __rho_5_^0'=__rho_5_^post18, k1^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_5_^post18 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+CromData^post24 >= 0 /\ -1+k1^0 >= 0), cost: 7*k1^0
 220: l7 -> l7 : CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, __rho_5_^0'=__rho_5_^post18, k1^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+k1^0 >= 0 /\ __rho_5_^post18 <= 0), cost: 7*k1^0
 221: l7 -> l7 : CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, __rho_5_^0'=__rho_5_^post18, k1^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_5_^post18 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+k1^0 >= 0), cost: 7*k1^0
 182: l15 -> [39] : k4^0 <= 0, cost: NONTERM
 198: l15 -> [35] : (k4^0 <= 0 /\ k5^post44 <= 0), cost: NONTERM
 199: l15 -> [35] : (-1+__rho_56_^post31 >= 0 /\ k4^0 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
 201: l15 -> l15 : a2828^0'=1, b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, ret_ExAllocatePool3030^0'=0, keR^0'=0, ResourceIrp^0'=0, k4^0'=0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=pIrb^post43, keA^0'=0, a3131^0'=ret_IoAllocateIrp2727^post43, b2929^0'=0, ret_IoAllocateIrp2727^0'=0, __rho_99_^0'=0, (-1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ -2+k4^0 >= 0), cost: 2+4*k4^0
 203: l15 -> l15 : a2828^0'=1, b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, ret_ExAllocatePool3030^0'=0, keR^0'=0, ResourceIrp^0'=0, k4^0'=0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=pIrb^post43, keA^0'=0, a3131^0'=ret_IoAllocateIrp2727^post43, b2929^0'=0, ret_IoAllocateIrp2727^0'=0, __rho_99_^0'=0, (1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -2+k4^0 >= 0), cost: 2+4*k4^0
 224: l15 -> l15 : a2828^0'=1, b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, ret_ExAllocatePool3030^0'=0, keR^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, k4^0'=0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=0, keA^0'=0, a3131^0'=ret_IoAllocateIrp2727^post43, b2929^0'=0, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, (-1+k4^0 >= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0), cost: 6*k4^0
 225: l15 -> l15 : a2828^0'=1, b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, ret_ExAllocatePool3030^0'=0, keR^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, k4^0'=0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=0, keA^0'=0, a3131^0'=ret_IoAllocateIrp2727^post43, b2929^0'=0, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, (-1+k4^0 >= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0), cost: 6*k4^0
 140: l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=__rho_2_^post37, keA^0'=0, __rho_1_^post50 <= 0, cost: 4
 141: l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, a11^0'=1, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=__rho_2_^post37, keA^0'=0, -1+__rho_1_^post50 >= 0, cost: 4
 174: l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, (-1+__rho_2_^post37 >= 0 /\ CromData^post24 <= 0 /\ __rho_1_^post50 <= 0), cost: 4+3*__rho_2_^post37
 175: l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, a11^0'=1, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, (-1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ CromData^post24 <= 0), cost: 4+3*__rho_2_^post37


Applied chaining
First rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=__rho_6_^post25, keR^0'=0, keA^0'=0, i___099^0'=Irql^0, k1^0 <= 0, cost: 2
Second rule:
l1 -> l1 : k2^0'=0, __rho_8_^0'=__rho_8_^post7, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (AsyncAddressData^post11 <= 0 /\ -1+k2^0 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 8*k2^0
New rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (AsyncAddressData^post11 <= 0 /\ k1^0 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 2+8*__rho_6_^post25

Applied chaining
First rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=__rho_6_^post25, keR^0'=0, keA^0'=0, i___099^0'=Irql^0, k1^0 <= 0, cost: 2
Second rule:
l1 -> l1 : k2^0'=0, __rho_8_^0'=__rho_8_^post7, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (-1+AsyncAddressData^post11 >= 0 /\ -1+k2^0 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 8*k2^0
New rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+AsyncAddressData^post11 >= 0 /\ k1^0 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 2+8*__rho_6_^post25

Applied chaining
First rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=__rho_6_^post25, keR^0'=0, keA^0'=0, i___099^0'=Irql^0, k1^0 <= 0, cost: 2
Second rule:
l1 -> l1 : k2^0'=0, __rho_8_^0'=__rho_8_^post7, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (-1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+k2^0 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0), cost: 8*k2^0
New rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k1^0 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0), cost: 2+8*__rho_6_^post25

Applied chaining
First rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=__rho_6_^post25, keR^0'=0, keA^0'=0, i___099^0'=Irql^0, k1^0 <= 0, cost: 2
Second rule:
l1 -> l1 : k2^0'=0, __rho_8_^0'=__rho_8_^post7, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (-1+__rho_8_^post7 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+k2^0 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0), cost: 8*k2^0
New rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ k1^0 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0), cost: 2+8*__rho_6_^post25

Applied chaining
First rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=__rho_6_^post25, keR^0'=0, keA^0'=0, i___099^0'=Irql^0, k1^0 <= 0, cost: 2
Second rule:
l1 -> l1 : k2^0'=0, __rho_8_^0'=__rho_8_^post7, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, (AsyncAddressData^post11 <= 0 /\ -1+__rho_7_^post11 >= 0 /\ -1+k2^0 >= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 8*k2^0
New rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (AsyncAddressData^post11 <= 0 /\ -1+__rho_7_^post11 >= 0 /\ k1^0 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 2+8*__rho_6_^post25

Applied deletion
Removed the following rules: 209 210 211 212 213

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=__rho_2_^post37, keA^0'=0, __rho_1_^post50 <= 0, cost: 4
Second rule:
l7 -> l7 : CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, __rho_5_^0'=__rho_5_^post18, k1^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (__rho_4_^post23 <= 0 /\ -1+CromData^post24 >= 0 /\ -1+k1^0 >= 0 /\ __rho_5_^post18 <= 0), cost: 7*k1^0
New rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (__rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ __rho_1_^post50 <= 0 /\ __rho_5_^post18 <= 0), cost: 4+7*__rho_2_^post37

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, a11^0'=1, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=__rho_2_^post37, keA^0'=0, -1+__rho_1_^post50 >= 0, cost: 4
Second rule:
l7 -> l7 : CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, __rho_5_^0'=__rho_5_^post18, k1^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (__rho_4_^post23 <= 0 /\ -1+CromData^post24 >= 0 /\ -1+k1^0 >= 0 /\ __rho_5_^post18 <= 0), cost: 7*k1^0
New rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, a11^0'=1, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_1_^post50 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ __rho_5_^post18 <= 0), cost: 4+7*__rho_2_^post37

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=__rho_2_^post37, keA^0'=0, __rho_1_^post50 <= 0, cost: 4
Second rule:
l7 -> l7 : CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, __rho_5_^0'=__rho_5_^post18, k1^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_5_^post18 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+CromData^post24 >= 0 /\ -1+k1^0 >= 0), cost: 7*k1^0
New rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_5_^post18 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ __rho_1_^post50 <= 0), cost: 4+7*__rho_2_^post37

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, a11^0'=1, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=__rho_2_^post37, keA^0'=0, -1+__rho_1_^post50 >= 0, cost: 4
Second rule:
l7 -> l7 : CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, __rho_5_^0'=__rho_5_^post18, k1^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_5_^post18 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+CromData^post24 >= 0 /\ -1+k1^0 >= 0), cost: 7*k1^0
New rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, a11^0'=1, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_5_^post18 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0), cost: 4+7*__rho_2_^post37

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=__rho_2_^post37, keA^0'=0, __rho_1_^post50 <= 0, cost: 4
Second rule:
l7 -> l7 : CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, __rho_5_^0'=__rho_5_^post18, k1^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+k1^0 >= 0 /\ __rho_5_^post18 <= 0), cost: 7*k1^0
New rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ __rho_1_^post50 <= 0 /\ __rho_5_^post18 <= 0), cost: 4+7*__rho_2_^post37

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, a11^0'=1, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=__rho_2_^post37, keA^0'=0, -1+__rho_1_^post50 >= 0, cost: 4
Second rule:
l7 -> l7 : CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, __rho_5_^0'=__rho_5_^post18, k1^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+k1^0 >= 0 /\ __rho_5_^post18 <= 0), cost: 7*k1^0
New rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, a11^0'=1, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ __rho_5_^post18 <= 0), cost: 4+7*__rho_2_^post37

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=__rho_2_^post37, keA^0'=0, __rho_1_^post50 <= 0, cost: 4
Second rule:
l7 -> l7 : CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, __rho_5_^0'=__rho_5_^post18, k1^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_5_^post18 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+k1^0 >= 0), cost: 7*k1^0
New rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_5_^post18 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ __rho_1_^post50 <= 0), cost: 4+7*__rho_2_^post37

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, a11^0'=1, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=__rho_2_^post37, keA^0'=0, -1+__rho_1_^post50 >= 0, cost: 4
Second rule:
l7 -> l7 : CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, __rho_5_^0'=__rho_5_^post18, k1^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_5_^post18 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+k1^0 >= 0), cost: 7*k1^0
New rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, a11^0'=1, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_5_^post18 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0), cost: 4+7*__rho_2_^post37

Applied deletion
Removed the following rules: 218 219 220 221

Applied chaining
First rule:
l1 -> l15 : keR^0'=0, i___01313^0'=Irql^0, k4^0'=k4^post48, __rho_11_^0'=k4^post48, i___02020^0'=Irql^0, keA^0'=0, k3^0'=k3^post14, __rho_10_^0'=k3^post14, (k2^0 <= 0 /\ k3^post14 <= 0), cost: 4
Second rule:
l15 -> l15 : a2828^0'=1, b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, ret_ExAllocatePool3030^0'=0, keR^0'=0, ResourceIrp^0'=0, k4^0'=0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=pIrb^post43, keA^0'=0, a3131^0'=ret_IoAllocateIrp2727^post43, b2929^0'=0, ret_IoAllocateIrp2727^0'=0, __rho_99_^0'=0, (-1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ -2+k4^0 >= 0), cost: 2+4*k4^0
New rule:
l1 -> l15 : a2828^0'=1, b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, ret_ExAllocatePool3030^0'=0, keR^0'=0, ResourceIrp^0'=0, i___01313^0'=Irql^0, k4^0'=0, a2525^0'=1, __rho_11_^0'=k4^post48, i___02020^0'=Irql^0, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=pIrb^post43, keA^0'=0, a3131^0'=ret_IoAllocateIrp2727^post43, b2929^0'=0, k3^0'=k3^post14, ret_IoAllocateIrp2727^0'=0, __rho_99_^0'=0, __rho_10_^0'=k3^post14, (k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -2+k4^post48 >= 0), cost: 6+4*k4^post48

Applied chaining
First rule:
l1 -> l15 : keR^0'=0, i___01313^0'=Irql^0, k4^0'=k4^post48, __rho_11_^0'=k4^post48, i___02020^0'=Irql^0, keA^0'=0, k3^0'=k3^post14, __rho_10_^0'=k3^post14, (k2^0 <= 0 /\ k3^post14 <= 0), cost: 4
Second rule:
l15 -> l15 : a2828^0'=1, b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, ret_ExAllocatePool3030^0'=0, keR^0'=0, ResourceIrp^0'=0, k4^0'=0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=pIrb^post43, keA^0'=0, a3131^0'=ret_IoAllocateIrp2727^post43, b2929^0'=0, ret_IoAllocateIrp2727^0'=0, __rho_99_^0'=0, (1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -2+k4^0 >= 0), cost: 2+4*k4^0
New rule:
l1 -> l15 : a2828^0'=1, b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, ret_ExAllocatePool3030^0'=0, keR^0'=0, ResourceIrp^0'=0, i___01313^0'=Irql^0, k4^0'=0, a2525^0'=1, __rho_11_^0'=k4^post48, i___02020^0'=Irql^0, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=pIrb^post43, keA^0'=0, a3131^0'=ret_IoAllocateIrp2727^post43, b2929^0'=0, k3^0'=k3^post14, ret_IoAllocateIrp2727^0'=0, __rho_99_^0'=0, __rho_10_^0'=k3^post14, (k2^0 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -2+k4^post48 >= 0), cost: 6+4*k4^post48

Applied chaining
First rule:
l1 -> l15 : keR^0'=0, i___01313^0'=Irql^0, k4^0'=k4^post48, __rho_11_^0'=k4^post48, i___02020^0'=Irql^0, keA^0'=0, k3^0'=k3^post14, __rho_10_^0'=k3^post14, (k2^0 <= 0 /\ k3^post14 <= 0), cost: 4
Second rule:
l15 -> l15 : a2828^0'=1, b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, ret_ExAllocatePool3030^0'=0, keR^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, k4^0'=0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=0, keA^0'=0, a3131^0'=ret_IoAllocateIrp2727^post43, b2929^0'=0, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, (-1+k4^0 >= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0), cost: 6*k4^0
New rule:
l1 -> l15 : a2828^0'=1, b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, ret_ExAllocatePool3030^0'=0, keR^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, i___01313^0'=Irql^0, k4^0'=0, a2525^0'=1, __rho_11_^0'=k4^post48, i___02020^0'=Irql^0, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=0, keA^0'=0, a3131^0'=ret_IoAllocateIrp2727^post43, b2929^0'=0, k3^0'=k3^post14, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, __rho_10_^0'=k3^post14, (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0), cost: 4+6*k4^post48

Applied chaining
First rule:
l1 -> l15 : keR^0'=0, i___01313^0'=Irql^0, k4^0'=k4^post48, __rho_11_^0'=k4^post48, i___02020^0'=Irql^0, keA^0'=0, k3^0'=k3^post14, __rho_10_^0'=k3^post14, (k2^0 <= 0 /\ k3^post14 <= 0), cost: 4
Second rule:
l15 -> l15 : a2828^0'=1, b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, ret_ExAllocatePool3030^0'=0, keR^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, k4^0'=0, a2525^0'=1, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=0, keA^0'=0, a3131^0'=ret_IoAllocateIrp2727^post43, b2929^0'=0, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, (-1+k4^0 >= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0), cost: 6*k4^0
New rule:
l1 -> l15 : a2828^0'=1, b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, ret_ExAllocatePool3030^0'=0, keR^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, i___01313^0'=Irql^0, k4^0'=0, a2525^0'=1, __rho_11_^0'=k4^post48, i___02020^0'=Irql^0, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=0, keA^0'=0, a3131^0'=ret_IoAllocateIrp2727^post43, b2929^0'=0, k3^0'=k3^post14, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, __rho_10_^0'=k3^post14, (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0), cost: 4+6*k4^post48

Applied deletion
Removed the following rules: 201 203 224 225

Chained accelerated rules with incoming rules
Start location: l34
 138: l1 -> [36] : k2^0 <= 0, cost: NONTERM
 139: l1 -> l15 : keR^0'=0, i___01313^0'=Irql^0, k4^0'=k4^post48, __rho_11_^0'=k4^post48, i___02020^0'=Irql^0, keA^0'=0, k3^0'=k3^post14, __rho_10_^0'=k3^post14, (k2^0 <= 0 /\ k3^post14 <= 0), cost: 4
 179: l1 -> l15 : __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, i___01313^0'=Irql^0, k4^0'=0, __rho_11_^0'=k4^post48, i___02020^0'=Irql^0, IsochResourceData^0'=__rho_12_^post45, keA^0'=0, k3^0'=k3^post14, __rho_10_^0'=k3^post14, (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ k3^post14 <= 0 /\ __rho_12_^post45 <= 0), cost: 4+3*k4^post48
 181: l1 -> l15 : b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, ResourceIrp^0'=0, i___01313^0'=Irql^0, k4^0'=0, a2525^0'=1, __rho_11_^0'=k4^post48, i___02020^0'=Irql^0, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=pIrb^post43, keA^0'=0, k3^0'=k3^post14, ret_IoAllocateIrp2727^0'=0, __rho_99_^0'=0, __rho_10_^0'=k3^post14, (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0), cost: 4+4*k4^post48
 239: l1 -> l15 : a2828^0'=1, b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, ret_ExAllocatePool3030^0'=0, keR^0'=0, ResourceIrp^0'=0, i___01313^0'=Irql^0, k4^0'=0, a2525^0'=1, __rho_11_^0'=k4^post48, i___02020^0'=Irql^0, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=pIrb^post43, keA^0'=0, a3131^0'=ret_IoAllocateIrp2727^post43, b2929^0'=0, k3^0'=k3^post14, ret_IoAllocateIrp2727^0'=0, __rho_99_^0'=0, __rho_10_^0'=k3^post14, (k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -2+k4^post48 >= 0), cost: 6+4*k4^post48
 240: l1 -> l15 : a2828^0'=1, b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, ret_ExAllocatePool3030^0'=0, keR^0'=0, ResourceIrp^0'=0, i___01313^0'=Irql^0, k4^0'=0, a2525^0'=1, __rho_11_^0'=k4^post48, i___02020^0'=Irql^0, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=pIrb^post43, keA^0'=0, a3131^0'=ret_IoAllocateIrp2727^post43, b2929^0'=0, k3^0'=k3^post14, ret_IoAllocateIrp2727^0'=0, __rho_99_^0'=0, __rho_10_^0'=k3^post14, (k2^0 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -2+k4^post48 >= 0), cost: 6+4*k4^post48
 241: l1 -> l15 : a2828^0'=1, b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, ret_ExAllocatePool3030^0'=0, keR^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, i___01313^0'=Irql^0, k4^0'=0, a2525^0'=1, __rho_11_^0'=k4^post48, i___02020^0'=Irql^0, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=0, keA^0'=0, a3131^0'=ret_IoAllocateIrp2727^post43, b2929^0'=0, k3^0'=k3^post14, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, __rho_10_^0'=k3^post14, (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0), cost: 4+6*k4^post48
 242: l1 -> l15 : a2828^0'=1, b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, ret_ExAllocatePool3030^0'=0, keR^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, i___01313^0'=Irql^0, k4^0'=0, a2525^0'=1, __rho_11_^0'=k4^post48, i___02020^0'=Irql^0, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=0, keA^0'=0, a3131^0'=ret_IoAllocateIrp2727^post43, b2929^0'=0, k3^0'=k3^post14, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, __rho_10_^0'=k3^post14, (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0), cost: 4+6*k4^post48
 110: l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=__rho_6_^post25, keR^0'=0, keA^0'=0, i___099^0'=Irql^0, k1^0 <= 0, cost: 2
 226: l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (AsyncAddressData^post11 <= 0 /\ k1^0 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 2+8*__rho_6_^post25
 227: l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+AsyncAddressData^post11 >= 0 /\ k1^0 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 2+8*__rho_6_^post25
 228: l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k1^0 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0), cost: 2+8*__rho_6_^post25
 229: l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ k1^0 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0), cost: 2+8*__rho_6_^post25
 230: l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (AsyncAddressData^post11 <= 0 /\ -1+__rho_7_^post11 >= 0 /\ k1^0 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 2+8*__rho_6_^post25
 182: l15 -> [39] : k4^0 <= 0, cost: NONTERM
 198: l15 -> [35] : (k4^0 <= 0 /\ k5^post44 <= 0), cost: NONTERM
 199: l15 -> [35] : (-1+__rho_56_^post31 >= 0 /\ k4^0 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
 140: l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=__rho_2_^post37, keA^0'=0, __rho_1_^post50 <= 0, cost: 4
 141: l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, a11^0'=1, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=__rho_2_^post37, keA^0'=0, -1+__rho_1_^post50 >= 0, cost: 4
 174: l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, (-1+__rho_2_^post37 >= 0 /\ CromData^post24 <= 0 /\ __rho_1_^post50 <= 0), cost: 4+3*__rho_2_^post37
 175: l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, a11^0'=1, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, (-1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ CromData^post24 <= 0), cost: 4+3*__rho_2_^post37
 231: l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (__rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ __rho_1_^post50 <= 0 /\ __rho_5_^post18 <= 0), cost: 4+7*__rho_2_^post37
 232: l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, a11^0'=1, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_1_^post50 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ __rho_5_^post18 <= 0), cost: 4+7*__rho_2_^post37
 233: l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_5_^post18 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ __rho_1_^post50 <= 0), cost: 4+7*__rho_2_^post37
 234: l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, a11^0'=1, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_5_^post18 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0), cost: 4+7*__rho_2_^post37
 235: l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ __rho_1_^post50 <= 0 /\ __rho_5_^post18 <= 0), cost: 4+7*__rho_2_^post37
 236: l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, a11^0'=1, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ __rho_5_^post18 <= 0), cost: 4+7*__rho_2_^post37
 237: l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_5_^post18 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ __rho_1_^post50 <= 0), cost: 4+7*__rho_2_^post37
 238: l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, a11^0'=1, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_5_^post18 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0), cost: 4+7*__rho_2_^post37


Eliminating location l7 by chaining:

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=__rho_2_^post37, keA^0'=0, __rho_1_^post50 <= 0, cost: 4
Second rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=__rho_6_^post25, keR^0'=0, keA^0'=0, i___099^0'=Irql^0, k1^0 <= 0, cost: 2
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=__rho_6_^post25, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=__rho_2_^post37, keA^0'=0, i___099^0'=Irql^0, (__rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: 6

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=__rho_2_^post37, keA^0'=0, __rho_1_^post50 <= 0, cost: 4
Second rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (AsyncAddressData^post11 <= 0 /\ k1^0 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 2+8*__rho_6_^post25
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=__rho_2_^post37, keA^0'=0, __rho_1_^post50 <= 0, cost: 4
Second rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+AsyncAddressData^post11 >= 0 /\ k1^0 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 2+8*__rho_6_^post25
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+AsyncAddressData^post11 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=__rho_2_^post37, keA^0'=0, __rho_1_^post50 <= 0, cost: 4
Second rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k1^0 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0), cost: 2+8*__rho_6_^post25
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=__rho_2_^post37, keA^0'=0, __rho_1_^post50 <= 0, cost: 4
Second rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ k1^0 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0), cost: 2+8*__rho_6_^post25
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=__rho_2_^post37, keA^0'=0, __rho_1_^post50 <= 0, cost: 4
Second rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (AsyncAddressData^post11 <= 0 /\ -1+__rho_7_^post11 >= 0 /\ k1^0 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 2+8*__rho_6_^post25
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (AsyncAddressData^post11 <= 0 /\ -1+__rho_7_^post11 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, a11^0'=1, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=__rho_2_^post37, keA^0'=0, -1+__rho_1_^post50 >= 0, cost: 4
Second rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=__rho_6_^post25, keR^0'=0, keA^0'=0, i___099^0'=Irql^0, k1^0 <= 0, cost: 2
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, k2^0'=__rho_6_^post25, a11^0'=1, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=__rho_2_^post37, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_1_^post50 >= 0 /\ __rho_2_^post37 <= 0), cost: 6

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, a11^0'=1, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=__rho_2_^post37, keA^0'=0, -1+__rho_1_^post50 >= 0, cost: 4
Second rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (AsyncAddressData^post11 <= 0 /\ k1^0 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 2+8*__rho_6_^post25
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0), cost: 6+8*__rho_6_^post25

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, a11^0'=1, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=__rho_2_^post37, keA^0'=0, -1+__rho_1_^post50 >= 0, cost: 4
Second rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+AsyncAddressData^post11 >= 0 /\ k1^0 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 2+8*__rho_6_^post25
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_1_^post50 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0), cost: 6+8*__rho_6_^post25

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, a11^0'=1, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=__rho_2_^post37, keA^0'=0, -1+__rho_1_^post50 >= 0, cost: 4
Second rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k1^0 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0), cost: 2+8*__rho_6_^post25
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_1_^post50 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0), cost: 6+8*__rho_6_^post25

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, a11^0'=1, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=__rho_2_^post37, keA^0'=0, -1+__rho_1_^post50 >= 0, cost: 4
Second rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ k1^0 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0), cost: 2+8*__rho_6_^post25
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_1_^post50 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0), cost: 6+8*__rho_6_^post25

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, a11^0'=1, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=__rho_2_^post37, keA^0'=0, -1+__rho_1_^post50 >= 0, cost: 4
Second rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (AsyncAddressData^post11 <= 0 /\ -1+__rho_7_^post11 >= 0 /\ k1^0 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 2+8*__rho_6_^post25
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_7_^post11 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0), cost: 6+8*__rho_6_^post25

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, (-1+__rho_2_^post37 >= 0 /\ CromData^post24 <= 0 /\ __rho_1_^post50 <= 0), cost: 4+3*__rho_2_^post37
Second rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=__rho_6_^post25, keR^0'=0, keA^0'=0, i___099^0'=Irql^0, k1^0 <= 0, cost: 2
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, k2^0'=__rho_6_^post25, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ CromData^post24 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+3*__rho_2_^post37

Applied simplification
Original rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, k2^0'=__rho_6_^post25, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ CromData^post24 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+3*__rho_2_^post37
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, k2^0'=__rho_6_^post25, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_2_^post37 >= 0 /\ CromData^post24 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+3*__rho_2_^post37

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, (-1+__rho_2_^post37 >= 0 /\ CromData^post24 <= 0 /\ __rho_1_^post50 <= 0), cost: 4+3*__rho_2_^post37
Second rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (AsyncAddressData^post11 <= 0 /\ k1^0 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 2+8*__rho_6_^post25
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+3*__rho_2_^post37

Applied simplification
Original rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+3*__rho_2_^post37
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+3*__rho_2_^post37

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, (-1+__rho_2_^post37 >= 0 /\ CromData^post24 <= 0 /\ __rho_1_^post50 <= 0), cost: 4+3*__rho_2_^post37
Second rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+AsyncAddressData^post11 >= 0 /\ k1^0 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 2+8*__rho_6_^post25
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ CromData^post24 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+3*__rho_2_^post37

Applied simplification
Original rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ CromData^post24 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+3*__rho_2_^post37
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_2_^post37 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ CromData^post24 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+3*__rho_2_^post37

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, (-1+__rho_2_^post37 >= 0 /\ CromData^post24 <= 0 /\ __rho_1_^post50 <= 0), cost: 4+3*__rho_2_^post37
Second rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k1^0 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0), cost: 2+8*__rho_6_^post25
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+3*__rho_2_^post37

Applied simplification
Original rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+3*__rho_2_^post37
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+3*__rho_2_^post37

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, (-1+__rho_2_^post37 >= 0 /\ CromData^post24 <= 0 /\ __rho_1_^post50 <= 0), cost: 4+3*__rho_2_^post37
Second rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ k1^0 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0), cost: 2+8*__rho_6_^post25
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ CromData^post24 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+3*__rho_2_^post37

Applied simplification
Original rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ CromData^post24 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+3*__rho_2_^post37
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ CromData^post24 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+3*__rho_2_^post37

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, (-1+__rho_2_^post37 >= 0 /\ CromData^post24 <= 0 /\ __rho_1_^post50 <= 0), cost: 4+3*__rho_2_^post37
Second rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (AsyncAddressData^post11 <= 0 /\ -1+__rho_7_^post11 >= 0 /\ k1^0 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 2+8*__rho_6_^post25
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_7_^post11 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+3*__rho_2_^post37

Applied simplification
Original rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_7_^post11 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+3*__rho_2_^post37
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_7_^post11 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+3*__rho_2_^post37

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, a11^0'=1, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, (-1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ CromData^post24 <= 0), cost: 4+3*__rho_2_^post37
Second rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=__rho_6_^post25, keR^0'=0, keA^0'=0, i___099^0'=Irql^0, k1^0 <= 0, cost: 2
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, k2^0'=__rho_6_^post25, a11^0'=1, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ CromData^post24 <= 0), cost: 6+3*__rho_2_^post37

Applied simplification
Original rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, k2^0'=__rho_6_^post25, a11^0'=1, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ CromData^post24 <= 0), cost: 6+3*__rho_2_^post37
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, k2^0'=__rho_6_^post25, a11^0'=1, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ CromData^post24 <= 0), cost: 6+3*__rho_2_^post37

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, a11^0'=1, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, (-1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ CromData^post24 <= 0), cost: 4+3*__rho_2_^post37
Second rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (AsyncAddressData^post11 <= 0 /\ k1^0 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 2+8*__rho_6_^post25
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 6+8*__rho_6_^post25+3*__rho_2_^post37

Applied simplification
Original rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 6+8*__rho_6_^post25+3*__rho_2_^post37
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 6+8*__rho_6_^post25+3*__rho_2_^post37

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, a11^0'=1, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, (-1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ CromData^post24 <= 0), cost: 4+3*__rho_2_^post37
Second rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+AsyncAddressData^post11 >= 0 /\ k1^0 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 2+8*__rho_6_^post25
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ CromData^post24 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 6+8*__rho_6_^post25+3*__rho_2_^post37

Applied simplification
Original rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ CromData^post24 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 6+8*__rho_6_^post25+3*__rho_2_^post37
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ CromData^post24 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 6+8*__rho_6_^post25+3*__rho_2_^post37

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, a11^0'=1, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, (-1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ CromData^post24 <= 0), cost: 4+3*__rho_2_^post37
Second rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k1^0 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0), cost: 2+8*__rho_6_^post25
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0), cost: 6+8*__rho_6_^post25+3*__rho_2_^post37

Applied simplification
Original rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0), cost: 6+8*__rho_6_^post25+3*__rho_2_^post37
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_1_^post50 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0), cost: 6+8*__rho_6_^post25+3*__rho_2_^post37

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, a11^0'=1, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, (-1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ CromData^post24 <= 0), cost: 4+3*__rho_2_^post37
Second rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ k1^0 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0), cost: 2+8*__rho_6_^post25
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ CromData^post24 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0), cost: 6+8*__rho_6_^post25+3*__rho_2_^post37

Applied simplification
Original rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ CromData^post24 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0), cost: 6+8*__rho_6_^post25+3*__rho_2_^post37
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_1_^post50 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ CromData^post24 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0), cost: 6+8*__rho_6_^post25+3*__rho_2_^post37

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, a11^0'=1, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, (-1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ CromData^post24 <= 0), cost: 4+3*__rho_2_^post37
Second rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (AsyncAddressData^post11 <= 0 /\ -1+__rho_7_^post11 >= 0 /\ k1^0 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 2+8*__rho_6_^post25
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_7_^post11 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 6+8*__rho_6_^post25+3*__rho_2_^post37

Applied simplification
Original rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_7_^post11 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 6+8*__rho_6_^post25+3*__rho_2_^post37
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_7_^post11 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 6+8*__rho_6_^post25+3*__rho_2_^post37

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (__rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ __rho_1_^post50 <= 0 /\ __rho_5_^post18 <= 0), cost: 4+7*__rho_2_^post37
Second rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=__rho_6_^post25, keR^0'=0, keA^0'=0, i___099^0'=Irql^0, k1^0 <= 0, cost: 2
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=__rho_6_^post25, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ __rho_1_^post50 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+7*__rho_2_^post37

Applied simplification
Original rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=__rho_6_^post25, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ __rho_1_^post50 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+7*__rho_2_^post37
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=__rho_6_^post25, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (__rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ __rho_1_^post50 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+7*__rho_2_^post37

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (__rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ __rho_1_^post50 <= 0 /\ __rho_5_^post18 <= 0), cost: 4+7*__rho_2_^post37
Second rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (AsyncAddressData^post11 <= 0 /\ k1^0 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 2+8*__rho_6_^post25
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied simplification
Original rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (__rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (__rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ __rho_1_^post50 <= 0 /\ __rho_5_^post18 <= 0), cost: 4+7*__rho_2_^post37
Second rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+AsyncAddressData^post11 >= 0 /\ k1^0 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 2+8*__rho_6_^post25
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied simplification
Original rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (__rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (__rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ __rho_1_^post50 <= 0 /\ __rho_5_^post18 <= 0), cost: 4+7*__rho_2_^post37
Second rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k1^0 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0), cost: 2+8*__rho_6_^post25
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_8_^post7 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied simplification
Original rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_8_^post7 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (__rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ __rho_1_^post50 <= 0 /\ __rho_5_^post18 <= 0), cost: 4+7*__rho_2_^post37
Second rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ k1^0 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0), cost: 2+8*__rho_6_^post25
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_8_^post7 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied simplification
Original rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_8_^post7 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (__rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ __rho_1_^post50 <= 0 /\ __rho_5_^post18 <= 0), cost: 4+7*__rho_2_^post37
Second rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (AsyncAddressData^post11 <= 0 /\ -1+__rho_7_^post11 >= 0 /\ k1^0 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 2+8*__rho_6_^post25
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_7_^post11 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied simplification
Original rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_7_^post11 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (__rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_7_^post11 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, a11^0'=1, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_1_^post50 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ __rho_5_^post18 <= 0), cost: 4+7*__rho_2_^post37
Second rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=__rho_6_^post25, keR^0'=0, keA^0'=0, i___099^0'=Irql^0, k1^0 <= 0, cost: 2
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=__rho_6_^post25, a11^0'=1, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_1_^post50 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ __rho_5_^post18 <= 0), cost: 6+7*__rho_2_^post37

Applied simplification
Original rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=__rho_6_^post25, a11^0'=1, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_1_^post50 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ __rho_5_^post18 <= 0), cost: 6+7*__rho_2_^post37
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=__rho_6_^post25, a11^0'=1, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_1_^post50 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ __rho_5_^post18 <= 0), cost: 6+7*__rho_2_^post37

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, a11^0'=1, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_1_^post50 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ __rho_5_^post18 <= 0), cost: 4+7*__rho_2_^post37
Second rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (AsyncAddressData^post11 <= 0 /\ k1^0 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 2+8*__rho_6_^post25
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_1_^post50 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied simplification
Original rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_1_^post50 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_1_^post50 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, a11^0'=1, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_1_^post50 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ __rho_5_^post18 <= 0), cost: 4+7*__rho_2_^post37
Second rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+AsyncAddressData^post11 >= 0 /\ k1^0 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 2+8*__rho_6_^post25
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_1_^post50 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied simplification
Original rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_1_^post50 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_1_^post50 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, a11^0'=1, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_1_^post50 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ __rho_5_^post18 <= 0), cost: 4+7*__rho_2_^post37
Second rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k1^0 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0), cost: 2+8*__rho_6_^post25
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied simplification
Original rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_1_^post50 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, a11^0'=1, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_1_^post50 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ __rho_5_^post18 <= 0), cost: 4+7*__rho_2_^post37
Second rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ k1^0 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0), cost: 2+8*__rho_6_^post25
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied simplification
Original rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_1_^post50 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, a11^0'=1, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_1_^post50 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ __rho_5_^post18 <= 0), cost: 4+7*__rho_2_^post37
Second rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (AsyncAddressData^post11 <= 0 /\ -1+__rho_7_^post11 >= 0 /\ k1^0 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 2+8*__rho_6_^post25
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_1_^post50 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_7_^post11 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied simplification
Original rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_1_^post50 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_7_^post11 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_1_^post50 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_7_^post11 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_5_^post18 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ __rho_1_^post50 <= 0), cost: 4+7*__rho_2_^post37
Second rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=__rho_6_^post25, keR^0'=0, keA^0'=0, i___099^0'=Irql^0, k1^0 <= 0, cost: 2
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=__rho_6_^post25, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_5_^post18 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ __rho_1_^post50 <= 0), cost: 6+7*__rho_2_^post37

Applied simplification
Original rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=__rho_6_^post25, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_5_^post18 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ __rho_1_^post50 <= 0), cost: 6+7*__rho_2_^post37
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=__rho_6_^post25, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_5_^post18 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ __rho_1_^post50 <= 0), cost: 6+7*__rho_2_^post37

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_5_^post18 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ __rho_1_^post50 <= 0), cost: 4+7*__rho_2_^post37
Second rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (AsyncAddressData^post11 <= 0 /\ k1^0 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 2+8*__rho_6_^post25
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_5_^post18 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied simplification
Original rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_5_^post18 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_5_^post18 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_5_^post18 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ __rho_1_^post50 <= 0), cost: 4+7*__rho_2_^post37
Second rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+AsyncAddressData^post11 >= 0 /\ k1^0 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 2+8*__rho_6_^post25
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_5_^post18 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied simplification
Original rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_5_^post18 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_5_^post18 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_5_^post18 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ __rho_1_^post50 <= 0), cost: 4+7*__rho_2_^post37
Second rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k1^0 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0), cost: 2+8*__rho_6_^post25
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_5_^post18 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied simplification
Original rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_5_^post18 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_5_^post18 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_5_^post18 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ __rho_1_^post50 <= 0), cost: 4+7*__rho_2_^post37
Second rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ k1^0 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0), cost: 2+8*__rho_6_^post25
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_5_^post18 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied simplification
Original rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_5_^post18 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_5_^post18 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_5_^post18 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ __rho_1_^post50 <= 0), cost: 4+7*__rho_2_^post37
Second rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (AsyncAddressData^post11 <= 0 /\ -1+__rho_7_^post11 >= 0 /\ k1^0 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 2+8*__rho_6_^post25
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_5_^post18 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_7_^post11 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied simplification
Original rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_5_^post18 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_7_^post11 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_5_^post18 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_7_^post11 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, a11^0'=1, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_5_^post18 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0), cost: 4+7*__rho_2_^post37
Second rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=__rho_6_^post25, keR^0'=0, keA^0'=0, i___099^0'=Irql^0, k1^0 <= 0, cost: 2
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=__rho_6_^post25, a11^0'=1, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_5_^post18 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0), cost: 6+7*__rho_2_^post37

Applied simplification
Original rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=__rho_6_^post25, a11^0'=1, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_5_^post18 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0), cost: 6+7*__rho_2_^post37
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=__rho_6_^post25, a11^0'=1, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_5_^post18 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0), cost: 6+7*__rho_2_^post37

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, a11^0'=1, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_5_^post18 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0), cost: 4+7*__rho_2_^post37
Second rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (AsyncAddressData^post11 <= 0 /\ k1^0 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 2+8*__rho_6_^post25
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_5_^post18 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied simplification
Original rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_5_^post18 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_5_^post18 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, a11^0'=1, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_5_^post18 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0), cost: 4+7*__rho_2_^post37
Second rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+AsyncAddressData^post11 >= 0 /\ k1^0 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 2+8*__rho_6_^post25
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_5_^post18 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied simplification
Original rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_5_^post18 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_5_^post18 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, a11^0'=1, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_5_^post18 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0), cost: 4+7*__rho_2_^post37
Second rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k1^0 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0), cost: 2+8*__rho_6_^post25
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_5_^post18 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied simplification
Original rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_5_^post18 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_5_^post18 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, a11^0'=1, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_5_^post18 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0), cost: 4+7*__rho_2_^post37
Second rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ k1^0 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0), cost: 2+8*__rho_6_^post25
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_5_^post18 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied simplification
Original rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_5_^post18 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_5_^post18 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, a11^0'=1, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_5_^post18 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0), cost: 4+7*__rho_2_^post37
Second rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (AsyncAddressData^post11 <= 0 /\ -1+__rho_7_^post11 >= 0 /\ k1^0 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 2+8*__rho_6_^post25
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_5_^post18 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_7_^post11 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied simplification
Original rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_5_^post18 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_7_^post11 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_5_^post18 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_7_^post11 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ __rho_1_^post50 <= 0 /\ __rho_5_^post18 <= 0), cost: 4+7*__rho_2_^post37
Second rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=__rho_6_^post25, keR^0'=0, keA^0'=0, i___099^0'=Irql^0, k1^0 <= 0, cost: 2
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=__rho_6_^post25, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ __rho_1_^post50 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+7*__rho_2_^post37

Applied simplification
Original rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=__rho_6_^post25, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ __rho_1_^post50 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+7*__rho_2_^post37
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=__rho_6_^post25, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ __rho_1_^post50 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+7*__rho_2_^post37

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ __rho_1_^post50 <= 0 /\ __rho_5_^post18 <= 0), cost: 4+7*__rho_2_^post37
Second rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (AsyncAddressData^post11 <= 0 /\ k1^0 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 2+8*__rho_6_^post25
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied simplification
Original rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ __rho_1_^post50 <= 0 /\ __rho_5_^post18 <= 0), cost: 4+7*__rho_2_^post37
Second rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+AsyncAddressData^post11 >= 0 /\ k1^0 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 2+8*__rho_6_^post25
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied simplification
Original rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ __rho_1_^post50 <= 0 /\ __rho_5_^post18 <= 0), cost: 4+7*__rho_2_^post37
Second rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k1^0 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0), cost: 2+8*__rho_6_^post25
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied simplification
Original rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ __rho_1_^post50 <= 0 /\ __rho_5_^post18 <= 0), cost: 4+7*__rho_2_^post37
Second rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ k1^0 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0), cost: 2+8*__rho_6_^post25
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied simplification
Original rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ __rho_1_^post50 <= 0 /\ __rho_5_^post18 <= 0), cost: 4+7*__rho_2_^post37
Second rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (AsyncAddressData^post11 <= 0 /\ -1+__rho_7_^post11 >= 0 /\ k1^0 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 2+8*__rho_6_^post25
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_7_^post11 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied simplification
Original rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_7_^post11 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_7_^post11 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, a11^0'=1, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ __rho_5_^post18 <= 0), cost: 4+7*__rho_2_^post37
Second rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=__rho_6_^post25, keR^0'=0, keA^0'=0, i___099^0'=Irql^0, k1^0 <= 0, cost: 2
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=__rho_6_^post25, a11^0'=1, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ __rho_5_^post18 <= 0), cost: 6+7*__rho_2_^post37

Applied simplification
Original rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=__rho_6_^post25, a11^0'=1, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ __rho_5_^post18 <= 0), cost: 6+7*__rho_2_^post37
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=__rho_6_^post25, a11^0'=1, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ __rho_5_^post18 <= 0), cost: 6+7*__rho_2_^post37

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, a11^0'=1, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ __rho_5_^post18 <= 0), cost: 4+7*__rho_2_^post37
Second rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (AsyncAddressData^post11 <= 0 /\ k1^0 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 2+8*__rho_6_^post25
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied simplification
Original rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, a11^0'=1, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ __rho_5_^post18 <= 0), cost: 4+7*__rho_2_^post37
Second rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+AsyncAddressData^post11 >= 0 /\ k1^0 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 2+8*__rho_6_^post25
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied simplification
Original rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, a11^0'=1, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ __rho_5_^post18 <= 0), cost: 4+7*__rho_2_^post37
Second rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k1^0 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0), cost: 2+8*__rho_6_^post25
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied simplification
Original rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_1_^post50 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, a11^0'=1, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ __rho_5_^post18 <= 0), cost: 4+7*__rho_2_^post37
Second rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ k1^0 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0), cost: 2+8*__rho_6_^post25
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied simplification
Original rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_1_^post50 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, a11^0'=1, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ __rho_5_^post18 <= 0), cost: 4+7*__rho_2_^post37
Second rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (AsyncAddressData^post11 <= 0 /\ -1+__rho_7_^post11 >= 0 /\ k1^0 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 2+8*__rho_6_^post25
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_7_^post11 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied simplification
Original rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_7_^post11 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_7_^post11 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_5_^post18 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ __rho_1_^post50 <= 0), cost: 4+7*__rho_2_^post37
Second rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=__rho_6_^post25, keR^0'=0, keA^0'=0, i___099^0'=Irql^0, k1^0 <= 0, cost: 2
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=__rho_6_^post25, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_5_^post18 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ __rho_1_^post50 <= 0), cost: 6+7*__rho_2_^post37

Applied simplification
Original rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=__rho_6_^post25, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_5_^post18 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ __rho_1_^post50 <= 0), cost: 6+7*__rho_2_^post37
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=__rho_6_^post25, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_5_^post18 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ __rho_1_^post50 <= 0), cost: 6+7*__rho_2_^post37

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_5_^post18 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ __rho_1_^post50 <= 0), cost: 4+7*__rho_2_^post37
Second rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (AsyncAddressData^post11 <= 0 /\ k1^0 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 2+8*__rho_6_^post25
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_5_^post18 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied simplification
Original rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_5_^post18 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_5_^post18 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_5_^post18 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ __rho_1_^post50 <= 0), cost: 4+7*__rho_2_^post37
Second rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+AsyncAddressData^post11 >= 0 /\ k1^0 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 2+8*__rho_6_^post25
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_5_^post18 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied simplification
Original rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_5_^post18 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_5_^post18 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_5_^post18 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ __rho_1_^post50 <= 0), cost: 4+7*__rho_2_^post37
Second rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k1^0 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0), cost: 2+8*__rho_6_^post25
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_5_^post18 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied simplification
Original rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_5_^post18 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_5_^post18 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_5_^post18 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ __rho_1_^post50 <= 0), cost: 4+7*__rho_2_^post37
Second rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ k1^0 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0), cost: 2+8*__rho_6_^post25
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_5_^post18 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied simplification
Original rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_5_^post18 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_5_^post18 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_5_^post18 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ __rho_1_^post50 <= 0), cost: 4+7*__rho_2_^post37
Second rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (AsyncAddressData^post11 <= 0 /\ -1+__rho_7_^post11 >= 0 /\ k1^0 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 2+8*__rho_6_^post25
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_5_^post18 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_7_^post11 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied simplification
Original rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_5_^post18 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_7_^post11 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_5_^post18 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_7_^post11 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, a11^0'=1, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_5_^post18 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0), cost: 4+7*__rho_2_^post37
Second rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=__rho_6_^post25, keR^0'=0, keA^0'=0, i___099^0'=Irql^0, k1^0 <= 0, cost: 2
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=__rho_6_^post25, a11^0'=1, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_5_^post18 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0), cost: 6+7*__rho_2_^post37

Applied simplification
Original rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=__rho_6_^post25, a11^0'=1, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_5_^post18 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0), cost: 6+7*__rho_2_^post37
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=__rho_6_^post25, a11^0'=1, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_5_^post18 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0), cost: 6+7*__rho_2_^post37

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, a11^0'=1, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_5_^post18 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0), cost: 4+7*__rho_2_^post37
Second rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (AsyncAddressData^post11 <= 0 /\ k1^0 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 2+8*__rho_6_^post25
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_5_^post18 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied simplification
Original rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_5_^post18 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_5_^post18 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, a11^0'=1, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_5_^post18 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0), cost: 4+7*__rho_2_^post37
Second rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+AsyncAddressData^post11 >= 0 /\ k1^0 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 2+8*__rho_6_^post25
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_5_^post18 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied simplification
Original rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_5_^post18 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_5_^post18 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, a11^0'=1, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_5_^post18 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0), cost: 4+7*__rho_2_^post37
Second rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k1^0 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0), cost: 2+8*__rho_6_^post25
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_5_^post18 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied simplification
Original rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_5_^post18 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_5_^post18 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, a11^0'=1, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_5_^post18 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0), cost: 4+7*__rho_2_^post37
Second rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ k1^0 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0), cost: 2+8*__rho_6_^post25
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_5_^post18 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied simplification
Original rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_5_^post18 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_5_^post18 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied chaining
First rule:
l34 -> l7 : ntStatus^0'=0, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, a11^0'=1, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, (-1+__rho_5_^post18 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0), cost: 4+7*__rho_2_^post37
Second rule:
l7 -> l1 : __rho_6_^0'=__rho_6_^post25, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (AsyncAddressData^post11 <= 0 /\ -1+__rho_7_^post11 >= 0 /\ k1^0 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 2+8*__rho_6_^post25
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_5_^post18 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_7_^post11 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied simplification
Original rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (0 <= 0 /\ -1+__rho_5_^post18 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_7_^post11 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
New rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_5_^post18 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_7_^post11 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37

Applied deletion
Removed the following rules: 110 140 141 174 175 226 227 228 229 230 231 232 233 234 235 236 237 238

Eliminating location l15 by chaining:

Applied chaining
First rule:
l1 -> l15 : keR^0'=0, i___01313^0'=Irql^0, k4^0'=k4^post48, __rho_11_^0'=k4^post48, i___02020^0'=Irql^0, keA^0'=0, k3^0'=k3^post14, __rho_10_^0'=k3^post14, (k2^0 <= 0 /\ k3^post14 <= 0), cost: 4
Second rule:
l15 -> [39] : k4^0 <= 0, cost: NONTERM
New rule:
l1 -> [39] : (k2^0 <= 0 /\ k3^post14 <= 0 /\ k4^post48 <= 0), cost: NONTERM

Applied chaining
First rule:
l1 -> l15 : keR^0'=0, i___01313^0'=Irql^0, k4^0'=k4^post48, __rho_11_^0'=k4^post48, i___02020^0'=Irql^0, keA^0'=0, k3^0'=k3^post14, __rho_10_^0'=k3^post14, (k2^0 <= 0 /\ k3^post14 <= 0), cost: 4
Second rule:
l15 -> [35] : (k4^0 <= 0 /\ k5^post44 <= 0), cost: NONTERM
New rule:
l1 -> [35] : (k2^0 <= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ k4^post48 <= 0), cost: NONTERM

Applied chaining
First rule:
l1 -> l15 : keR^0'=0, i___01313^0'=Irql^0, k4^0'=k4^post48, __rho_11_^0'=k4^post48, i___02020^0'=Irql^0, keA^0'=0, k3^0'=k3^post14, __rho_10_^0'=k3^post14, (k2^0 <= 0 /\ k3^post14 <= 0), cost: 4
Second rule:
l15 -> [35] : (-1+__rho_56_^post31 >= 0 /\ k4^0 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
New rule:
l1 -> [35] : (-1+__rho_56_^post31 >= 0 /\ k2^0 <= 0 /\ k3^post14 <= 0 /\ -1+k5^post44 >= 0 /\ k4^post48 <= 0), cost: NONTERM

Applied chaining
First rule:
l1 -> l15 : __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, i___01313^0'=Irql^0, k4^0'=0, __rho_11_^0'=k4^post48, i___02020^0'=Irql^0, IsochResourceData^0'=__rho_12_^post45, keA^0'=0, k3^0'=k3^post14, __rho_10_^0'=k3^post14, (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ k3^post14 <= 0 /\ __rho_12_^post45 <= 0), cost: 4+3*k4^post48
Second rule:
l15 -> [39] : k4^0 <= 0, cost: NONTERM
New rule:
l1 -> [39] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ k2^0 <= 0 /\ k3^post14 <= 0 /\ __rho_12_^post45 <= 0), cost: NONTERM

Applied simplification
Original rule:
l1 -> [39] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ k2^0 <= 0 /\ k3^post14 <= 0 /\ __rho_12_^post45 <= 0), cost: NONTERM
New rule:
l1 -> [39] : (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ k3^post14 <= 0 /\ __rho_12_^post45 <= 0), cost: NONTERM

Applied chaining
First rule:
l1 -> l15 : __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, i___01313^0'=Irql^0, k4^0'=0, __rho_11_^0'=k4^post48, i___02020^0'=Irql^0, IsochResourceData^0'=__rho_12_^post45, keA^0'=0, k3^0'=k3^post14, __rho_10_^0'=k3^post14, (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ k3^post14 <= 0 /\ __rho_12_^post45 <= 0), cost: 4+3*k4^post48
Second rule:
l15 -> [35] : (k4^0 <= 0 /\ k5^post44 <= 0), cost: NONTERM
New rule:
l1 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ k2^0 <= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ __rho_12_^post45 <= 0), cost: NONTERM

Applied simplification
Original rule:
l1 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ k2^0 <= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ __rho_12_^post45 <= 0), cost: NONTERM
New rule:
l1 -> [35] : (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ __rho_12_^post45 <= 0), cost: NONTERM

Applied chaining
First rule:
l1 -> l15 : __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, i___01313^0'=Irql^0, k4^0'=0, __rho_11_^0'=k4^post48, i___02020^0'=Irql^0, IsochResourceData^0'=__rho_12_^post45, keA^0'=0, k3^0'=k3^post14, __rho_10_^0'=k3^post14, (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ k3^post14 <= 0 /\ __rho_12_^post45 <= 0), cost: 4+3*k4^post48
Second rule:
l15 -> [35] : (-1+__rho_56_^post31 >= 0 /\ k4^0 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
New rule:
l1 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ k2^0 <= 0 /\ k3^post14 <= 0 /\ __rho_12_^post45 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM

Applied simplification
Original rule:
l1 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ k2^0 <= 0 /\ k3^post14 <= 0 /\ __rho_12_^post45 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
New rule:
l1 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ k2^0 <= 0 /\ k3^post14 <= 0 /\ __rho_12_^post45 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM

Applied chaining
First rule:
l1 -> l15 : b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, ResourceIrp^0'=0, i___01313^0'=Irql^0, k4^0'=0, a2525^0'=1, __rho_11_^0'=k4^post48, i___02020^0'=Irql^0, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=pIrb^post43, keA^0'=0, k3^0'=k3^post14, ret_IoAllocateIrp2727^0'=0, __rho_99_^0'=0, __rho_10_^0'=k3^post14, (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0), cost: 4+4*k4^post48
Second rule:
l15 -> [39] : k4^0 <= 0, cost: NONTERM
New rule:
l1 -> [39] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0), cost: NONTERM

Applied simplification
Original rule:
l1 -> [39] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0), cost: NONTERM
New rule:
l1 -> [39] : (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0), cost: NONTERM

Applied chaining
First rule:
l1 -> l15 : b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, ResourceIrp^0'=0, i___01313^0'=Irql^0, k4^0'=0, a2525^0'=1, __rho_11_^0'=k4^post48, i___02020^0'=Irql^0, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=pIrb^post43, keA^0'=0, k3^0'=k3^post14, ret_IoAllocateIrp2727^0'=0, __rho_99_^0'=0, __rho_10_^0'=k3^post14, (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0), cost: 4+4*k4^post48
Second rule:
l15 -> [35] : (k4^0 <= 0 /\ k5^post44 <= 0), cost: NONTERM
New rule:
l1 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0), cost: NONTERM

Applied simplification
Original rule:
l1 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0), cost: NONTERM
New rule:
l1 -> [35] : (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0), cost: NONTERM

Applied chaining
First rule:
l1 -> l15 : b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, keR^0'=0, ResourceIrp^0'=0, i___01313^0'=Irql^0, k4^0'=0, a2525^0'=1, __rho_11_^0'=k4^post48, i___02020^0'=Irql^0, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=pIrb^post43, keA^0'=0, k3^0'=k3^post14, ret_IoAllocateIrp2727^0'=0, __rho_99_^0'=0, __rho_10_^0'=k3^post14, (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0), cost: 4+4*k4^post48
Second rule:
l15 -> [35] : (-1+__rho_56_^post31 >= 0 /\ k4^0 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
New rule:
l1 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM

Applied simplification
Original rule:
l1 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
New rule:
l1 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM

Applied chaining
First rule:
l1 -> l15 : a2828^0'=1, b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, ret_ExAllocatePool3030^0'=0, keR^0'=0, ResourceIrp^0'=0, i___01313^0'=Irql^0, k4^0'=0, a2525^0'=1, __rho_11_^0'=k4^post48, i___02020^0'=Irql^0, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=pIrb^post43, keA^0'=0, a3131^0'=ret_IoAllocateIrp2727^post43, b2929^0'=0, k3^0'=k3^post14, ret_IoAllocateIrp2727^0'=0, __rho_99_^0'=0, __rho_10_^0'=k3^post14, (k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -2+k4^post48 >= 0), cost: 6+4*k4^post48
Second rule:
l15 -> [39] : k4^0 <= 0, cost: NONTERM
New rule:
l1 -> [39] : (0 <= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM

Applied simplification
Original rule:
l1 -> [39] : (0 <= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
New rule:
l1 -> [39] : (k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM

Applied chaining
First rule:
l1 -> l15 : a2828^0'=1, b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, ret_ExAllocatePool3030^0'=0, keR^0'=0, ResourceIrp^0'=0, i___01313^0'=Irql^0, k4^0'=0, a2525^0'=1, __rho_11_^0'=k4^post48, i___02020^0'=Irql^0, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=pIrb^post43, keA^0'=0, a3131^0'=ret_IoAllocateIrp2727^post43, b2929^0'=0, k3^0'=k3^post14, ret_IoAllocateIrp2727^0'=0, __rho_99_^0'=0, __rho_10_^0'=k3^post14, (k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -2+k4^post48 >= 0), cost: 6+4*k4^post48
Second rule:
l15 -> [35] : (k4^0 <= 0 /\ k5^post44 <= 0), cost: NONTERM
New rule:
l1 -> [35] : (0 <= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM

Applied simplification
Original rule:
l1 -> [35] : (0 <= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
New rule:
l1 -> [35] : (k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM

Applied chaining
First rule:
l1 -> l15 : a2828^0'=1, b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, ret_ExAllocatePool3030^0'=0, keR^0'=0, ResourceIrp^0'=0, i___01313^0'=Irql^0, k4^0'=0, a2525^0'=1, __rho_11_^0'=k4^post48, i___02020^0'=Irql^0, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=pIrb^post43, keA^0'=0, a3131^0'=ret_IoAllocateIrp2727^post43, b2929^0'=0, k3^0'=k3^post14, ret_IoAllocateIrp2727^0'=0, __rho_99_^0'=0, __rho_10_^0'=k3^post14, (k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -2+k4^post48 >= 0), cost: 6+4*k4^post48
Second rule:
l15 -> [35] : (-1+__rho_56_^post31 >= 0 /\ k4^0 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
New rule:
l1 -> [35] : (0 <= 0 /\ -1+__rho_56_^post31 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+k5^post44 >= 0 /\ -2+k4^post48 >= 0), cost: NONTERM

Applied simplification
Original rule:
l1 -> [35] : (0 <= 0 /\ -1+__rho_56_^post31 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+k5^post44 >= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
New rule:
l1 -> [35] : (-1+__rho_56_^post31 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+k5^post44 >= 0 /\ -2+k4^post48 >= 0), cost: NONTERM

Applied chaining
First rule:
l1 -> l15 : a2828^0'=1, b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, ret_ExAllocatePool3030^0'=0, keR^0'=0, ResourceIrp^0'=0, i___01313^0'=Irql^0, k4^0'=0, a2525^0'=1, __rho_11_^0'=k4^post48, i___02020^0'=Irql^0, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=pIrb^post43, keA^0'=0, a3131^0'=ret_IoAllocateIrp2727^post43, b2929^0'=0, k3^0'=k3^post14, ret_IoAllocateIrp2727^0'=0, __rho_99_^0'=0, __rho_10_^0'=k3^post14, (k2^0 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -2+k4^post48 >= 0), cost: 6+4*k4^post48
Second rule:
l15 -> [39] : k4^0 <= 0, cost: NONTERM
New rule:
l1 -> [39] : (0 <= 0 /\ k2^0 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM

Applied simplification
Original rule:
l1 -> [39] : (0 <= 0 /\ k2^0 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
New rule:
l1 -> [39] : (k2^0 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM

Applied chaining
First rule:
l1 -> l15 : a2828^0'=1, b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, ret_ExAllocatePool3030^0'=0, keR^0'=0, ResourceIrp^0'=0, i___01313^0'=Irql^0, k4^0'=0, a2525^0'=1, __rho_11_^0'=k4^post48, i___02020^0'=Irql^0, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=pIrb^post43, keA^0'=0, a3131^0'=ret_IoAllocateIrp2727^post43, b2929^0'=0, k3^0'=k3^post14, ret_IoAllocateIrp2727^0'=0, __rho_99_^0'=0, __rho_10_^0'=k3^post14, (k2^0 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -2+k4^post48 >= 0), cost: 6+4*k4^post48
Second rule:
l15 -> [35] : (k4^0 <= 0 /\ k5^post44 <= 0), cost: NONTERM
New rule:
l1 -> [35] : (0 <= 0 /\ k2^0 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM

Applied simplification
Original rule:
l1 -> [35] : (0 <= 0 /\ k2^0 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
New rule:
l1 -> [35] : (k2^0 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM

Applied chaining
First rule:
l1 -> l15 : a2828^0'=1, b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, ret_ExAllocatePool3030^0'=0, keR^0'=0, ResourceIrp^0'=0, i___01313^0'=Irql^0, k4^0'=0, a2525^0'=1, __rho_11_^0'=k4^post48, i___02020^0'=Irql^0, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=pIrb^post43, keA^0'=0, a3131^0'=ret_IoAllocateIrp2727^post43, b2929^0'=0, k3^0'=k3^post14, ret_IoAllocateIrp2727^0'=0, __rho_99_^0'=0, __rho_10_^0'=k3^post14, (k2^0 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -2+k4^post48 >= 0), cost: 6+4*k4^post48
Second rule:
l15 -> [35] : (-1+__rho_56_^post31 >= 0 /\ k4^0 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
New rule:
l1 -> [35] : (0 <= 0 /\ -1+__rho_56_^post31 >= 0 /\ k2^0 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+k5^post44 >= 0 /\ -2+k4^post48 >= 0), cost: NONTERM

Applied simplification
Original rule:
l1 -> [35] : (0 <= 0 /\ -1+__rho_56_^post31 >= 0 /\ k2^0 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+k5^post44 >= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
New rule:
l1 -> [35] : (-1+__rho_56_^post31 >= 0 /\ k2^0 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+k5^post44 >= 0 /\ -2+k4^post48 >= 0), cost: NONTERM

Applied chaining
First rule:
l1 -> l15 : a2828^0'=1, b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, ret_ExAllocatePool3030^0'=0, keR^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, i___01313^0'=Irql^0, k4^0'=0, a2525^0'=1, __rho_11_^0'=k4^post48, i___02020^0'=Irql^0, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=0, keA^0'=0, a3131^0'=ret_IoAllocateIrp2727^post43, b2929^0'=0, k3^0'=k3^post14, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, __rho_10_^0'=k3^post14, (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0), cost: 4+6*k4^post48
Second rule:
l15 -> [39] : k4^0 <= 0, cost: NONTERM
New rule:
l1 -> [39] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0), cost: NONTERM

Applied simplification
Original rule:
l1 -> [39] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0), cost: NONTERM
New rule:
l1 -> [39] : (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0), cost: NONTERM

Applied chaining
First rule:
l1 -> l15 : a2828^0'=1, b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, ret_ExAllocatePool3030^0'=0, keR^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, i___01313^0'=Irql^0, k4^0'=0, a2525^0'=1, __rho_11_^0'=k4^post48, i___02020^0'=Irql^0, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=0, keA^0'=0, a3131^0'=ret_IoAllocateIrp2727^post43, b2929^0'=0, k3^0'=k3^post14, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, __rho_10_^0'=k3^post14, (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0), cost: 4+6*k4^post48
Second rule:
l15 -> [35] : (k4^0 <= 0 /\ k5^post44 <= 0), cost: NONTERM
New rule:
l1 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0), cost: NONTERM

Applied simplification
Original rule:
l1 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0), cost: NONTERM
New rule:
l1 -> [35] : (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0), cost: NONTERM

Applied chaining
First rule:
l1 -> l15 : a2828^0'=1, b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, ret_ExAllocatePool3030^0'=0, keR^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, i___01313^0'=Irql^0, k4^0'=0, a2525^0'=1, __rho_11_^0'=k4^post48, i___02020^0'=Irql^0, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=0, keA^0'=0, a3131^0'=ret_IoAllocateIrp2727^post43, b2929^0'=0, k3^0'=k3^post14, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, __rho_10_^0'=k3^post14, (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0), cost: 4+6*k4^post48
Second rule:
l15 -> [35] : (-1+__rho_56_^post31 >= 0 /\ k4^0 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
New rule:
l1 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM

Applied simplification
Original rule:
l1 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
New rule:
l1 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM

Applied chaining
First rule:
l1 -> l15 : a2828^0'=1, b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, ret_ExAllocatePool3030^0'=0, keR^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, i___01313^0'=Irql^0, k4^0'=0, a2525^0'=1, __rho_11_^0'=k4^post48, i___02020^0'=Irql^0, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=0, keA^0'=0, a3131^0'=ret_IoAllocateIrp2727^post43, b2929^0'=0, k3^0'=k3^post14, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, __rho_10_^0'=k3^post14, (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0), cost: 4+6*k4^post48
Second rule:
l15 -> [39] : k4^0 <= 0, cost: NONTERM
New rule:
l1 -> [39] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ k2^0 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0), cost: NONTERM

Applied simplification
Original rule:
l1 -> [39] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ k2^0 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0), cost: NONTERM
New rule:
l1 -> [39] : (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0), cost: NONTERM

Applied chaining
First rule:
l1 -> l15 : a2828^0'=1, b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, ret_ExAllocatePool3030^0'=0, keR^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, i___01313^0'=Irql^0, k4^0'=0, a2525^0'=1, __rho_11_^0'=k4^post48, i___02020^0'=Irql^0, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=0, keA^0'=0, a3131^0'=ret_IoAllocateIrp2727^post43, b2929^0'=0, k3^0'=k3^post14, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, __rho_10_^0'=k3^post14, (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0), cost: 4+6*k4^post48
Second rule:
l15 -> [35] : (k4^0 <= 0 /\ k5^post44 <= 0), cost: NONTERM
New rule:
l1 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ k2^0 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0), cost: NONTERM

Applied simplification
Original rule:
l1 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ k2^0 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0), cost: NONTERM
New rule:
l1 -> [35] : (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0), cost: NONTERM

Applied chaining
First rule:
l1 -> l15 : a2828^0'=1, b2626^0'=0, __rho_12_^0'=__rho_12_^post45, i___02424^0'=Irql^0, ret_ExAllocatePool3030^0'=0, keR^0'=0, ResourceIrp^0'=ret_IoAllocateIrp2727^post43, i___01313^0'=Irql^0, k4^0'=0, a2525^0'=1, __rho_11_^0'=k4^post48, i___02020^0'=Irql^0, IsochResourceData^0'=__rho_12_^post45, pIrb^0'=0, keA^0'=0, a3131^0'=ret_IoAllocateIrp2727^post43, b2929^0'=0, k3^0'=k3^post14, ret_IoAllocateIrp2727^0'=ret_IoAllocateIrp2727^post43, __rho_99_^0'=ret_IoAllocateIrp2727^post43, __rho_10_^0'=k3^post14, (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0), cost: 4+6*k4^post48
Second rule:
l15 -> [35] : (-1+__rho_56_^post31 >= 0 /\ k4^0 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
New rule:
l1 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ k2^0 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM

Applied simplification
Original rule:
l1 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ k2^0 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
New rule:
l1 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ k2^0 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM

Applied deletion
Removed the following rules: 139 179 181 182 198 199 239 240 241 242

Eliminated locations on tree-shaped paths
Start location: l34
 138: l1 -> [36] : k2^0 <= 0, cost: NONTERM
 315: l1 -> [39] : (k2^0 <= 0 /\ k3^post14 <= 0 /\ k4^post48 <= 0), cost: NONTERM
 316: l1 -> [35] : (k2^0 <= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ k4^post48 <= 0), cost: NONTERM
 317: l1 -> [35] : (-1+__rho_56_^post31 >= 0 /\ k2^0 <= 0 /\ k3^post14 <= 0 /\ -1+k5^post44 >= 0 /\ k4^post48 <= 0), cost: NONTERM
 318: l1 -> [39] : (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ k3^post14 <= 0 /\ __rho_12_^post45 <= 0), cost: NONTERM
 319: l1 -> [35] : (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ __rho_12_^post45 <= 0), cost: NONTERM
 320: l1 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ k2^0 <= 0 /\ k3^post14 <= 0 /\ __rho_12_^post45 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
 321: l1 -> [39] : (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0), cost: NONTERM
 322: l1 -> [35] : (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0), cost: NONTERM
 323: l1 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
 324: l1 -> [39] : (k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
 325: l1 -> [35] : (k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
 326: l1 -> [35] : (-1+__rho_56_^post31 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+k5^post44 >= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
 327: l1 -> [39] : (k2^0 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
 328: l1 -> [35] : (k2^0 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
 329: l1 -> [35] : (-1+__rho_56_^post31 >= 0 /\ k2^0 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+k5^post44 >= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
 330: l1 -> [39] : (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0), cost: NONTERM
 331: l1 -> [35] : (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0), cost: NONTERM
 332: l1 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
 333: l1 -> [39] : (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0), cost: NONTERM
 334: l1 -> [35] : (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0), cost: NONTERM
 335: l1 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ k2^0 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
 243: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=__rho_6_^post25, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=__rho_2_^post37, keA^0'=0, i___099^0'=Irql^0, (__rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: 6
 244: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25
 245: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+AsyncAddressData^post11 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25
 246: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25
 247: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25
 248: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (AsyncAddressData^post11 <= 0 /\ -1+__rho_7_^post11 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25
 249: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, k2^0'=__rho_6_^post25, a11^0'=1, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=__rho_2_^post37, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_1_^post50 >= 0 /\ __rho_2_^post37 <= 0), cost: 6
 250: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0), cost: 6+8*__rho_6_^post25
 251: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_1_^post50 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0), cost: 6+8*__rho_6_^post25
 252: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_1_^post50 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0), cost: 6+8*__rho_6_^post25
 253: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_1_^post50 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0), cost: 6+8*__rho_6_^post25
 254: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_7_^post11 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0), cost: 6+8*__rho_6_^post25
 255: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, k2^0'=__rho_6_^post25, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_2_^post37 >= 0 /\ CromData^post24 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+3*__rho_2_^post37
 256: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+3*__rho_2_^post37
 257: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_2_^post37 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ CromData^post24 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+3*__rho_2_^post37
 258: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+3*__rho_2_^post37
 259: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ CromData^post24 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+3*__rho_2_^post37
 260: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_7_^post11 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+3*__rho_2_^post37
 261: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, k2^0'=__rho_6_^post25, a11^0'=1, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ CromData^post24 <= 0), cost: 6+3*__rho_2_^post37
 262: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 6+8*__rho_6_^post25+3*__rho_2_^post37
 263: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ CromData^post24 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 6+8*__rho_6_^post25+3*__rho_2_^post37
 264: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_1_^post50 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0), cost: 6+8*__rho_6_^post25+3*__rho_2_^post37
 265: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_1_^post50 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ CromData^post24 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0), cost: 6+8*__rho_6_^post25+3*__rho_2_^post37
 266: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_7_^post11 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 6+8*__rho_6_^post25+3*__rho_2_^post37
 267: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=__rho_6_^post25, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (__rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ __rho_1_^post50 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+7*__rho_2_^post37
 268: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (__rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
 269: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (__rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
 270: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
 271: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
 272: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (__rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_7_^post11 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
 273: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=__rho_6_^post25, a11^0'=1, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_1_^post50 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ __rho_5_^post18 <= 0), cost: 6+7*__rho_2_^post37
 274: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_1_^post50 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
 275: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_1_^post50 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
 276: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_1_^post50 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
 277: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_1_^post50 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
 278: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_1_^post50 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_7_^post11 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
 279: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=__rho_6_^post25, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_5_^post18 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ __rho_1_^post50 <= 0), cost: 6+7*__rho_2_^post37
 280: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_5_^post18 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
 281: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_5_^post18 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
 282: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_5_^post18 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
 283: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_5_^post18 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
 284: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_5_^post18 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_7_^post11 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
 285: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=__rho_6_^post25, a11^0'=1, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_5_^post18 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0), cost: 6+7*__rho_2_^post37
 286: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_5_^post18 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
 287: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_5_^post18 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
 288: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_5_^post18 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
 289: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_5_^post18 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
 290: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_5_^post18 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ __rho_4_^post23 <= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_7_^post11 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
 291: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=__rho_6_^post25, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ __rho_1_^post50 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+7*__rho_2_^post37
 292: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
 293: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
 294: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
 295: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
 296: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_7_^post11 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
 297: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=__rho_6_^post25, a11^0'=1, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ __rho_5_^post18 <= 0), cost: 6+7*__rho_2_^post37
 298: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
 299: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
 300: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_1_^post50 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
 301: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_1_^post50 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
 302: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_7_^post11 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_5_^post18 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
 303: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=__rho_6_^post25, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_5_^post18 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ __rho_1_^post50 <= 0), cost: 6+7*__rho_2_^post37
 304: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_5_^post18 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
 305: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_5_^post18 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
 306: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_5_^post18 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
 307: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_5_^post18 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
 308: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_5_^post18 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_7_^post11 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
 309: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=__rho_6_^post25, a11^0'=1, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, b22^0'=Irp^0, k1^0'=0, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_5_^post18 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+__rho_4_^post23 >= 0), cost: 6+7*__rho_2_^post37
 310: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_5_^post18 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
 311: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_5_^post18 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
 312: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_5_^post18 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
 313: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_5_^post18 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ -1+AsyncAddressData^post11 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37
 314: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, CromData^0'=CromData^post24, __rho_4_^0'=__rho_4_^post23, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_5_^0'=__rho_5_^post18, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, a77^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_5_^post18 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ -1+CromData^post24 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_7_^post11 >= 0 /\ -1+__rho_4_^post23 >= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_9_^post4 <= 0 /\ __rho_8_^post7 <= 0), cost: 6+8*__rho_6_^post25+7*__rho_2_^post37


Applied pruning (of leafs and parallel rules):
Start location: l34
 138: l1 -> [36] : k2^0 <= 0, cost: NONTERM
 315: l1 -> [39] : (k2^0 <= 0 /\ k3^post14 <= 0 /\ k4^post48 <= 0), cost: NONTERM
 316: l1 -> [35] : (k2^0 <= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ k4^post48 <= 0), cost: NONTERM
 317: l1 -> [35] : (-1+__rho_56_^post31 >= 0 /\ k2^0 <= 0 /\ k3^post14 <= 0 /\ -1+k5^post44 >= 0 /\ k4^post48 <= 0), cost: NONTERM
 318: l1 -> [39] : (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ k3^post14 <= 0 /\ __rho_12_^post45 <= 0), cost: NONTERM
 319: l1 -> [35] : (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ __rho_12_^post45 <= 0), cost: NONTERM
 320: l1 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ k2^0 <= 0 /\ k3^post14 <= 0 /\ __rho_12_^post45 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
 321: l1 -> [39] : (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0), cost: NONTERM
 322: l1 -> [35] : (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0), cost: NONTERM
 323: l1 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
 324: l1 -> [39] : (k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
 325: l1 -> [35] : (k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
 326: l1 -> [35] : (-1+__rho_56_^post31 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+k5^post44 >= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
 327: l1 -> [39] : (k2^0 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
 328: l1 -> [35] : (k2^0 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
 329: l1 -> [35] : (-1+__rho_56_^post31 >= 0 /\ k2^0 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+k5^post44 >= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
 330: l1 -> [39] : (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0), cost: NONTERM
 331: l1 -> [35] : (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0), cost: NONTERM
 332: l1 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
 333: l1 -> [39] : (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0), cost: NONTERM
 334: l1 -> [35] : (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0), cost: NONTERM
 335: l1 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ k2^0 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
 243: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=__rho_6_^post25, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=__rho_2_^post37, keA^0'=0, i___099^0'=Irql^0, (__rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: 6
 244: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25
 246: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25
 250: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0), cost: 6+8*__rho_6_^post25
 258: l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+3*__rho_2_^post37


Eliminating location l1 by chaining:

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=__rho_6_^post25, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=__rho_2_^post37, keA^0'=0, i___099^0'=Irql^0, (__rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: 6
Second rule:
l1 -> [36] : k2^0 <= 0, cost: NONTERM
New rule:
l34 -> [36] : (__rho_6_^post25 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=__rho_6_^post25, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=__rho_2_^post37, keA^0'=0, i___099^0'=Irql^0, (__rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: 6
Second rule:
l1 -> [39] : (k2^0 <= 0 /\ k3^post14 <= 0 /\ k4^post48 <= 0), cost: NONTERM
New rule:
l34 -> [39] : (k3^post14 <= 0 /\ __rho_6_^post25 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ k4^post48 <= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=__rho_6_^post25, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=__rho_2_^post37, keA^0'=0, i___099^0'=Irql^0, (__rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: 6
Second rule:
l1 -> [35] : (k2^0 <= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ k4^post48 <= 0), cost: NONTERM
New rule:
l34 -> [35] : (k5^post44 <= 0 /\ k3^post14 <= 0 /\ __rho_6_^post25 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ k4^post48 <= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=__rho_6_^post25, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=__rho_2_^post37, keA^0'=0, i___099^0'=Irql^0, (__rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: 6
Second rule:
l1 -> [35] : (-1+__rho_56_^post31 >= 0 /\ k2^0 <= 0 /\ k3^post14 <= 0 /\ -1+k5^post44 >= 0 /\ k4^post48 <= 0), cost: NONTERM
New rule:
l34 -> [35] : (-1+__rho_56_^post31 >= 0 /\ k3^post14 <= 0 /\ __rho_6_^post25 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0 /\ k4^post48 <= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=__rho_6_^post25, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=__rho_2_^post37, keA^0'=0, i___099^0'=Irql^0, (__rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: 6
Second rule:
l1 -> [39] : (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ k3^post14 <= 0 /\ __rho_12_^post45 <= 0), cost: NONTERM
New rule:
l34 -> [39] : (-1+k4^post48 >= 0 /\ k3^post14 <= 0 /\ __rho_6_^post25 <= 0 /\ __rho_12_^post45 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=__rho_6_^post25, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=__rho_2_^post37, keA^0'=0, i___099^0'=Irql^0, (__rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: 6
Second rule:
l1 -> [35] : (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ __rho_12_^post45 <= 0), cost: NONTERM
New rule:
l34 -> [35] : (-1+k4^post48 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ __rho_6_^post25 <= 0 /\ __rho_12_^post45 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=__rho_6_^post25, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=__rho_2_^post37, keA^0'=0, i___099^0'=Irql^0, (__rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: 6
Second rule:
l1 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ k2^0 <= 0 /\ k3^post14 <= 0 /\ __rho_12_^post45 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
New rule:
l34 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ k3^post14 <= 0 /\ __rho_6_^post25 <= 0 /\ __rho_12_^post45 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=__rho_6_^post25, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=__rho_2_^post37, keA^0'=0, i___099^0'=Irql^0, (__rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: 6
Second rule:
l1 -> [39] : (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0), cost: NONTERM
New rule:
l34 -> [39] : (-1+k4^post48 >= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ __rho_6_^post25 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=__rho_6_^post25, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=__rho_2_^post37, keA^0'=0, i___099^0'=Irql^0, (__rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: 6
Second rule:
l1 -> [35] : (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0), cost: NONTERM
New rule:
l34 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ __rho_6_^post25 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=__rho_6_^post25, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=__rho_2_^post37, keA^0'=0, i___099^0'=Irql^0, (__rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: 6
Second rule:
l1 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
New rule:
l34 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ __rho_6_^post25 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=__rho_6_^post25, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=__rho_2_^post37, keA^0'=0, i___099^0'=Irql^0, (__rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: 6
Second rule:
l1 -> [39] : (k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
New rule:
l34 -> [39] : (-1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ __rho_6_^post25 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=__rho_6_^post25, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=__rho_2_^post37, keA^0'=0, i___099^0'=Irql^0, (__rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: 6
Second rule:
l1 -> [35] : (k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
New rule:
l34 -> [35] : (-1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ __rho_6_^post25 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=__rho_6_^post25, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=__rho_2_^post37, keA^0'=0, i___099^0'=Irql^0, (__rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: 6
Second rule:
l1 -> [35] : (-1+__rho_56_^post31 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+k5^post44 >= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
New rule:
l34 -> [35] : (-1+__rho_56_^post31 >= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ __rho_6_^post25 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0 /\ -2+k4^post48 >= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=__rho_6_^post25, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=__rho_2_^post37, keA^0'=0, i___099^0'=Irql^0, (__rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: 6
Second rule:
l1 -> [39] : (k2^0 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
New rule:
l34 -> [39] : (1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ __rho_6_^post25 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=__rho_6_^post25, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=__rho_2_^post37, keA^0'=0, i___099^0'=Irql^0, (__rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: 6
Second rule:
l1 -> [35] : (k2^0 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
New rule:
l34 -> [35] : (1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ __rho_6_^post25 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=__rho_6_^post25, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=__rho_2_^post37, keA^0'=0, i___099^0'=Irql^0, (__rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: 6
Second rule:
l1 -> [35] : (-1+__rho_56_^post31 >= 0 /\ k2^0 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+k5^post44 >= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
New rule:
l34 -> [35] : (-1+__rho_56_^post31 >= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ __rho_6_^post25 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0 /\ -2+k4^post48 >= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=__rho_6_^post25, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=__rho_2_^post37, keA^0'=0, i___099^0'=Irql^0, (__rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: 6
Second rule:
l1 -> [39] : (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0), cost: NONTERM
New rule:
l34 -> [39] : (-1+k4^post48 >= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ __rho_6_^post25 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=__rho_6_^post25, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=__rho_2_^post37, keA^0'=0, i___099^0'=Irql^0, (__rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: 6
Second rule:
l1 -> [35] : (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0), cost: NONTERM
New rule:
l34 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ __rho_6_^post25 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=__rho_6_^post25, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=__rho_2_^post37, keA^0'=0, i___099^0'=Irql^0, (__rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: 6
Second rule:
l1 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
New rule:
l34 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ __rho_6_^post25 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=__rho_6_^post25, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=__rho_2_^post37, keA^0'=0, i___099^0'=Irql^0, (__rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: 6
Second rule:
l1 -> [39] : (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0), cost: NONTERM
New rule:
l34 -> [39] : (-1+k4^post48 >= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ __rho_6_^post25 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=__rho_6_^post25, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=__rho_2_^post37, keA^0'=0, i___099^0'=Irql^0, (__rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: 6
Second rule:
l1 -> [35] : (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0), cost: NONTERM
New rule:
l34 -> [35] : (-1+k4^post48 >= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ __rho_6_^post25 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=__rho_6_^post25, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, k1^0'=__rho_2_^post37, keA^0'=0, i___099^0'=Irql^0, (__rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: 6
Second rule:
l1 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ k2^0 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
New rule:
l34 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ __rho_6_^post25 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25
Second rule:
l1 -> [36] : k2^0 <= 0, cost: NONTERM
New rule:
l34 -> [36] : (0 <= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [36] : (0 <= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM
New rule:
l34 -> [36] : (AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25
Second rule:
l1 -> [39] : (k2^0 <= 0 /\ k3^post14 <= 0 /\ k4^post48 <= 0), cost: NONTERM
New rule:
l34 -> [39] : (0 <= 0 /\ AsyncAddressData^post11 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ k4^post48 <= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [39] : (0 <= 0 /\ AsyncAddressData^post11 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ k4^post48 <= 0), cost: NONTERM
New rule:
l34 -> [39] : (AsyncAddressData^post11 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ k4^post48 <= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25
Second rule:
l1 -> [35] : (k2^0 <= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ k4^post48 <= 0), cost: NONTERM
New rule:
l34 -> [35] : (0 <= 0 /\ AsyncAddressData^post11 <= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ k4^post48 <= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [35] : (0 <= 0 /\ AsyncAddressData^post11 <= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ k4^post48 <= 0), cost: NONTERM
New rule:
l34 -> [35] : (AsyncAddressData^post11 <= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ k4^post48 <= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25
Second rule:
l1 -> [35] : (-1+__rho_56_^post31 >= 0 /\ k2^0 <= 0 /\ k3^post14 <= 0 /\ -1+k5^post44 >= 0 /\ k4^post48 <= 0), cost: NONTERM
New rule:
l34 -> [35] : (0 <= 0 /\ -1+__rho_56_^post31 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0 /\ k4^post48 <= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [35] : (0 <= 0 /\ -1+__rho_56_^post31 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0 /\ k4^post48 <= 0), cost: NONTERM
New rule:
l34 -> [35] : (-1+__rho_56_^post31 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0 /\ k4^post48 <= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25
Second rule:
l1 -> [39] : (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ k3^post14 <= 0 /\ __rho_12_^post45 <= 0), cost: NONTERM
New rule:
l34 -> [39] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_12_^post45 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [39] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_12_^post45 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM
New rule:
l34 -> [39] : (-1+k4^post48 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_12_^post45 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25
Second rule:
l1 -> [35] : (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ __rho_12_^post45 <= 0), cost: NONTERM
New rule:
l34 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_12_^post45 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_12_^post45 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM
New rule:
l34 -> [35] : (-1+k4^post48 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_12_^post45 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25
Second rule:
l1 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ k2^0 <= 0 /\ k3^post14 <= 0 /\ __rho_12_^post45 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
New rule:
l34 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_12_^post45 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_12_^post45 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
New rule:
l34 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_12_^post45 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25
Second rule:
l1 -> [39] : (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0), cost: NONTERM
New rule:
l34 -> [39] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [39] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM
New rule:
l34 -> [39] : (-1+k4^post48 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25
Second rule:
l1 -> [35] : (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0), cost: NONTERM
New rule:
l34 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM
New rule:
l34 -> [35] : (-1+k4^post48 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25
Second rule:
l1 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
New rule:
l34 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
New rule:
l34 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25
Second rule:
l1 -> [39] : (k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
New rule:
l34 -> [39] : (0 <= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [39] : (0 <= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
New rule:
l34 -> [39] : (AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25
Second rule:
l1 -> [35] : (k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
New rule:
l34 -> [35] : (0 <= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [35] : (0 <= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
New rule:
l34 -> [35] : (AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25
Second rule:
l1 -> [35] : (-1+__rho_56_^post31 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+k5^post44 >= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
New rule:
l34 -> [35] : (0 <= 0 /\ -1+__rho_56_^post31 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0 /\ -2+k4^post48 >= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [35] : (0 <= 0 /\ -1+__rho_56_^post31 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
New rule:
l34 -> [35] : (-1+__rho_56_^post31 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0 /\ -2+k4^post48 >= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25
Second rule:
l1 -> [39] : (k2^0 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
New rule:
l34 -> [39] : (0 <= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [39] : (0 <= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
New rule:
l34 -> [39] : (AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25
Second rule:
l1 -> [35] : (k2^0 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
New rule:
l34 -> [35] : (0 <= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [35] : (0 <= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
New rule:
l34 -> [35] : (AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25
Second rule:
l1 -> [35] : (-1+__rho_56_^post31 >= 0 /\ k2^0 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+k5^post44 >= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
New rule:
l34 -> [35] : (0 <= 0 /\ -1+__rho_56_^post31 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0 /\ -2+k4^post48 >= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [35] : (0 <= 0 /\ -1+__rho_56_^post31 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
New rule:
l34 -> [35] : (-1+__rho_56_^post31 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0 /\ -2+k4^post48 >= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25
Second rule:
l1 -> [39] : (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0), cost: NONTERM
New rule:
l34 -> [39] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [39] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM
New rule:
l34 -> [39] : (-1+k4^post48 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25
Second rule:
l1 -> [35] : (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0), cost: NONTERM
New rule:
l34 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM
New rule:
l34 -> [35] : (-1+k4^post48 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25
Second rule:
l1 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
New rule:
l34 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
New rule:
l34 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25
Second rule:
l1 -> [39] : (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0), cost: NONTERM
New rule:
l34 -> [39] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [39] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM
New rule:
l34 -> [39] : (-1+k4^post48 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25
Second rule:
l1 -> [35] : (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0), cost: NONTERM
New rule:
l34 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM
New rule:
l34 -> [35] : (-1+k4^post48 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25
Second rule:
l1 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ k2^0 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
New rule:
l34 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
New rule:
l34 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25
Second rule:
l1 -> [36] : k2^0 <= 0, cost: NONTERM
New rule:
l34 -> [36] : (0 <= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [36] : (0 <= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM
New rule:
l34 -> [36] : (-1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25
Second rule:
l1 -> [39] : (k2^0 <= 0 /\ k3^post14 <= 0 /\ k4^post48 <= 0), cost: NONTERM
New rule:
l34 -> [39] : (0 <= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ k4^post48 <= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [39] : (0 <= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ k4^post48 <= 0), cost: NONTERM
New rule:
l34 -> [39] : (-1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ k4^post48 <= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25
Second rule:
l1 -> [35] : (k2^0 <= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ k4^post48 <= 0), cost: NONTERM
New rule:
l34 -> [35] : (0 <= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ k4^post48 <= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [35] : (0 <= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ k4^post48 <= 0), cost: NONTERM
New rule:
l34 -> [35] : (-1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ k4^post48 <= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25
Second rule:
l1 -> [35] : (-1+__rho_56_^post31 >= 0 /\ k2^0 <= 0 /\ k3^post14 <= 0 /\ -1+k5^post44 >= 0 /\ k4^post48 <= 0), cost: NONTERM
New rule:
l34 -> [35] : (0 <= 0 /\ -1+__rho_56_^post31 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0 /\ k4^post48 <= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [35] : (0 <= 0 /\ -1+__rho_56_^post31 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0 /\ k4^post48 <= 0), cost: NONTERM
New rule:
l34 -> [35] : (-1+__rho_56_^post31 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0 /\ k4^post48 <= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25
Second rule:
l1 -> [39] : (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ k3^post14 <= 0 /\ __rho_12_^post45 <= 0), cost: NONTERM
New rule:
l34 -> [39] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_12_^post45 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [39] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_12_^post45 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM
New rule:
l34 -> [39] : (-1+k4^post48 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_12_^post45 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25
Second rule:
l1 -> [35] : (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ __rho_12_^post45 <= 0), cost: NONTERM
New rule:
l34 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_12_^post45 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_12_^post45 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM
New rule:
l34 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_12_^post45 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25
Second rule:
l1 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ k2^0 <= 0 /\ k3^post14 <= 0 /\ __rho_12_^post45 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
New rule:
l34 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_12_^post45 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_12_^post45 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
New rule:
l34 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_12_^post45 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25
Second rule:
l1 -> [39] : (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0), cost: NONTERM
New rule:
l34 -> [39] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [39] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM
New rule:
l34 -> [39] : (-1+k4^post48 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25
Second rule:
l1 -> [35] : (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0), cost: NONTERM
New rule:
l34 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM
New rule:
l34 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25
Second rule:
l1 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
New rule:
l34 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
New rule:
l34 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25
Second rule:
l1 -> [39] : (k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
New rule:
l34 -> [39] : (0 <= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [39] : (0 <= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
New rule:
l34 -> [39] : (-1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25
Second rule:
l1 -> [35] : (k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
New rule:
l34 -> [35] : (0 <= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [35] : (0 <= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
New rule:
l34 -> [35] : (-1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25
Second rule:
l1 -> [35] : (-1+__rho_56_^post31 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+k5^post44 >= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
New rule:
l34 -> [35] : (0 <= 0 /\ -1+__rho_56_^post31 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0 /\ -2+k4^post48 >= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [35] : (0 <= 0 /\ -1+__rho_56_^post31 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
New rule:
l34 -> [35] : (-1+__rho_56_^post31 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0 /\ -2+k4^post48 >= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25
Second rule:
l1 -> [39] : (k2^0 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
New rule:
l34 -> [39] : (0 <= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [39] : (0 <= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
New rule:
l34 -> [39] : (-1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25
Second rule:
l1 -> [35] : (k2^0 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
New rule:
l34 -> [35] : (0 <= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [35] : (0 <= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
New rule:
l34 -> [35] : (-1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25
Second rule:
l1 -> [35] : (-1+__rho_56_^post31 >= 0 /\ k2^0 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+k5^post44 >= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
New rule:
l34 -> [35] : (0 <= 0 /\ -1+__rho_56_^post31 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0 /\ -2+k4^post48 >= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [35] : (0 <= 0 /\ -1+__rho_56_^post31 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
New rule:
l34 -> [35] : (-1+__rho_56_^post31 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0 /\ -2+k4^post48 >= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25
Second rule:
l1 -> [39] : (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0), cost: NONTERM
New rule:
l34 -> [39] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [39] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM
New rule:
l34 -> [39] : (-1+k4^post48 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25
Second rule:
l1 -> [35] : (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0), cost: NONTERM
New rule:
l34 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM
New rule:
l34 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25
Second rule:
l1 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
New rule:
l34 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
New rule:
l34 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25
Second rule:
l1 -> [39] : (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0), cost: NONTERM
New rule:
l34 -> [39] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [39] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM
New rule:
l34 -> [39] : (-1+k4^post48 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25
Second rule:
l1 -> [35] : (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0), cost: NONTERM
New rule:
l34 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM
New rule:
l34 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25
Second rule:
l1 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ k2^0 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
New rule:
l34 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
New rule:
l34 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0), cost: 6+8*__rho_6_^post25
Second rule:
l1 -> [36] : k2^0 <= 0, cost: NONTERM
New rule:
l34 -> [36] : (0 <= 0 /\ -1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [36] : (0 <= 0 /\ -1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0), cost: NONTERM
New rule:
l34 -> [36] : (-1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0), cost: 6+8*__rho_6_^post25
Second rule:
l1 -> [39] : (k2^0 <= 0 /\ k3^post14 <= 0 /\ k4^post48 <= 0), cost: NONTERM
New rule:
l34 -> [39] : (0 <= 0 /\ -1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ k4^post48 <= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [39] : (0 <= 0 /\ -1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ k4^post48 <= 0), cost: NONTERM
New rule:
l34 -> [39] : (-1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ k4^post48 <= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0), cost: 6+8*__rho_6_^post25
Second rule:
l1 -> [35] : (k2^0 <= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ k4^post48 <= 0), cost: NONTERM
New rule:
l34 -> [35] : (0 <= 0 /\ -1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ k4^post48 <= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [35] : (0 <= 0 /\ -1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ k4^post48 <= 0), cost: NONTERM
New rule:
l34 -> [35] : (-1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ k4^post48 <= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0), cost: 6+8*__rho_6_^post25
Second rule:
l1 -> [35] : (-1+__rho_56_^post31 >= 0 /\ k2^0 <= 0 /\ k3^post14 <= 0 /\ -1+k5^post44 >= 0 /\ k4^post48 <= 0), cost: NONTERM
New rule:
l34 -> [35] : (0 <= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ -1+k5^post44 >= 0 /\ k4^post48 <= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [35] : (0 <= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ -1+k5^post44 >= 0 /\ k4^post48 <= 0), cost: NONTERM
New rule:
l34 -> [35] : (-1+__rho_1_^post50 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ -1+k5^post44 >= 0 /\ k4^post48 <= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0), cost: 6+8*__rho_6_^post25
Second rule:
l1 -> [39] : (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ k3^post14 <= 0 /\ __rho_12_^post45 <= 0), cost: NONTERM
New rule:
l34 -> [39] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_12_^post45 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [39] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_12_^post45 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0), cost: NONTERM
New rule:
l34 -> [39] : (-1+k4^post48 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_12_^post45 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0), cost: 6+8*__rho_6_^post25
Second rule:
l1 -> [35] : (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ __rho_12_^post45 <= 0), cost: NONTERM
New rule:
l34 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_12_^post45 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_12_^post45 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0), cost: NONTERM
New rule:
l34 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_12_^post45 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0), cost: 6+8*__rho_6_^post25
Second rule:
l1 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ k2^0 <= 0 /\ k3^post14 <= 0 /\ __rho_12_^post45 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
New rule:
l34 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_12_^post45 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_12_^post45 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
New rule:
l34 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_12_^post45 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0), cost: 6+8*__rho_6_^post25
Second rule:
l1 -> [39] : (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0), cost: NONTERM
New rule:
l34 -> [39] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [39] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0), cost: NONTERM
New rule:
l34 -> [39] : (-1+k4^post48 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0), cost: 6+8*__rho_6_^post25
Second rule:
l1 -> [35] : (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0), cost: NONTERM
New rule:
l34 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0), cost: NONTERM
New rule:
l34 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0), cost: 6+8*__rho_6_^post25
Second rule:
l1 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
New rule:
l34 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
New rule:
l34 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0), cost: 6+8*__rho_6_^post25
Second rule:
l1 -> [39] : (k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
New rule:
l34 -> [39] : (0 <= 0 /\ -1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [39] : (0 <= 0 /\ -1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
New rule:
l34 -> [39] : (-1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0), cost: 6+8*__rho_6_^post25
Second rule:
l1 -> [35] : (k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
New rule:
l34 -> [35] : (0 <= 0 /\ -1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [35] : (0 <= 0 /\ -1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
New rule:
l34 -> [35] : (-1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0), cost: 6+8*__rho_6_^post25
Second rule:
l1 -> [35] : (-1+__rho_56_^post31 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+k5^post44 >= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
New rule:
l34 -> [35] : (0 <= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ -1+k5^post44 >= 0 /\ -2+k4^post48 >= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [35] : (0 <= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ -1+k5^post44 >= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
New rule:
l34 -> [35] : (-1+__rho_1_^post50 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ -1+k5^post44 >= 0 /\ -2+k4^post48 >= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0), cost: 6+8*__rho_6_^post25
Second rule:
l1 -> [39] : (k2^0 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
New rule:
l34 -> [39] : (0 <= 0 /\ -1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [39] : (0 <= 0 /\ -1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
New rule:
l34 -> [39] : (-1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0), cost: 6+8*__rho_6_^post25
Second rule:
l1 -> [35] : (k2^0 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
New rule:
l34 -> [35] : (0 <= 0 /\ -1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [35] : (0 <= 0 /\ -1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
New rule:
l34 -> [35] : (-1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0), cost: 6+8*__rho_6_^post25
Second rule:
l1 -> [35] : (-1+__rho_56_^post31 >= 0 /\ k2^0 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+k5^post44 >= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
New rule:
l34 -> [35] : (0 <= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ -1+k5^post44 >= 0 /\ -2+k4^post48 >= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [35] : (0 <= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ -1+k5^post44 >= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
New rule:
l34 -> [35] : (-1+__rho_1_^post50 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ -1+k5^post44 >= 0 /\ -2+k4^post48 >= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0), cost: 6+8*__rho_6_^post25
Second rule:
l1 -> [39] : (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0), cost: NONTERM
New rule:
l34 -> [39] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [39] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0), cost: NONTERM
New rule:
l34 -> [39] : (-1+k4^post48 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0), cost: 6+8*__rho_6_^post25
Second rule:
l1 -> [35] : (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0), cost: NONTERM
New rule:
l34 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0), cost: NONTERM
New rule:
l34 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0), cost: 6+8*__rho_6_^post25
Second rule:
l1 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
New rule:
l34 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
New rule:
l34 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0), cost: 6+8*__rho_6_^post25
Second rule:
l1 -> [39] : (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0), cost: NONTERM
New rule:
l34 -> [39] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [39] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0), cost: NONTERM
New rule:
l34 -> [39] : (-1+k4^post48 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0), cost: 6+8*__rho_6_^post25
Second rule:
l1 -> [35] : (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0), cost: NONTERM
New rule:
l34 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0), cost: NONTERM
New rule:
l34 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, ret_t1394Diag_PnpStopDevice33^0'=0, k2^0'=0, a11^0'=1, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, b22^0'=Irp^0, k1^0'=__rho_2_^post37, __rho_7_^0'=__rho_7_^post11, keA^0'=0, i___099^0'=Irql^0, (-1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0), cost: 6+8*__rho_6_^post25
Second rule:
l1 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ k2^0 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
New rule:
l34 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
New rule:
l34 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+3*__rho_2_^post37
Second rule:
l1 -> [36] : k2^0 <= 0, cost: NONTERM
New rule:
l34 -> [36] : (0 <= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [36] : (0 <= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM
New rule:
l34 -> [36] : (-1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+3*__rho_2_^post37
Second rule:
l1 -> [39] : (k2^0 <= 0 /\ k3^post14 <= 0 /\ k4^post48 <= 0), cost: NONTERM
New rule:
l34 -> [39] : (0 <= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0 /\ k4^post48 <= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [39] : (0 <= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0 /\ k4^post48 <= 0), cost: NONTERM
New rule:
l34 -> [39] : (-1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0 /\ k4^post48 <= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+3*__rho_2_^post37
Second rule:
l1 -> [35] : (k2^0 <= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ k4^post48 <= 0), cost: NONTERM
New rule:
l34 -> [35] : (0 <= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0 /\ k4^post48 <= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [35] : (0 <= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0 /\ k4^post48 <= 0), cost: NONTERM
New rule:
l34 -> [35] : (-1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0 /\ k4^post48 <= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+3*__rho_2_^post37
Second rule:
l1 -> [35] : (-1+__rho_56_^post31 >= 0 /\ k2^0 <= 0 /\ k3^post14 <= 0 /\ -1+k5^post44 >= 0 /\ k4^post48 <= 0), cost: NONTERM
New rule:
l34 -> [35] : (0 <= 0 /\ -1+__rho_56_^post31 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0 /\ k4^post48 <= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [35] : (0 <= 0 /\ -1+__rho_56_^post31 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0 /\ k4^post48 <= 0), cost: NONTERM
New rule:
l34 -> [35] : (-1+__rho_56_^post31 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0 /\ k4^post48 <= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+3*__rho_2_^post37
Second rule:
l1 -> [39] : (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ k3^post14 <= 0 /\ __rho_12_^post45 <= 0), cost: NONTERM
New rule:
l34 -> [39] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_12_^post45 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [39] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_12_^post45 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM
New rule:
l34 -> [39] : (-1+k4^post48 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_12_^post45 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+3*__rho_2_^post37
Second rule:
l1 -> [35] : (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ __rho_12_^post45 <= 0), cost: NONTERM
New rule:
l34 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_12_^post45 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_12_^post45 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM
New rule:
l34 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_12_^post45 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+3*__rho_2_^post37
Second rule:
l1 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ k2^0 <= 0 /\ k3^post14 <= 0 /\ __rho_12_^post45 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
New rule:
l34 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_12_^post45 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_12_^post45 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
New rule:
l34 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_12_^post45 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+3*__rho_2_^post37
Second rule:
l1 -> [39] : (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0), cost: NONTERM
New rule:
l34 -> [39] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [39] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM
New rule:
l34 -> [39] : (-1+k4^post48 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+3*__rho_2_^post37
Second rule:
l1 -> [35] : (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0), cost: NONTERM
New rule:
l34 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM
New rule:
l34 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+3*__rho_2_^post37
Second rule:
l1 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
New rule:
l34 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
New rule:
l34 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+3*__rho_2_^post37
Second rule:
l1 -> [39] : (k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
New rule:
l34 -> [39] : (0 <= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [39] : (0 <= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
New rule:
l34 -> [39] : (-1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+3*__rho_2_^post37
Second rule:
l1 -> [35] : (k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
New rule:
l34 -> [35] : (0 <= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [35] : (0 <= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
New rule:
l34 -> [35] : (-1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+3*__rho_2_^post37
Second rule:
l1 -> [35] : (-1+__rho_56_^post31 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+k5^post44 >= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
New rule:
l34 -> [35] : (0 <= 0 /\ -1+__rho_56_^post31 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0 /\ -2+k4^post48 >= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [35] : (0 <= 0 /\ -1+__rho_56_^post31 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
New rule:
l34 -> [35] : (-1+__rho_56_^post31 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0 /\ -2+k4^post48 >= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+3*__rho_2_^post37
Second rule:
l1 -> [39] : (k2^0 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
New rule:
l34 -> [39] : (0 <= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [39] : (0 <= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
New rule:
l34 -> [39] : (-1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+3*__rho_2_^post37
Second rule:
l1 -> [35] : (k2^0 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
New rule:
l34 -> [35] : (0 <= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [35] : (0 <= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
New rule:
l34 -> [35] : (-1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+3*__rho_2_^post37
Second rule:
l1 -> [35] : (-1+__rho_56_^post31 >= 0 /\ k2^0 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+k5^post44 >= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
New rule:
l34 -> [35] : (0 <= 0 /\ -1+__rho_56_^post31 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0 /\ -2+k4^post48 >= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [35] : (0 <= 0 /\ -1+__rho_56_^post31 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
New rule:
l34 -> [35] : (-1+__rho_56_^post31 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0 /\ -2+k4^post48 >= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+3*__rho_2_^post37
Second rule:
l1 -> [39] : (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0), cost: NONTERM
New rule:
l34 -> [39] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [39] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM
New rule:
l34 -> [39] : (-1+k4^post48 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+3*__rho_2_^post37
Second rule:
l1 -> [35] : (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0), cost: NONTERM
New rule:
l34 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM
New rule:
l34 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+3*__rho_2_^post37
Second rule:
l1 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ k2^0 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
New rule:
l34 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
New rule:
l34 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+3*__rho_2_^post37
Second rule:
l1 -> [39] : (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0), cost: NONTERM
New rule:
l34 -> [39] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [39] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM
New rule:
l34 -> [39] : (-1+k4^post48 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+3*__rho_2_^post37
Second rule:
l1 -> [35] : (-1+k4^post48 >= 0 /\ k2^0 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0), cost: NONTERM
New rule:
l34 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM
New rule:
l34 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM

Applied chaining
First rule:
l34 -> l1 : ntStatus^0'=0, __rho_6_^0'=__rho_6_^post25, __rho_2_^0'=__rho_2_^post37, CromData^0'=CromData^post24, k2^0'=0, __rho_8_^0'=__rho_8_^post7, keR^0'=0, __rho_1_^0'=__rho_1_^post50, ret_IoSetDeviceInterfaceState44^0'=0, __rho_9_^0'=__rho_9_^post4, AsyncAddressData^0'=AsyncAddressData^post11, k1^0'=0, __rho_7_^0'=__rho_7_^post11, keA^0'=0, __rho_3_^0'=CromData^post24, i___099^0'=Irql^0, (-1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: 6+8*__rho_6_^post25+3*__rho_2_^post37
Second rule:
l1 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ k2^0 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
New rule:
l34 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM

Applied simplification
Original rule:
l34 -> [35] : (0 <= 0 /\ -1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
New rule:
l34 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM

Applied deletion
Removed the following rules: 138 243 244 246 250 258 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335

Eliminated locations on tree-shaped paths
Start location: l34
 336: l34 -> [36] : (__rho_6_^post25 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM
 337: l34 -> [39] : (k3^post14 <= 0 /\ __rho_6_^post25 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ k4^post48 <= 0), cost: NONTERM
 338: l34 -> [35] : (k5^post44 <= 0 /\ k3^post14 <= 0 /\ __rho_6_^post25 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ k4^post48 <= 0), cost: NONTERM
 339: l34 -> [35] : (-1+__rho_56_^post31 >= 0 /\ k3^post14 <= 0 /\ __rho_6_^post25 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0 /\ k4^post48 <= 0), cost: NONTERM
 340: l34 -> [39] : (-1+k4^post48 >= 0 /\ k3^post14 <= 0 /\ __rho_6_^post25 <= 0 /\ __rho_12_^post45 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM
 341: l34 -> [35] : (-1+k4^post48 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ __rho_6_^post25 <= 0 /\ __rho_12_^post45 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM
 342: l34 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ k3^post14 <= 0 /\ __rho_6_^post25 <= 0 /\ __rho_12_^post45 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
 343: l34 -> [39] : (-1+k4^post48 >= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ __rho_6_^post25 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM
 344: l34 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ __rho_6_^post25 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM
 345: l34 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ __rho_6_^post25 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
 346: l34 -> [39] : (-1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ __rho_6_^post25 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
 347: l34 -> [35] : (-1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ __rho_6_^post25 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
 348: l34 -> [35] : (-1+__rho_56_^post31 >= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ __rho_6_^post25 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
 349: l34 -> [39] : (1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ __rho_6_^post25 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
 350: l34 -> [35] : (1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ __rho_6_^post25 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
 351: l34 -> [35] : (-1+__rho_56_^post31 >= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ __rho_6_^post25 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
 352: l34 -> [39] : (-1+k4^post48 >= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ __rho_6_^post25 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM
 353: l34 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ __rho_6_^post25 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM
 354: l34 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ __rho_6_^post25 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
 355: l34 -> [39] : (-1+k4^post48 >= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ __rho_6_^post25 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM
 356: l34 -> [35] : (-1+k4^post48 >= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ __rho_6_^post25 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM
 357: l34 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ __rho_6_^post25 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
 358: l34 -> [36] : (AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM
 359: l34 -> [39] : (AsyncAddressData^post11 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ k4^post48 <= 0), cost: NONTERM
 360: l34 -> [35] : (AsyncAddressData^post11 <= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ k4^post48 <= 0), cost: NONTERM
 361: l34 -> [35] : (-1+__rho_56_^post31 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0 /\ k4^post48 <= 0), cost: NONTERM
 362: l34 -> [39] : (-1+k4^post48 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_12_^post45 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM
 363: l34 -> [35] : (-1+k4^post48 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_12_^post45 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM
 364: l34 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_12_^post45 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
 365: l34 -> [39] : (-1+k4^post48 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM
 366: l34 -> [35] : (-1+k4^post48 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM
 367: l34 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
 368: l34 -> [39] : (AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
 369: l34 -> [35] : (AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
 370: l34 -> [35] : (-1+__rho_56_^post31 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
 371: l34 -> [39] : (AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
 372: l34 -> [35] : (AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
 373: l34 -> [35] : (-1+__rho_56_^post31 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
 374: l34 -> [39] : (-1+k4^post48 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM
 375: l34 -> [35] : (-1+k4^post48 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM
 376: l34 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
 377: l34 -> [39] : (-1+k4^post48 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM
 378: l34 -> [35] : (-1+k4^post48 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM
 379: l34 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
 380: l34 -> [36] : (-1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM
 381: l34 -> [39] : (-1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ k4^post48 <= 0), cost: NONTERM
 382: l34 -> [35] : (-1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ k4^post48 <= 0), cost: NONTERM
 383: l34 -> [35] : (-1+__rho_56_^post31 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0 /\ k4^post48 <= 0), cost: NONTERM
 384: l34 -> [39] : (-1+k4^post48 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_12_^post45 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM
 385: l34 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_12_^post45 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM
 386: l34 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_12_^post45 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
 387: l34 -> [39] : (-1+k4^post48 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM
 388: l34 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM
 389: l34 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
 390: l34 -> [39] : (-1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
 391: l34 -> [35] : (-1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
 392: l34 -> [35] : (-1+__rho_56_^post31 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
 393: l34 -> [39] : (-1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
 394: l34 -> [35] : (-1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
 395: l34 -> [35] : (-1+__rho_56_^post31 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
 396: l34 -> [39] : (-1+k4^post48 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM
 397: l34 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM
 398: l34 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
 399: l34 -> [39] : (-1+k4^post48 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM
 400: l34 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM
 401: l34 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
 402: l34 -> [36] : (-1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0), cost: NONTERM
 403: l34 -> [39] : (-1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ k4^post48 <= 0), cost: NONTERM
 404: l34 -> [35] : (-1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ k4^post48 <= 0), cost: NONTERM
 405: l34 -> [35] : (-1+__rho_1_^post50 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ -1+k5^post44 >= 0 /\ k4^post48 <= 0), cost: NONTERM
 406: l34 -> [39] : (-1+k4^post48 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_12_^post45 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0), cost: NONTERM
 407: l34 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_12_^post45 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0), cost: NONTERM
 408: l34 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ AsyncAddressData^post11 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_12_^post45 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
 409: l34 -> [39] : (-1+k4^post48 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0), cost: NONTERM
 410: l34 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0), cost: NONTERM
 411: l34 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
 412: l34 -> [39] : (-1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
 413: l34 -> [35] : (-1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
 414: l34 -> [35] : (-1+__rho_1_^post50 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ -1+k5^post44 >= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
 415: l34 -> [39] : (-1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
 416: l34 -> [35] : (-1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
 417: l34 -> [35] : (-1+__rho_1_^post50 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ -1+k5^post44 >= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
 418: l34 -> [39] : (-1+k4^post48 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0), cost: NONTERM
 419: l34 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0), cost: NONTERM
 420: l34 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ AsyncAddressData^post11 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
 421: l34 -> [39] : (-1+k4^post48 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0), cost: NONTERM
 422: l34 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0), cost: NONTERM
 423: l34 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_1_^post50 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_8_^post7 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
 424: l34 -> [36] : (-1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM
 425: l34 -> [39] : (-1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0 /\ k4^post48 <= 0), cost: NONTERM
 426: l34 -> [35] : (-1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0 /\ k4^post48 <= 0), cost: NONTERM
 427: l34 -> [35] : (-1+__rho_56_^post31 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0 /\ k4^post48 <= 0), cost: NONTERM
 428: l34 -> [39] : (-1+k4^post48 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_12_^post45 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM
 429: l34 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_12_^post45 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM
 430: l34 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_12_^post45 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
 431: l34 -> [39] : (-1+k4^post48 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM
 432: l34 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM
 433: l34 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
 434: l34 -> [39] : (-1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
 435: l34 -> [35] : (-1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
 436: l34 -> [35] : (-1+__rho_56_^post31 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
 437: l34 -> [39] : (-1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
 438: l34 -> [35] : (-1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
 439: l34 -> [35] : (-1+__rho_56_^post31 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0 /\ -2+k4^post48 >= 0), cost: NONTERM
 440: l34 -> [39] : (-1+k4^post48 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM
 441: l34 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM
 442: l34 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ -1+ret_IoAllocateIrp2727^post43 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM
 443: l34 -> [39] : (-1+k4^post48 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM
 444: l34 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k5^post44 <= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0), cost: NONTERM
 445: l34 -> [35] : (-1+k4^post48 >= 0 /\ -1+__rho_56_^post31 >= 0 /\ -1+__rho_8_^post7 >= 0 /\ -1+__rho_2_^post37 >= 0 /\ AsyncAddressData^post11 <= 0 /\ 1+ret_IoAllocateIrp2727^post43 <= 0 /\ CromData^post24 <= 0 /\ -1+__rho_12_^post45 >= 0 /\ k3^post14 <= 0 /\ -1+__rho_6_^post25 >= 0 /\ __rho_7_^post11 <= 0 /\ __rho_9_^post4 <= 0 /\ __rho_1_^post50 <= 0 /\ -1+k5^post44 >= 0), cost: NONTERM


Computing asymptotic complexity
Proved nontermination of rule 336 via SMT.

Proved the following lower bound
Complexity:  Nonterm
Cpx degree: Nonterm

Solved cost: NONTERM
Rule cost:   NONTERM
Rule guard:  (__rho_6_^post25 <= 0 /\ __rho_2_^post37 <= 0 /\ __rho_1_^post50 <= 0)